FR3059458B1 - Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique - Google Patents

Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique Download PDF

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Publication number
FR3059458B1
FR3059458B1 FR1661500A FR1661500A FR3059458B1 FR 3059458 B1 FR3059458 B1 FR 3059458B1 FR 1661500 A FR1661500 A FR 1661500A FR 1661500 A FR1661500 A FR 1661500A FR 3059458 B1 FR3059458 B1 FR 3059458B1
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FR
France
Prior art keywords
memory cells
pair
selection gate
memory device
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1661500A
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English (en)
Other versions
FR3059458A1 (fr
Inventor
Francesco La Rosa
Stephan Niel
Arnaud Regnier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1661500A priority Critical patent/FR3059458B1/fr
Priority to CN201711106086.6A priority patent/CN108110009B/zh
Priority to CN201721495389.7U priority patent/CN207852676U/zh
Priority to US15/810,979 priority patent/US10438960B2/en
Publication of FR3059458A1 publication Critical patent/FR3059458A1/fr
Application granted granted Critical
Publication of FR3059458B1 publication Critical patent/FR3059458B1/fr
Priority to US16/542,511 priority patent/US10790293B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H01L29/42352—Gate electrodes for transistors with charge trapping gate insulator with the gate at least partly formed in a trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/43—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/44—Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a control gate layer also being used as part of the peripheral transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

Chaque cellule-mémoire est du type à piégeage de charges dans une interface diélectrique et comprend un transistor d'état (T) sélectionnable par un transistor de sélection vertical enterré dans un substrat et comportant une grille de sélection enterrée. Les colonnes de cellules-mémoires comportent des paires de cellules-mémoires jumelles, les deux transistors de sélection d'une paire de cellules-mémoires jumelles ayant une grille de sélection commune, les deux transistors d'état d'une paire de cellules-mémoires jumelles ayant une grille de commande commune. Le dispositif comprend en outre, pour chaque paire de cellules-mémoires jumelles (Ci,j ;Ci-1,j) une région diélectrique (RDi-1,j) située entre la grille de commande (CGi,i- 1) et le substrat et chevauchant ladite grille de sélection commune (CSGi,i-1 ) de façon à former de part et d'autre de la grille de sélection les deux interfaces diélectriques de piégeage de charges (IDi,j ;IDi-1,j) respectivement dédiées aux deux cellules-mémoires jumelles.
FR1661500A 2016-11-25 2016-11-25 Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique Expired - Fee Related FR3059458B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1661500A FR3059458B1 (fr) 2016-11-25 2016-11-25 Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique
CN201711106086.6A CN108110009B (zh) 2016-11-25 2017-11-10 电介质界面中具有电荷俘获的紧凑型非易失性存储器器件
CN201721495389.7U CN207852676U (zh) 2016-11-25 2017-11-10 存储器器件
US15/810,979 US10438960B2 (en) 2016-11-25 2017-11-13 Compact non-volatile memory device of the type with charge trapping in a dielectric interface
US16/542,511 US10790293B2 (en) 2016-11-25 2019-08-16 Compact non-volatile memory device of the type with charge trapping in a dielectric interface

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1661500 2016-11-25
FR1661500A FR3059458B1 (fr) 2016-11-25 2016-11-25 Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique

Publications (2)

Publication Number Publication Date
FR3059458A1 FR3059458A1 (fr) 2018-06-01
FR3059458B1 true FR3059458B1 (fr) 2019-03-29

Family

ID=58501476

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1661500A Expired - Fee Related FR3059458B1 (fr) 2016-11-25 2016-11-25 Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique

Country Status (3)

Country Link
US (2) US10438960B2 (fr)
CN (2) CN207852676U (fr)
FR (1) FR3059458B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3059458B1 (fr) * 2016-11-25 2019-03-29 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique
FR3080949B1 (fr) 2018-05-04 2021-05-28 St Microelectronics Rousset Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
FR3125351B1 (fr) * 2021-07-13 2023-06-23 St Microelectronics Rousset Dispositif de mémoire non volatile lisible uniquement un nombre de fois prédéterminé

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5477068A (en) * 1992-03-18 1995-12-19 Rohm Co., Ltd. Nonvolatile semiconductor memory device
US7120059B2 (en) * 2004-07-06 2006-10-10 Macronix International Co., Ltd. Memory array including multiple-gate charge trapping non-volatile cells
US7816728B2 (en) * 2005-04-12 2010-10-19 International Business Machines Corporation Structure and method of fabricating high-density trench-based non-volatile random access SONOS memory cells for SOC applications
US7829938B2 (en) * 2005-07-14 2010-11-09 Micron Technology, Inc. High density NAND non-volatile memory device
DE102008047591B4 (de) * 2007-09-18 2019-08-14 Samsung Electronics Co., Ltd. Verfahren zum Herstellen einer Halbleitervorrichtung mit reduzierter Dicke
JP2012099793A (ja) * 2010-10-07 2012-05-24 Elpida Memory Inc 半導体装置及びその製造方法
FR2987696B1 (fr) * 2012-03-05 2014-11-21 St Microelectronics Rousset Procede de lecture ecriture de cellules memoire non volatiles
US20140198583A1 (en) * 2013-01-17 2014-07-17 Infineon Technologies Ag Method and System for Reducing the Size of Nonvolatile Memories
FR3021804B1 (fr) * 2014-05-28 2017-09-01 Stmicroelectronics Rousset Cellule memoire non volatile duale comprenant un transistor d'effacement
FR3059458B1 (fr) * 2016-11-25 2019-03-29 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique

Also Published As

Publication number Publication date
CN108110009A (zh) 2018-06-01
US10438960B2 (en) 2019-10-08
FR3059458A1 (fr) 2018-06-01
CN207852676U (zh) 2018-09-11
US10790293B2 (en) 2020-09-29
CN108110009B (zh) 2023-02-03
US20190371805A1 (en) 2019-12-05
US20180151584A1 (en) 2018-05-31

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