FR2987696B1 - Procede de lecture ecriture de cellules memoire non volatiles - Google Patents

Procede de lecture ecriture de cellules memoire non volatiles

Info

Publication number
FR2987696B1
FR2987696B1 FR1251969A FR1251969A FR2987696B1 FR 2987696 B1 FR2987696 B1 FR 2987696B1 FR 1251969 A FR1251969 A FR 1251969A FR 1251969 A FR1251969 A FR 1251969A FR 2987696 B1 FR2987696 B1 FR 2987696B1
Authority
FR
France
Prior art keywords
volatile memory
memory cells
reading written
written non
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1251969A
Other languages
English (en)
Other versions
FR2987696A1 (fr
Inventor
Rosa Francesco La
Olivier Pizzuto
Stephan Niel
Philippe Boivin
Pascal Fornara
Laurent Lopez
Arnaud Regnier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1251969A priority Critical patent/FR2987696B1/fr
Priority to US13/786,197 priority patent/US8940604B2/en
Priority to US13/786,213 priority patent/US8901634B2/en
Priority to US13/786,202 priority patent/US8830761B2/en
Publication of FR2987696A1 publication Critical patent/FR2987696A1/fr
Application granted granted Critical
Publication of FR2987696B1 publication Critical patent/FR2987696B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
FR1251969A 2012-03-05 2012-03-05 Procede de lecture ecriture de cellules memoire non volatiles Expired - Fee Related FR2987696B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1251969A FR2987696B1 (fr) 2012-03-05 2012-03-05 Procede de lecture ecriture de cellules memoire non volatiles
US13/786,197 US8940604B2 (en) 2012-03-05 2013-03-05 Nonvolatile memory comprising mini wells at a floating potential
US13/786,213 US8901634B2 (en) 2012-03-05 2013-03-05 Nonvolatile memory cells with a vertical selection gate of variable depth
US13/786,202 US8830761B2 (en) 2012-03-05 2013-03-05 Method of reading and writing nonvolatile memory cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1251969A FR2987696B1 (fr) 2012-03-05 2012-03-05 Procede de lecture ecriture de cellules memoire non volatiles

Publications (2)

Publication Number Publication Date
FR2987696A1 FR2987696A1 (fr) 2013-09-06
FR2987696B1 true FR2987696B1 (fr) 2014-11-21

Family

ID=45954981

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1251969A Expired - Fee Related FR2987696B1 (fr) 2012-03-05 2012-03-05 Procede de lecture ecriture de cellules memoire non volatiles

Country Status (2)

Country Link
US (1) US8830761B2 (fr)
FR (1) FR2987696B1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013084318A (ja) * 2011-10-06 2013-05-09 Toshiba Corp 不揮発性半導体記憶装置
FR3021804B1 (fr) 2014-05-28 2017-09-01 Stmicroelectronics Rousset Cellule memoire non volatile duale comprenant un transistor d'effacement
FR3021803B1 (fr) 2014-05-28 2017-10-13 Stmicroelectronics Rousset Cellules memoire jumelles accessibles individuellement en lecture
FR3021806B1 (fr) * 2014-05-28 2017-09-01 St Microelectronics Sa Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee
FR3025353B1 (fr) 2014-09-03 2016-09-09 Stmicroelectronics Rousset Memoire non volatile composite a effacement par page ou par mot
FR3025649B1 (fr) 2014-09-09 2016-12-09 Stmicroelectronics Rousset Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales
FR3029343B1 (fr) * 2014-11-27 2018-03-30 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire de type electriquement effacable et programmable
FR3036221B1 (fr) * 2015-05-11 2017-04-28 Stmicroelectronics Rousset Structure d'interconnexion de cellules memoire jumelles
FR3059458B1 (fr) * 2016-11-25 2019-03-29 Stmicroelectronics (Rousset) Sas Dispositif compact de memoire non volatile du type a piegeages de charge dans une interface dielectrique
FR3070537A1 (fr) 2017-08-28 2019-03-01 Stmicroelectronics (Rousset) Sas Memoire non-volatile a encombrement restreint
FR3071355B1 (fr) * 2017-09-20 2019-08-30 Stmicroelectronics (Rousset) Sas Cellule-memoire eeprom compacte
FR3080949B1 (fr) * 2018-05-04 2021-05-28 St Microelectronics Rousset Dispositif de memoire non volatile du type a piegeage de charges et procede de fabrication
JP2021093230A (ja) * 2019-12-10 2021-06-17 キオクシア株式会社 半導体記憶装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW546778B (en) * 2001-04-20 2003-08-11 Koninkl Philips Electronics Nv Two-transistor flash cell
US6906376B1 (en) * 2002-06-13 2005-06-14 A Plus Flash Technology, Inc. EEPROM cell structure and array architecture
US6894339B2 (en) * 2003-01-02 2005-05-17 Actrans System Inc. Flash memory with trench select gate and fabrication process
US20090003074A1 (en) * 2006-03-30 2009-01-01 Catalyst Semiconductor, Inc. Scalable Electrically Eraseable And Programmable Memory (EEPROM) Cell Array
US8139408B2 (en) * 2006-09-05 2012-03-20 Semiconductor Components Industries, L.L.C. Scalable electrically eraseable and programmable memory
KR100764060B1 (ko) * 2006-09-29 2007-10-09 삼성전자주식회사 불휘발성 메모리 장치 및 시스템 그리고 그것을 위한메모리 셀 어레이 구조
US8120095B2 (en) 2007-12-13 2012-02-21 International Business Machines Corporation High-density, trench-based non-volatile random access SONOS memory SOC applications

Also Published As

Publication number Publication date
FR2987696A1 (fr) 2013-09-06
US8830761B2 (en) 2014-09-09
US20130229875A1 (en) 2013-09-05

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