FR3025649B1 - Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales - Google Patents

Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales

Info

Publication number
FR3025649B1
FR3025649B1 FR1458431A FR1458431A FR3025649B1 FR 3025649 B1 FR3025649 B1 FR 3025649B1 FR 1458431 A FR1458431 A FR 1458431A FR 1458431 A FR1458431 A FR 1458431A FR 3025649 B1 FR3025649 B1 FR 3025649B1
Authority
FR
France
Prior art keywords
polarizing
volatile memory
vertical selection
buried source
selection grids
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1458431A
Other languages
English (en)
Other versions
FR3025649A1 (fr
Inventor
Rosa Francesco La
Stephan Niel
Arnaud Regnier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1458431A priority Critical patent/FR3025649B1/fr
Priority to US14/810,283 priority patent/US9368215B2/en
Publication of FR3025649A1 publication Critical patent/FR3025649A1/fr
Application granted granted Critical
Publication of FR3025649B1 publication Critical patent/FR3025649B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/24Bit-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
FR1458431A 2014-09-09 2014-09-09 Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales Expired - Fee Related FR3025649B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1458431A FR3025649B1 (fr) 2014-09-09 2014-09-09 Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales
US14/810,283 US9368215B2 (en) 2014-09-09 2015-07-27 Method for biasing an embedded source plane of a non-volatile memory having vertical select gates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1458431A FR3025649B1 (fr) 2014-09-09 2014-09-09 Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales

Publications (2)

Publication Number Publication Date
FR3025649A1 FR3025649A1 (fr) 2016-03-11
FR3025649B1 true FR3025649B1 (fr) 2016-12-09

Family

ID=51726812

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1458431A Expired - Fee Related FR3025649B1 (fr) 2014-09-09 2014-09-09 Procede de polarisation d’un plan de source enterre d’une memoire non volatile a grilles de selection verticales

Country Status (2)

Country Link
US (1) US9368215B2 (fr)
FR (1) FR3025649B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3021806B1 (fr) * 2014-05-28 2017-09-01 St Microelectronics Sa Procede de programmation d'une cellule memoire non volatile comprenant une grille de transistor de selection partagee
CN108806751B (zh) * 2017-04-26 2021-04-09 中芯国际集成电路制造(上海)有限公司 多次可程式闪存单元阵列及其操作方法、存储器件
CN108986861B (zh) * 2017-06-02 2023-09-26 三星电子株式会社 对非易失性存储器装置进行编程的方法
US10276582B2 (en) * 2017-08-21 2019-04-30 Globalfoundries Singapore Pte. Ltd. High coupling ratio split gate memory cell
US10847210B2 (en) * 2018-04-09 2020-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Memory device with fly word line
US10734398B2 (en) * 2018-08-29 2020-08-04 Taiwan Semiconductor Manufacturing Co., Ltd. Flash memory structure with enhanced floating gate
JP2021193698A (ja) * 2020-06-08 2021-12-23 セイコーエプソン株式会社 半導体記憶装置及び電子機器
FR3125351B1 (fr) * 2021-07-13 2023-06-23 St Microelectronics Rousset Dispositif de mémoire non volatile lisible uniquement un nombre de fois prédéterminé

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US5182725A (en) * 1987-11-20 1993-01-26 Mitsubishi Denki Kabushiki Kaisha Nonvolatile semiconductor memory device with reduced variation in source potential of floating gate type memory transistor and operating method therefor
JP3999900B2 (ja) * 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
US6788576B2 (en) 2002-10-28 2004-09-07 Tower Semiconductor Ltd. Complementary non-volatile memory cell
US6894339B2 (en) * 2003-01-02 2005-05-17 Actrans System Inc. Flash memory with trench select gate and fabrication process
US8139408B2 (en) * 2006-09-05 2012-03-20 Semiconductor Components Industries, L.L.C. Scalable electrically eraseable and programmable memory
JP4907563B2 (ja) * 2008-01-16 2012-03-28 パナソニック株式会社 半導体記憶装置
US8274829B2 (en) * 2008-06-09 2012-09-25 Aplus Flash Technology, Inc. Row-decoder and source-decoder structures suitable for erase in unit of page, sector and chip of a NOR-type flash operating below +/− 10V BVDS
KR20100115612A (ko) * 2009-04-20 2010-10-28 삼성전자주식회사 프로그램 디스터브를 줄일 수 있는 비휘발성 반도체 메모리 장치 및 이 장치의 프로그램 방법
US20110096609A1 (en) * 2009-10-23 2011-04-28 Aplus Flash Technology, Inc. Novel punch-through free program scheme for nt-string flash design
WO2012033533A1 (fr) * 2010-09-09 2012-03-15 Aplus Flash Technology, Inc. Conception d'une mémoire non volatile combinée à base flotox compacte sans sacrifier les cycles d'endurance de la mémoire morte effaçable et programmable électriquement pour un stockage de code et de données dans une seule matrice
US8923049B2 (en) * 2011-09-09 2014-12-30 Aplus Flash Technology, Inc 1T1b and 2T2b flash-based, data-oriented EEPROM design
WO2013079020A1 (fr) 2011-12-02 2013-06-06 Tsinghua University Structure matricielle de mémoire flash non-ou, mémoire flash non volatile mélangée, et système de mémoire comprenant ces mémoires
US8901634B2 (en) 2012-03-05 2014-12-02 Stmicroelectronics (Rousset) Sas Nonvolatile memory cells with a vertical selection gate of variable depth
FR2987696B1 (fr) * 2012-03-05 2014-11-21 St Microelectronics Rousset Procede de lecture ecriture de cellules memoire non volatiles
JP5627624B2 (ja) * 2012-03-16 2014-11-19 株式会社東芝 プログラマブルロジックデバイス
JP5972700B2 (ja) * 2012-07-31 2016-08-17 ルネサスエレクトロニクス株式会社 メモリ装置
US9142306B2 (en) * 2013-01-11 2015-09-22 Atmel Corporation Selecting memory cells using source lines
JP2015185180A (ja) * 2014-03-20 2015-10-22 株式会社東芝 コンフィギュレーションメモリ
US9508396B2 (en) * 2014-04-02 2016-11-29 Ememory Technology Inc. Array structure of single-ploy nonvolatile memory
KR102185079B1 (ko) * 2014-04-21 2020-12-01 에스케이하이닉스 주식회사 불휘발성 메모리소자 및 그 동작방법

Also Published As

Publication number Publication date
FR3025649A1 (fr) 2016-03-11
US20160071598A1 (en) 2016-03-10
US9368215B2 (en) 2016-06-14

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