DE69224716T2 - Elektrisch löschbare und programmierbare Nur-Lese-Speicher mit Source- und Drain-Bereichen entlang Seitenwänden einer Grabenstruktur - Google Patents
Elektrisch löschbare und programmierbare Nur-Lese-Speicher mit Source- und Drain-Bereichen entlang Seitenwänden einer GrabenstrukturInfo
- Publication number
- DE69224716T2 DE69224716T2 DE69224716T DE69224716T DE69224716T2 DE 69224716 T2 DE69224716 T2 DE 69224716T2 DE 69224716 T DE69224716 T DE 69224716T DE 69224716 T DE69224716 T DE 69224716T DE 69224716 T2 DE69224716 T2 DE 69224716T2
- Authority
- DE
- Germany
- Prior art keywords
- memory
- source
- side walls
- drain regions
- programmable read
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/810,250 US5278438A (en) | 1991-12-19 | 1991-12-19 | Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69224716D1 DE69224716D1 (de) | 1998-04-16 |
DE69224716T2 true DE69224716T2 (de) | 1998-09-17 |
Family
ID=25203389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69224716T Expired - Fee Related DE69224716T2 (de) | 1991-12-19 | 1992-12-15 | Elektrisch löschbare und programmierbare Nur-Lese-Speicher mit Source- und Drain-Bereichen entlang Seitenwänden einer Grabenstruktur |
Country Status (5)
Country | Link |
---|---|
US (1) | US5278438A (de) |
EP (1) | EP0547711B1 (de) |
JP (1) | JPH05275713A (de) |
DE (1) | DE69224716T2 (de) |
TW (1) | TW230832B (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10214126A1 (de) * | 2002-03-28 | 2003-10-23 | Infineon Technologies Ag | Herstellungsverfahren für eine Mehrzahl von ungefähr gleich hohen und gleich beabstandeten Gatestapeln auf einem Halbleitersubstrat |
Families Citing this family (59)
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US6081449A (en) * | 1987-05-12 | 2000-06-27 | Altera Corporation | High-density nonvolatile memory cell |
US5391506A (en) * | 1992-01-31 | 1995-02-21 | Kawasaki Steel Corporation | Manufacturing method for semiconductor devices with source/drain formed in substrate projection. |
US5467305A (en) * | 1992-03-12 | 1995-11-14 | International Business Machines Corporation | Three-dimensional direct-write EEPROM arrays and fabrication methods |
US5297082A (en) * | 1992-11-12 | 1994-03-22 | Micron Semiconductor, Inc. | Shallow trench source eprom cell |
JP3431198B2 (ja) * | 1993-02-26 | 2003-07-28 | 株式会社東芝 | 半導体記憶装置およびその製造方法 |
TW299475B (de) * | 1993-03-30 | 1997-03-01 | Siemens Ag | |
US5430673A (en) * | 1993-07-14 | 1995-07-04 | United Microelectronics Corp. | Buried bit line ROM with low bit line resistance |
US5387534A (en) * | 1994-05-05 | 1995-02-07 | Micron Semiconductor, Inc. | Method of forming an array of non-volatile sonos memory cells and array of non-violatile sonos memory cells |
US5740105A (en) * | 1994-05-27 | 1998-04-14 | Texas Instruments Incorporated | Memory cell array with LOCOS free isolation |
US5554568A (en) * | 1994-12-27 | 1996-09-10 | United Microelectronics Corporation | Polysilicon trench and buried polysilicon wall device structures |
KR0179807B1 (ko) * | 1995-12-30 | 1999-03-20 | 문정환 | 반도체 기억소자 제조방법 |
JPH09275196A (ja) * | 1996-04-03 | 1997-10-21 | Sony Corp | 半導体装置及びその製造方法 |
US5849621A (en) * | 1996-06-19 | 1998-12-15 | Advanced Micro Devices, Inc. | Method and structure for isolating semiconductor devices after transistor formation |
US6060358A (en) * | 1997-10-21 | 2000-05-09 | International Business Machines Corporation | Damascene NVRAM cell and method of manufacture |
SE513471C2 (sv) | 1997-11-17 | 2000-09-18 | Ericsson Telefon Ab L M | Halvledarkomponent och tillverkningsförfarande för halvledarkomponent |
US5981341A (en) * | 1997-12-05 | 1999-11-09 | Advanced Micro Devices | Sidewall spacer for protecting tunnel oxide during isolation trench formation in self-aligned flash memory core |
US5960284A (en) * | 1997-12-05 | 1999-09-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming vertical channel flash memory cell and device manufactured thereby |
US6555867B1 (en) * | 1997-12-16 | 2003-04-29 | Advanced Micro Devices, Inc. | Flash memory gate coupling using HSG polysilicon |
US6803273B1 (en) * | 1997-12-23 | 2004-10-12 | Texas Instruments Incorporated | Method to salicide source-line in flash memory with STI |
JP2002508594A (ja) | 1998-03-24 | 2002-03-19 | インフィニオン テクノロジーズ アクチエンゲゼルシャフト | メモリセル装置及びその製造方法 |
WO1999049517A1 (de) * | 1998-03-24 | 1999-09-30 | Siemens Aktiengesellschaft | Speicherzellenanordnung und verfahren zu ihrer herstellung |
US6225659B1 (en) * | 1998-03-30 | 2001-05-01 | Advanced Micro Devices, Inc. | Trenched gate semiconductor device and method for low power applications |
US6242302B1 (en) * | 1998-09-03 | 2001-06-05 | Micron Technology, Inc. | Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry |
US6330181B1 (en) | 1998-09-29 | 2001-12-11 | Texas Instruments Incorporated | Method of forming a gate device with raised channel |
US6423596B1 (en) | 1998-09-29 | 2002-07-23 | Texas Instruments Incorporated | Method for two-sided fabrication of a memory array |
KR100543637B1 (ko) * | 1998-12-29 | 2006-03-28 | 주식회사 하이닉스반도체 | 플래쉬 메모리 소자의 제조 방법 |
JP3147108B2 (ja) * | 1999-01-20 | 2001-03-19 | 日本電気株式会社 | 半導体記憶装置の製造方法 |
US6316806B1 (en) * | 1999-03-31 | 2001-11-13 | Fairfield Semiconductor Corporation | Trench transistor with a self-aligned source |
TW427018B (en) * | 1999-04-07 | 2001-03-21 | United Microelectronics Corp | Manufacturing method of flash memory cell |
US6177317B1 (en) * | 1999-04-14 | 2001-01-23 | Macronix International Co., Ltd. | Method of making nonvolatile memory devices having reduced resistance diffusion regions |
US6300179B1 (en) * | 1999-09-24 | 2001-10-09 | Texas Instruments Incorporated | Gate device with access channel formed in discrete post and method |
JP2001189439A (ja) * | 2000-01-05 | 2001-07-10 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置の製造方法及び不揮発性半導体記憶装置 |
DE10131705B4 (de) | 2001-06-29 | 2010-03-18 | Atmel Automotive Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
DE10131704A1 (de) * | 2001-06-29 | 2003-01-16 | Atmel Germany Gmbh | Verfahren zur Dotierung eines Halbleiterkörpers |
DE10131707B4 (de) | 2001-06-29 | 2009-12-03 | Atmel Automotive Gmbh | Verfahren zur Herstellung eines DMOS-Transistors und dessen Verwendung zur Herstellung einer integrierten Schaltung |
DE10131706B4 (de) | 2001-06-29 | 2005-10-06 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors |
US6566200B2 (en) * | 2001-07-03 | 2003-05-20 | Texas Instruments Incorporated | Flash memory array structure and method of forming |
JP2003174106A (ja) * | 2001-12-07 | 2003-06-20 | Fujitsu Ltd | 半導体装置及びその製造方法 |
KR100414735B1 (ko) * | 2001-12-10 | 2004-01-13 | 주식회사 하이닉스반도체 | 반도체소자 및 그 형성 방법 |
DE10200678B4 (de) * | 2002-01-10 | 2006-05-11 | Infineon Technologies Ag | Verfahren zum Bearbeiten eines Substrats zum Ausbilden einer Struktur |
US6830975B2 (en) * | 2002-01-31 | 2004-12-14 | Micron Technology, Inc. | Method of forming field effect transistor comprising at least one of a conductive metal or metal compound in electrical connection with transistor gate semiconductor material |
KR100462175B1 (ko) * | 2002-02-08 | 2004-12-16 | 삼성전자주식회사 | 부유게이트를 갖는 비휘발성 메모리 소자의 셀 및 그제조방법 |
JP3967193B2 (ja) * | 2002-05-21 | 2007-08-29 | スパンション エルエルシー | 不揮発性半導体記憶装置及びその製造方法 |
DE10226964A1 (de) * | 2002-06-17 | 2004-01-08 | Infineon Technologies Ag | Verfahren zur Herstellung einer NROM-Speicherzellenanordnung |
US7019353B2 (en) * | 2002-07-26 | 2006-03-28 | Micron Technology, Inc. | Three dimensional flash cell |
US6756303B1 (en) * | 2002-07-31 | 2004-06-29 | Advanced Micro Devices, Inc. | Diffusion barrier and method for its production |
CN1745473B (zh) * | 2003-01-30 | 2010-04-14 | 因芬尼昂技术股份公司 | 统一信道程序闪存位线制造方法 |
US7078349B2 (en) * | 2003-07-31 | 2006-07-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method to form self-aligned floating gate to diffusion structures in flash |
DE10345347A1 (de) | 2003-09-19 | 2005-04-14 | Atmel Germany Gmbh | Verfahren zur Herstellung eines DMOS-Transistors mit lateralem Driftregionen-Dotierstoffprofil |
US8236646B2 (en) * | 2003-11-06 | 2012-08-07 | Globalfoundries Singapore Pte. Ltd. | Non-volatile memory manufacturing method using STI trench implantation |
US7049652B2 (en) * | 2003-12-10 | 2006-05-23 | Sandisk Corporation | Pillar cell flash memory technology |
WO2005065179A2 (en) * | 2003-12-19 | 2005-07-21 | Third Dimension (3D) Semiconductor, Inc. | Method of manufacturing a superjunction device |
US7262089B2 (en) | 2004-03-11 | 2007-08-28 | Micron Technology, Inc. | Methods of forming semiconductor structures |
US7256112B2 (en) * | 2005-01-20 | 2007-08-14 | Chartered Semiconductor Manufacturing, Ltd | Laser activation of implanted contact plug for memory bitline fabrication |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
US8012830B2 (en) | 2007-08-08 | 2011-09-06 | Spansion Llc | ORO and ORPRO with bit line trench to suppress transport program disturb |
FR3012672B1 (fr) | 2013-10-31 | 2017-04-14 | Stmicroelectronics Rousset | Cellule memoire comprenant des grilles de controle horizontale et verticale non auto-alignees |
FR3017746B1 (fr) * | 2014-02-18 | 2016-05-27 | Stmicroelectronics Rousset | Cellule memoire verticale ayant un implant drain-source flottant non auto-aligne |
EP4297548A1 (de) * | 2022-06-16 | 2023-12-27 | STMicroelectronics Crolles 2 SAS | Verfahren zur herstellung elektronischer bauelemente |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5630768A (en) * | 1979-08-20 | 1981-03-27 | Matsushita Electric Ind Co Ltd | Manufacture of mnos type semiconductor device |
US5043787A (en) * | 1980-12-29 | 1991-08-27 | Rockwell International Corporation | Extremely small area npn lateral transistor |
JPS6398124A (ja) * | 1986-10-15 | 1988-04-28 | Hitachi Ltd | 半導体装置の製造方法 |
US4797718A (en) * | 1986-12-08 | 1989-01-10 | Delco Electronics Corporation | Self-aligned silicon MOS device |
JPH0812885B2 (ja) * | 1987-03-03 | 1996-02-07 | 日本電気株式会社 | 不揮発性半導体記憶素子 |
US4912535A (en) * | 1987-08-08 | 1990-03-27 | Mitsubishi Denki Kabushiki Kaisha | Trench type semiconductor memory device having side wall contact |
JPH0752767B2 (ja) * | 1987-11-11 | 1995-06-05 | 日本電気株式会社 | 不揮発生半導体装置の製造方法 |
JPH027475A (ja) * | 1988-06-25 | 1990-01-11 | Matsushita Electron Corp | 電界効果トランジスタ |
US5084418A (en) * | 1988-12-27 | 1992-01-28 | Texas Instruments Incorporated | Method of making an array device with buried interconnects |
US5218221A (en) * | 1989-10-20 | 1993-06-08 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and manufacturing method thereof |
US5053839A (en) * | 1990-01-23 | 1991-10-01 | Texas Instruments Incorporated | Floating gate memory cell and device |
-
1991
- 1991-12-19 US US07/810,250 patent/US5278438A/en not_active Expired - Lifetime
-
1992
- 1992-12-15 EP EP92203931A patent/EP0547711B1/de not_active Expired - Lifetime
- 1992-12-15 DE DE69224716T patent/DE69224716T2/de not_active Expired - Fee Related
- 1992-12-21 JP JP4340571A patent/JPH05275713A/ja active Pending
-
1993
- 1993-01-30 TW TW082100594A patent/TW230832B/zh active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10214126A1 (de) * | 2002-03-28 | 2003-10-23 | Infineon Technologies Ag | Herstellungsverfahren für eine Mehrzahl von ungefähr gleich hohen und gleich beabstandeten Gatestapeln auf einem Halbleitersubstrat |
US7129155B2 (en) | 2002-03-28 | 2006-10-31 | Infineon Technologies Ag | Process for producing a plurality of gate stacks which are approximately the same height and equidistant on a semiconductor substrate |
Also Published As
Publication number | Publication date |
---|---|
EP0547711A2 (de) | 1993-06-23 |
DE69224716D1 (de) | 1998-04-16 |
US5278438A (en) | 1994-01-11 |
EP0547711A3 (en) | 1993-11-10 |
TW230832B (de) | 1994-09-21 |
EP0547711B1 (de) | 1998-03-11 |
JPH05275713A (ja) | 1993-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |