TW201710540A - 積體電路製造中使用的氮氧化鈦沈積的製程 - Google Patents

積體電路製造中使用的氮氧化鈦沈積的製程 Download PDF

Info

Publication number
TW201710540A
TW201710540A TW105125546A TW105125546A TW201710540A TW 201710540 A TW201710540 A TW 201710540A TW 105125546 A TW105125546 A TW 105125546A TW 105125546 A TW105125546 A TW 105125546A TW 201710540 A TW201710540 A TW 201710540A
Authority
TW
Taiwan
Prior art keywords
titanium oxynitride
titanium
reactant
substrate
oxynitride film
Prior art date
Application number
TW105125546A
Other languages
English (en)
Other versions
TWI702303B (zh
Inventor
維爾傑米 J. 波爾
誠司 大倉
秀美 末盛
Original Assignee
Asm Ip控股公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asm Ip控股公司 filed Critical Asm Ip控股公司
Publication of TW201710540A publication Critical patent/TW201710540A/zh
Application granted granted Critical
Publication of TWI702303B publication Critical patent/TWI702303B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308Oxynitrides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45531Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations specially adapted for making ternary or higher compositions
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45534Use of auxiliary reactants other than used for contributing to the composition of the main film, e.g. catalysts, activators or scavengers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536Use of plasma, radiation or electromagnetic fields
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536Use of plasma, radiation or electromagnetic fields
    • C23C16/4554Plasma being used non-continuously in between ALD reactions
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45527Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45536Use of plasma, radiation or electromagnetic fields
    • C23C16/45542Plasma being used non-continuously during the ALD reactions
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • C23C16/45553Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02153Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing titanium, e.g. TiSiOx
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02592Microstructure amorphous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

本發明提供一種可例如在積體電路製造中(諸如在間距倍增製程中形成間隔件時)使用的沈積實質上非晶形氮氧化鈦薄膜的製程。所述製程包括使基板與鈦反應物接觸以及移除過量鈦反應物以及反應副產物(若存在)。所述基板隨後與包括由電漿產生的反應性物質的第二反應物接觸,其中所述反應性物質中的一者包括氮。移除所述第二反應物以及反應副產物(若存在)。重複接觸步驟以及移除步驟,直至已形成所要厚度的氮氧化鈦薄膜為止。

Description

積體電路製造中使用的氮氧化鈦沈積的製程
本發明大體上是關於半導體裝置製造的領域,且更特定而言是關於氮氧化鈦(titanium oxynitride;TiOx Ny )沈積。可(例如)在用於形成積體電路的製程中使用氮氧化鈦。
極其需要減小積體電路的大小。此需求(例如)來自對增加的可攜性、增加的計算能力、增加的記憶體容量以及增加的能量效率的需要。為了減小積體電路的大小,(例如)必須亦減小組成特徵、電裝置以及互連線的大小。
對縮小的大小的需要已使行業不斷減小積體電路的組成特徵大小。舉例而言,諸如動態隨機存取記憶體(dynamic random access memories;DRAM)、快閃記憶體、靜態隨機存取記憶體(static random access memories;SRAM)、鐵電(ferroelectric;FE)記憶體的記憶電路或裝置不斷被製造得更小。
一個實例,DRAM通常包括數百萬個相同電路元件,所述電路元件被稱為記憶體單元。在其最一般形式中,記憶體單元通常由兩個電裝置組成:儲存電容器以及存取場效電晶體。每一記憶體單元為可儲存一個資料位元(二進位數字)的可定址位置。位元可經由電晶體寫入至單元,且可藉由感測電容器中的電荷而讀取。藉由減小構成(例如)記憶體單元的電裝置的大小以及存取記憶體單元的導電線的大小,可將記憶體裝置製造得較小。另外,可藉由將較多記憶體單元裝配於記憶體裝置中的給定面積上而增加儲存容量。
特徵大小的不斷減小對用於形成特徵的技術提出越來越高的需求。光微影(例如)常用於圖案化特徵,諸如導電線。當處理光微影時,可使用間距(pitch)的概念來描述此等特徵的大小。間距被定義為兩個相鄰特徵中的相同點之間的距離。此等特徵通常由其自身之間的間隔定義,所述間隔通常由諸如絕緣體的材料填充。因此,間距可被視為特徵的寬度與特徵一側上的間隔(其將所述特徵與相鄰特徵分開)的寬度的總和。然而,歸因於諸如光學件或技術中所使用的光的波長的因素,光微影技術各自具有最小間距,低於所述最小間距,則特定光微影技術無法可靠地形成特徵。因此,光微影技術的最小間距為繼續減小特徵大小的障礙。
間距加倍、間距倍增或間隔件定義的雙倍/四倍圖案化為用於將光微影技術的能力擴展超出其最小間距的方法。在間距加倍製程期間,間隔件膜層形成或沈積於現有遮罩特徵之上。隨後較佳使用方向性蝕刻(諸如,反應性離子蝕刻)來蝕刻間隔件膜,從而僅保留間隔件或自原始遮罩特徵的側壁延伸或形成的材料。在移除原始遮罩特徵後,僅間隔件保持在基板上。因此,在給定間距先前包含定義一個特徵以及一個間隔的圖案的情況下,相同寬度現包含兩個特徵以及兩個間隔,其中在此情況下,所述間隔由間隔件定義。因此,光微影技術的最小可能特徵大小有效減小。雖然在以上實例中,間距實際上減半,但此間距減小被稱作間距「加倍(doubling)」,因為特徵的線性密度已加倍。可額外多次執行如上文所描述的製程,從而將新形成的間隔件用作原始遮罩特徵以再次將間距減半或使特徵的線性密度成四倍。
在間隔件應用中,諸如在如上文所描述的間距倍增製程中,裝置製造需要具有特定蝕刻特性的材料。間距倍增製程中的原始遮罩特徵通常為熱二氧化矽(silicon dioxide;SiO2 ),氫氟酸用於蝕刻或移除遮罩特徵。較佳地,熱SiO2 遮罩特徵被完全蝕刻掉而間隔件材料保持完整。因此,需要在氫氟酸中的蝕刻速率比熱SiO2 更低的間隔件膜材料。
另外,因為間隔件形成於經預圖案化特徵的側壁上,所以間隔件膜較佳為保形的。為了達成此保形性,通常使用諸如原子層沈積(atomic layer deposition;ALD)或電漿增強原子層沈積(plasma enhanced atomic layer deposition;PEALD)的沈積技術。間距倍增製程中所使用範本材料(諸如,SOC材料)亦可降低所允許的熱預算,從而有利於較低溫度的沈積技術,如PEALD。
二氧化鈦(titanium dioxide;TiO2 )為與熱SiO2 相比具有有利蝕刻選擇性的材料,且可藉由PEALD在相對低的溫度下保形地生長。肆(二甲胺基)鈦(tetrakis(dimethylamido)titanium;TDMAT)或其他烷基醯胺通常被用作鈦前驅體,而O2 電漿通常被用作氧前驅體。然而,TiO2 易於結晶,從而導致間隔件膜粗糙,所述粗糙使得對於預期用途而言所得間隔件為不可接受的。儘管在一些條件下,平滑、非晶形的TiO2 可能生長為薄膜,但其厚度可能難以生長至多達約20 nm,且超過所述厚度時,更厚TiO2 膜的生長幾乎必然導致結晶。
因此,需要形成或沈積平滑且非晶形但能夠沈積成大於本領域中已知的厚度同時仍保持有利的對SiO2 的蝕刻選擇性的保形薄膜的製程。
根據本發明的一個態樣,提供用於沈積可(例如)在積體電路製造中使用的氮氧化鈦薄膜的製程。所述製程包括使基板與鈦反應物接觸以及移除過量鈦反應物以及反應副產物(若存在),諸如藉由將基板曝露於沖洗氣體及/或真空。基板隨後與包括由電漿產生的多種反應性物質的第二反應物接觸,其中所述多種反應性物質包括氮以及氧。氮反應性物質對氧反應性物質的比率可為約1:2至約250:1。基板可曝露於沖洗氣體及/或真空以移除過量第二反應物以及反應副產物(若存在)。重複接觸步驟以及曝露步驟直至已形成所要厚度的氮氧化鈦薄膜為止。氮氧化鈦薄膜可包括約0.05原子%至約30原子%的氮。
在一些實施例中,可在積體電路製造中使用所述製程(例如)以形成間隔件。在一些實施例中,所述製程可用於形成在間距倍增製程中使用的間隔件。在一些實施例中,氮氧化鈦膜可為實質上非晶形的。在一些實施例中,基板可包括預先存在的遮罩特徵。在一些實施例中,鈦反應物可包括烷胺配位體。在一些實施例中,鈦反應物可包括Ti(NRI RII )4 ,其中RI 以及RII 可獨立選擇為烷基。在一些實施例中,第二反應物可包括氮前驅體以及氧前驅體。在一些實施例中,氮前驅體可包括N2 、NH3 或N2 H2 。在一些實施例中,氧前驅體可包括O2 。在一些實施例中,反應性物質可包括氮原子、氮離子、氮自由基或氮電漿,以及氧原子、氧自由基或氧電漿。在一些實施例中,沈積可在較佳約70℃至約200℃的溫度下進行。在一些實施例中,所述製程可為電漿增強原子層沈積製程。
根據本發明的另一態樣,提供用於沈積氮氧化鈦薄膜的製程。所述製程可包括至少一個沈積循環,每一循環包括交替且依序地使基板與鈦反應物以及包括多種反應性物質的第二反應物接觸,其中氮反應性物質對氧反應性物質的比率為約1:2至約250:1。氮氧化鈦薄膜可包括約0.05原子%至約30原子%的氮。
在一些實施例中,所述製程可用於形成供用於積體電路製造中的間隔件。在一些實施例中,鈦反應物可具有式Ti(NRI RII )4 ,其中RI 以及RII 可獨立選擇為Me或Et。在一些實施例中,第二反應物可包括氮前驅體以及氧前驅體。在一些實施例中,反應性物質可包括氮原子、氮離子、氮自由基或氮電漿,以及氧原子、氧自由基或氧電漿。在一些實施例中,所述製程可為電漿增強原子層沈積製程。
根據本發明的另一態樣,提供諸如在形成在間距倍增製程中使用的間隔件時在基板的三維特徵上沈積氧化鈦的製程。所述製程可包括經由PEALD在反應空間中的現有遮罩特徵之上保形地沈積實質上非晶形氮氧化鈦薄膜。優先自基板以及遮罩特徵的水平表面蝕刻保形氮氧化鈦薄膜。隨後優先蝕刻遮罩特徵,且沈積於遮罩特徵的垂直表面上或自遮罩特徵的垂直表面延伸的氮氧化鈦保持相對未蝕刻。
在一些實施例中,氮氧化鈦膜可用於形成間隔件。在一些實施例中,間隔件可用於間距倍增製程中。在一些實施例中,優先自水平表面蝕刻氮氧化鈦膜可包括反應性離子蝕刻。在一些實施例中,優先蝕刻遮罩特徵可包括氫氟酸濕式蝕刻。在一些實施例中,基板可包括矽。在一些實施例中,遮罩特徵可包括SiO2 。在一些實施例中,經由PEALD在反應空間中在基板上的現有遮罩特徵之上保形地沈積實質上非晶形氮氧化鈦薄膜可包括交替且依序地使基板與鈦反應物以及包括多種反應性物質的第二反應物接觸。在一些實施例中,第二反應性物質具有可為約1:2至約250:1的氮反應性物質對氧反應性物質的比率。在一些實施例中,氮氧化鈦薄膜可包括約0.05原子%至約30原子%的氮。
可藉由將外來原子添加至材料而抑制TiO2 薄膜的結晶。在本發明的較佳實施例中,在電漿增強原子層沈積(plasma enhanced atomic layer deposition;PEALD)期間氮原子存在於電漿中,從而沈積摻氮TiO2 或氮氧化鈦(titanium oxynitride;TiOx Ny )。藉由PEALD沈積的所得TiOx Ny 將比在相同沈積條件下生長的純TiO2 結晶更少。
在一些常見積體電路製造程序(例如,間距倍增製程)中,間隔件以及原始遮罩特徵同時曝露於蝕刻劑(通常為氫氟酸),蝕刻劑優先蝕刻原始遮罩特徵。因為二氧化鈦具有相對於矽類材料(諸如,二氧化矽)的蝕刻選擇性,所以可優先蝕刻SiO2 遮罩特徵,而已保形地沈積於遮罩特徵的側壁上的TiO2 間隔件可保持相對未蝕刻。因此,相對於SiO2的蝕刻選擇性是組成間隔件的任何材料的重要特性。儘管外來原子可引入至間隔件材料中,但重要的是此等外來原子並不顯著削弱間隔件材料的蝕刻選擇性。另外,根據本文中所描述的製程沈積的氮氧化鈦膜可適用作(例如)圖案化應用中的犧牲膜。
另外,鈦為嗜氧元素,意謂鈦優先與氧原子組合。因此,在PEALD製程期間在電漿中需要大的氮對氧比率,以便沈積材料中併入有足量氮的TiOx Ny 以達成平滑、非晶形膜。
鑒於此等困難,本文中所揭露的較佳實施例允許保形地沈積比純TiO2 結晶更少但仍保持相對於SiO2 的蝕刻選擇性的實質上非晶形TiOx Ny 薄膜。此等膜可用作(例如)圖案化應用中的犧牲膜以及積體電路形成中(諸如,間距倍增製程中)的間隔件。 PEALD製程
在一些實施例中,使用電漿增強ALD(plasma enhanced ALD;PEALD)製程來沈積TiOx Ny 膜。簡言之,基板或工件經受交替重複的表面反應。在一些實施例中,藉由重複ALD循環而形成薄TiOx Ny 膜。較佳地,為了形成TiOx Ny 膜,每一ALD循環包括至少兩個不同階段。接觸反應物以及自基板表面移除反應物可被視為一階段。在第一階段中,包括鈦的第一反應物與基板表面接觸且在基板上保形地形成不多於約一個單層。此反應物在本文中亦被稱作「鈦前驅體(titanium precursor)」、「含鈦前驅體(titanium-containing precursor)」或「鈦反應物(titanium reactant)」,且可為(例如)烷胺鈦化合物,諸如TDMAT。在第二階段中,包括一種反應性物質或多種反應性物質的第二反應物接觸基板表面,且可將經吸附鈦轉換成TiOx Ny 。在一些實施例中,第二反應物包括氧前驅體以及氮前驅體。在一些實施例中,反應性物質包括一或多種激發物質。在一些實施例中,第二反應物包括來自含氮以及氧的電漿的一或多種物質。在一些實施例中,第二反應物包括氮自由基、氮原子及/或氮電漿,以及氧自由基、氧原子及/或氧電漿。第二反應物可包括不是氮前驅體或氧前驅體的其他物質。在一些實施例中,第二反應物可包括氫電漿、氫自由基或呈一種形式或另一種形式的原子氫。在一些實施例中,第二反應物可包括例如作為自由基的、呈電漿形式或呈元素形式的來自惰性氣體的物質,所述惰性氣體諸如He、Ne、Ar、Kr或Xe,較佳Ar或He。此等來自惰性氣體的反應性物質未必為所沈積的膜貢獻材料,但可在一些情況下促進膜生長以及幫助電漿的形成及點火。在一些實施例中,第二反應物可包括充當第二反應物的運載氣體的氣體。在一些實施例中,用於形成電漿的運載氣體可貫穿整個沈積製程連續流動,但僅間歇地被激活。視需要可添加額外階段且可移除階段以調整最終膜的組成。
可藉助於運載氣體(諸如,Ar或He)提供反應物中的一或多者。在一些實施例中,藉助於運載氣體提供鈦前驅體以及第二反應物。在一些實施例中,可重疊或組合所述階段中的兩者。舉例而言,可在部分或完全重疊的脈衝中同時提供鈦前驅體以及第二反應物。另外,儘管被稱作第一階段以及第二階段以及第一反應物以及第二反應物,但可改變階段次序,且ALD循環可開始於所述階段中的任一者。亦即,除非另外指明,否則可按任何次序提供反應物,且所述製程可以任一種反應物開始。
在一些實施例中,基板與第一反應物接觸,且移動基板以使得其與第二反應物接觸。在一些實施例中,基板可在單一反應空間內移動。在一些實施例中,基板可自第一反應空間移動至不同的第二反應空間。
基板可包括各種類型的材料。基板可為(例如)半導體基板。在一些實施例中,基板可包括矽。在一些實施例中,基板可包括二氧化矽以及氮化矽中的至少一者。
如下文更詳細地論述,在一些實施例中,為了沈積TiOx Ny 膜,一或多個沈積循環以使基板表面與鈦前驅體接觸開始,接著與第二反應物接觸。在其他實施例中,沈積可以使表面與第二反應物接觸開始,接著與鈦前驅體接觸。
在一些實施例中,視需要,基板或工件的經暴露表面可經預處理以提供反應性位點以與ALD製程的第一階段反應。在一些實施例中,不需要單獨的預處理步驟。在一些實施例中,對基板進行預處理以提供所要表面終止狀態。在一些實施例中,藉由電漿預處理基板。
在反應物脈衝之間,通常自基板附近且詳言之自基板表面移除過量反應物以及反應副產物(若存在)。在一些實施例中,在反應物脈衝之間沖洗反應室,諸如藉由用惰性氣體沖洗。每一反應物的流動速率以及時間為可調的,正如移除步驟一樣,從而允許控制膜的品質以及各種性質。在一些其他實施例中,藉由阻止前驅體或反應物流動以及使運載氣體繼續流動至反應室中來沖洗反應室。在一些實施例中,藉由移動基板而自基板附近移除過量反應物以及反應副產物。在一些實施例中,基板在反應室內移動。在一些實施例中,基板自第一反應室移動至不同的第二反應室。
如上文所提及,在一些實施例中,在每一沈積循環期間或在整個ALD製程期間持續將運載氣體提供至反應室,且提供反應性物質。可藉由在氣體中產生電漿(在反應室中或反應室的上游)來提供反應性物質,且亦可藉由注入至運載氣體中來提供反應性物質。在一些實施例中,運載氣體可包括氦氣或氬氣。在一些實施例中,運載氣體亦可充當第一反應物及/或第二反應物(或反應性物質)的沖洗氣體。在一些實施例中,沖洗氣體可為反應物,例如,使第二反應物流動可充當第一鈦前驅體的沖洗氣體且亦可在電漿形成於氣體中時充當反應性物質。在一些實施例中,氮氣、氬氣或氦氣可充當第一前驅體的沖洗氣體以及用於將鈦前驅體轉換成TiOx Ny 膜的激發物質的源。
重複ALD循環,直至獲得所要厚度以及組成的膜為止。在一些實施例中,沈積參數(諸如流動速率、流動時間、接觸時間、沖洗時間、移除時間、RF功率、RF開啟時間及/或前驅體自身)可在ALD製程期間的一或多個沈積循環中被改變以便獲得具有所要特性的膜。
術語「脈衝(pulse)」可理解為包括將反應物饋入至反應室中且持續預定時間量。術語「脈衝(pulse)」不限制脈衝的長度或持續時間,且脈衝可為任何時間長度。
在一些實施例中,鈦前驅體首先接觸基板。在初始表面終止之後,視需要,基板與鈦前驅體接觸。根據一些實施例,鈦前驅體經由包括運載氣體流以及揮發性鈦物質(諸如,TDMAT)的第一鈦前驅體脈衝接觸基板,揮發性鈦物質與所關注的基板表面反應。因此,鈦前驅體吸附於此等基板表面上。第一前驅體使基板表面自飽和,使得第一前驅體脈衝的任何過量成分不進一步與由此製程形成的分子層反應。
鈦前驅體較佳以氣態形式接觸基板。出於本發明描述的目的,若鈦前驅體氣體在製程條件下所展現的蒸氣壓足以將所述物質以足以使暴露表面飽和的濃度輸送至基板,則鈦前驅體氣體被視為「揮發性的(volatile)」。在一些實施例中,藉由將鈦前驅體注入至運載氣體中,鈦前驅體接觸基板。在一些其他實施例中,鈦前驅體與任何運載氣體或惰性氣體流分開地接觸基板。
在一些實施例中,鈦前驅體接觸持續時間為約0.05秒至約10.0秒,較佳為約0.1秒至約5秒且更佳為約0.1秒至約1.0秒。較佳選擇條件使得鈦前驅體的不多於一個單層以自限制方式吸附於基板表面上。在一些實施例中,適當的鈦前驅體接觸持續時間可取決於特定環境而較長或較短。適當的接觸持續時間可由本領域的技術人員基於特定環境來容易地判定。
在足以使分子層吸附在基板表面上的充足時間之後,隨後自基板表面移除過量鈦前驅體。在一些實施例中,藉由阻止鈦前驅體流動同時使運載氣體或沖洗氣體在足以自反應空間擴散或沖洗過量反應物以及應物副產物(若存在)的充足時間中繼續流動來移除過量鈦前驅體。在一些實施例中,藉助於貫穿ALD循環流動的惰性氣體移除過量鈦前驅體。在一些實施例中,藉由阻止鈦前驅體流動以及開始流動運載氣體或沖洗氣體來移除鈦前驅體。在一些實施例中,藉由在反應室內移動基板而自基板表面移除鈦前驅體。在一些實施例中,藉由將基板自第一反應室移動至不同的第二反應室而自基板表面移除鈦前驅體。
在一些實施例中,鈦前驅體接觸持續時間為約0.05秒至約10.0秒,較佳為約0.1秒至約5秒且更佳為約0.1秒至約2.0秒。在一些實施例中,適當的鈦前驅體移除持續時間可取決於特定環境而較長或較短。適當的移除持續時間可由本領域的技術人員基於特定環境來容易地判定。典型前驅體沖洗持續時間亦為約0.1秒至約1.0秒。此前驅體沖洗持續時間亦取決於每一條件。
在第二階段中,多種反應性物質(諸如,包括氧反應性物質以及氮反應性物質的電漿)接觸基板的表面。在一些實施例中,運載氣體可在每一ALD循環期間持續流動至反應室。可藉由在反應室中或反應室的上游的第二反應物中產生電漿(例如,藉由使第二反應物流動通過遠端電漿產生器)而形成電漿。在一些實施例中,在流動的第二反應物中產生電漿。在一些實施例中,在對電漿點火或形成氮原子或氮自由基以及氧原子或氧自由基之前,第二反應物接觸基板的表面。在一些實施例中,藉由將第二反應物注入至運載氣體中而將第二反應物引入至反應室中。在一些其他實施例中,第二反應物與任何運載氣體或惰性氣體分開地接觸基板的表面。
在一些實施例中,鈦前驅體接觸持續時間為約0.05秒至約10.0秒,較佳為約0.1秒至約5秒且更佳為約0.1秒至約2.0秒。在一些實施例中,適當的第二反應接觸持續時間可取決於特定環境而較長或較短。適當的接觸持續時間可由本領域的技術人員基於特定環境來容易地判定。
在一些實施例中,基板可與第二反應物接觸,而鈦前驅體仍存在於基板表面處。在一些實施例中,在自基板的表面移除鈦前驅體之前,第二反應物可接觸基板。在一些實施例中,基板可與鈦前驅體接觸,而第二反應物仍存在於基板表面處。在一些實施例中,在自基板的表面移除第二反應物之前,鈦前驅體可接觸基板。
在足以使先前吸附的分子層完全飽和且與電漿脈衝反應的時間段之後,自基板表面移除任何過量反應物以及反應副產物。如同移除第一反應物/前驅體一樣,在一些實施例中,此步驟可包括阻止在第二反應物中產生反應性物質以及使運載氣體在足以使過量反應性物質以及揮發性反應副產物擴散開且自反應空間沖洗掉的時間段中繼續流動。在一些其他實施例中,移除可包括阻止在第二反應物中產生反應性物質,阻止第二反應物流動,以及使運載氣體繼續流動。在其他實施例中,阻止在第二反應物中產生反應性物質,且可使用單獨的沖洗氣體。在一些實施例中,阻止在第二反應物中產生反應性物質,阻止第二反應物流動至反應室中,且可使用單獨的沖洗氣體。在一些實施例中,移動基板以使得第二反應物/前驅體不再接觸基板。在一些實施例中,基板在反應室內移動。在一些實施例中,基板自第一反應室移動至不同的第二反應室。第二反應物電漿供應以及移除一起表示氮氧化鈦原子層沈積循環中的第二階段。
在一些實施例中,鈦前驅體接觸持續時間為約0.05秒至約10.0秒,較佳為約0.1秒至約5秒且更佳為約0.1秒至約2.0秒。在一些實施例中,適當的第二前驅體移除持續時間可取決於特定環境而較長或較短。適當的移除持續時間可由本領域的技術人員基於特定環境來容易地判定。可藉由將RF功率施加至第二反應物而產生電漿。可將RF功率施加至在第二反應物電漿脈衝時間期間流動的第二反應物、持續流動通過反應室的第二反應物及/或流動通過遠端電漿產生器的第二反應物。因此,在一些實施例中,在原位產生電漿,而在其他實施例中,遠端地產生電漿。在一些實施例中,施加至第二反應物的RF功率為約10 W至約2000 W,較佳為約100 W至約1000 W,且更佳為約200 W至約500 W。在一些實施例中,若需要,且(例如)若基板能承受而不損壞,則RF功率可大於2000 W。
兩個階段共同表示一個ALD循環,ALD循環經重複以形成所要厚度的TiOx Ny 薄膜。雖然在本文中提及ALD循環時通常以鈦前驅體階段開始,但預期在其他實施例中,所述循環可以第二反應物階段開始。本領域的技術人員將認識到,第一前驅體階段通常與前一個循環中的最後一個階段留下的終止狀態反應。因此,雖然若反應性物質階段為第一ALD循環中的第一階段,則無反應物可先前吸附在基板表面上或存在於反應空間中,但在後續循環中,反應性物質階段將有效地在鈦階段之後。
視需要可添加額外階段且可移除階段以調整最終膜的組成。在一些實施例中,可重疊或組合所述階段中的兩者。舉例而言,可在部分或完全重疊的脈衝中同時提供鈦前驅體以及第二反應物。另外,儘管被稱作第一階段以及第二階段以及第一反應物以及第二反應物,但可改變階段次序,且ALD循環可開始於所述階段中的任一者。亦即,除非另外指明,否則可按任何次序提供反應物,且所述製程可以任一種反應物開始。
根據本發明的一些實施例,可在約20℃至約500℃、較佳約20℃至約450℃、更佳約50℃至約300℃且最佳約70℃至約200℃範圍內的溫度下執行PEALD反應。在一些實施例中,可在約10 Pa至約2000 Pa、較佳約100 Pa至約1000 Pa、更佳約200 Pa至約400 Pa範圍內的壓力下執行PEALD反應。
圖1為通常說明根據本發明的一些實施例的可用於沈積氮氧化鈦薄膜的氮氧化鈦電漿增強ALD沈積循環的流程圖。根據某些實施例,藉由包括多個氮氧化鈦沈積循環的ALD型製程將氮氧化鈦薄膜形成於基板上,每一氮氧化鈦沈積循環100包括: (1)使基板與鈦反應物接觸110,以使得鈦化合物吸附在基板表面上; (2)自基板表面移除過量鈦前驅體以及任何副產物120; (3)使基板與包括由電漿產生的多種反應性物質的第二反應物接觸130,所述多種反應性物質包括氮以及氧;以及 (4)自基板表面移除過量第二反應物以及反應副產物140。
重複接觸步驟以及移除步驟150,直至獲得具有所要厚度以及組成的薄膜為止。
根據一些實施例,氮氧化鈦電漿增強ALD沈積循環可用於沈積氮氧化鈦薄膜。在某些實施例中,藉由包括多個氮氧化鈦沈積循環的ALD型製程將氮氧化鈦薄膜形成於基板上,每一氮氧化鈦沈積循環包括: (1)使基板與鈦反應物接觸,以使得鈦化合物吸附在基板表面上; (2)將基板曝露於沖洗氣體及/或真空; (3)使基板與包括由電漿產生的多種反應性物質的第二反應物接觸,所述多種反應性物質包括氮以及氧;以及 (4)將基板曝露於沖洗氣體及/或真空。
重複接觸步驟以及移除步驟,直至獲得具有所要厚度以及組成的薄膜為止。
在一些實施例中,將基板曝露於沖洗氣體及/或真空步驟可包括使惰性運載氣體繼續流動同時阻止前驅體或反應物流動。在一些實施例中,將基板曝露於沖洗氣體及/或真空步驟可包括阻止前驅體以及運載氣體流動至反應室中以及(例如)藉由真空泵抽空反應室。在一些實施例中,將基板曝露於沖洗氣體及/或真空步驟可包括將基板自第一反應室移動至含有沖洗氣體的不同的第二反應室。在一些實施例中,將基板曝露於沖洗氣體及/或真空步驟可包括將基板自第一反應室移動至真空下的不同的第二反應室。
在某些實施例中,藉由包括多個氮氧化鈦沈積循環的ALD型製程將氮氧化鈦薄膜形成於基板上,每一氮氧化鈦沈積循環包括:交替且依序地使基板與第一鈦反應物以及包括反應性物質的第二反應物接觸。在一些實施例中,第二反應性物質可包括 Ti前驅體
許多合適的鈦前驅體可用於本發明的PEALD製程中以用於形成TiOx Ny 。在一些實施例中,鈦前驅體包括有機金屬前驅體。在一些實施例中,鈦前驅體為四價(亦即,Ti具有氧化態+IV)。在一些實施例中,鈦前驅體包括至少一種烷基醯胺配位體。在一些實施例中,鈦前驅體包括至少一種鹵化物配位體。在一些實施例中,鈦前驅體不包括鹵化物配位體。在一些實施例中,鈦前驅體不包括四種鹵化物配位體。在一些實施例中,鈦前驅體可包括至少一種胺或烷胺配位體-NRI RII ,其中RI 以及RII 可獨立地選自烷基配位體,較佳選自乙基或甲基。在一些實施例中,鈦前驅體可包括至少一種烷氧化物配位體。在一些實施例中,鈦前驅體可包括混配化合物。在一些實施例中,鈦前驅體包括肆(二烷胺基)鈦化合物Ti(NRI RII )4 ,諸如肆(二甲胺基)鈦(tetrakis(dimethylamino)titanium;TDMAT)Ti(NMe2 )4
在一些實施例中,鈦前驅體包括鹵化物配位體。在一些實施例中,鈦前驅體包括TiCl4 、TiF4 、TiI4 、TiBr4 中的至少一者。在一些情況下,某些製程參數下(諸如,在高溫範圍下)的鹵化物配位體可促進TiO2 晶體結晶且增加薄膜粗糙度及/或降低平滑度。然而,在某些實施例中,可使用鹵化物配位體同時仍提供與類似厚度的純TiO2 膜相比減少的結晶以及粗糙度。
在一些實施例中,鈦前驅體包括至少一種烷基或經取代烷基配位體。在一些實施例中,鈦前驅體包括烷氧化物。在一些實施例中,鈦前驅體包括甲醇鈦Ti(OMe)4 、乙醇鈦Ti(OEt)4 以及異丙醇鈦(Ti(Oi Pr)4 或TTiP)中的至少一者。
在一些實施例中,鈦前驅體包括至少一種胺或烷胺配位體。在一些實施例中,鈦前驅體包括Ti(NMeEt)4 (TEMAT)、Ti(N(Et)2 )4 (TDEAT)以及Ti(N(Me)2 )4 (TDMAT)中的至少一者。
在一些實施例中,鈦前驅體包括混配前驅體。在一些實施例中,鈦前驅體包括Ti(Oi Pr)2 (dmae)2 、Ti(Me5 Cp)(OMe)3 、Ti(MeCp)(OMe)3 、TiCp(NMe2 )3 、Ti(Me5 Cp)(NMe2 )3 、Ti(mpd)(thd)2 以及Ti(Oi Pr)2 (thd)2 中的至少一者。在一些實施例中,鈦前驅體包括環配位體,諸如環戊二烯基或環戊二烯基配位體的衍生物。在一些實施例中,鈦前驅體具有至少一Ti-N鍵。在一些實施例中,鈦前驅體具有至少一-Ti-N-C-鍵結構。
在一些實施例中,在ALD階段期間,多於一種鈦前驅體可同時接觸基板表面。在一些實施例中,鈦前驅體可包括多於一種鈦反應物。在一些實施例中,第一鈦前驅體被用於第一ALD循環中,且不同的第二鈦前驅體被用於後續ALD循環中。在一些實施例中,在單一ALD階段期間可使用多種鈦前驅體,(例如)以便使經沈積TiOx Ny 膜的某些性質最佳化。 第二反應物
如上文所論述,根據本發明的用於形成TiOx Ny 的PEALD製程中的第二反應物可包括氮前驅體以及氧前驅體,第二反應物可包括自氧前驅體以及氮前驅體產生的電漿。合適的電漿組成物包含氮電漿、氮自由基或原子氮,以及氧電漿、氧自由基或呈一種形式或另一種形式的原子氧。在一些實施例中,電漿亦可含有氫,諸如氫電漿、氫自由基或呈一種形式或另一種形式的原子氫。且在一些實施例中,電漿亦可含有呈電漿形式、作為自由基或呈原子形式的惰性氣體,諸如He、Ne、Ar、Kr以及Xe,較佳Ar或He。在一些實施例中,第二反應物不包括來自惰性氣體(諸如,Ar)的任何物質。因此,在一些實施例中,在包括惰性氣體的氣體中不產生電漿。
在一些實施例中,第二反應物可包括自具有N的化合物以及具有O的化合物兩者(諸如N2 與O2 的混合物,或NH3 與O2 的混合物)形成的電漿。在一些實施例中,第二反應物可包括來自具有O的化合物的電漿,且可不包括具有N的化合物。在一些實施例中,第二反應物可至少部分地自含N化合物以及含O化合物形成,其中含N化合物以及含O化合物以約1:1至約100:1、較佳約10:1至約30:1的比率(含N化合物/含O化合物)提供。在一些實施例中,比率為約1:2至約250:1。在一些實施例中,比率為約19:1。在一些實施例中,第二反應物可至少部分地自N2 以及O2 形成,其中N2 以及O2 以約1:1至約100:1、較佳約10:1至約30:1的比率(N2 /O2 )提供。在一些實施例中,第二反應物可至少部分地自NH3 以及O2 形成,其中NH3 以及O2 以約1:1至約100:1、較佳約10:1至約30:1的比率(NH3 /O2 )提供。
在經沈積膜包括碳的一些實施例中,第二反應物可至少部分地自含N化合物以及含O化合物形成,其中含N化合物以及含O化合物以約1:1至約100:1、較佳約10:1至約30:1且更佳約19:1的比率(含N化合物/含O化合物)提供。在一些實施例中,比率為約1:2至約250:1。在一些實施例中,第二反應物可包括自具有N的化合物以及具有O的化合物兩者(諸如N2 與O2 的混合物)形成的電漿。在一些實施例中,第二反應物可至少部分地自N2 以及O2 形成,其中N2 以及O2 以約1:1至約100:1、較佳約19:1的比率(N2 /O2 )提供。
在一些實施例中,第二反應物可包括自具有N的化合物以及具有O的化合物兩者形成的電漿。在一些實施例中,第二反應物可不包括自具有N的化合物形成的電漿。在第二反應物包括具有N的化合物的情況下,具有N的化合物可選自N2 、NH3 、N2 H4 以及N2 H2 中的至少一者。具有O的化合物可選自O3 、N2 O、CO2 、CO、H2 O以及H2 O2 中的至少一者。應注意,類似於N物質以及O物質的比率,反應性物質的比率在電漿點火之前(亦即,氣流比率)以及在電漿點火之後(反應性物質比率)可不同。
在一些實施例中,第二反應物可遠離基板或反應空間經由電漿放電遠端地形成(「遠端電漿(remote plasma)」)。在一些實施例中,第二反應物可在基板附近或直接在基板上方形成(「直接電漿(direct plasma)」)。
在一些實施例中,第二反應物可提供至反應室中。在一些實施例中,合適的第二反應物可包含具有N的化合物、具有O的化合物以及惰性運載氣體。各種反應物流動速率可為合適的。在一些實施例中,第二反應物可包括N2 、O2 以及Ar。在一些實施例中,N2 的流動速率為約0 slm至約10 slm。在一些實施例中,O2 的流動速率為約0.001 slm至約10 slm。在一些實施例中,Ar的流動速率為約0 slm至約10 slm。 TiOx Ny 膜特性
根據本文中所論述的實施例中的一些沈積的TiOx Ny 薄膜可包括氮。在一些實施例中,在沈積TiOx Ny 時,第二反應物中的氮對氧的比率為約1:1至約100:1,較佳約10:1至約30:1,且更佳約19:1。在一些實施例中,TiOx Ny 薄膜中的氮對氧的比率為約1:2至約1000:1,較佳約1:1至約500:1,且更佳約10:1至約500:1。在一些實施例中,經沈積TiOx Ny 薄膜中的氮的量為約0.05原子%至約30原子%,更佳為約0.1原子%至約10原子%,且最佳為約0.2原子%至約5原子%。在一些情況下,氮的量小於約1原子%。在一些情況下,氮的量大於約0.2原子%。在一些情況下,氮的量大於約1原子%。
在一些實施例中,經沈積TiOx Ny 薄膜不包括可觀量的碳。然而,在一些實施例中,沈積包括碳的TiOx Ny 膜。舉例而言,在一些實施例中,使用包括碳的鈦前驅體執行ALD反應,且沈積包括碳的薄TiOx Ny 膜。在一些實施例中,可減少第二反應物中的含O化合物的量以便增加存在於經沈積TiOx Ny 薄膜中的碳的量。在一些實施例中,經沈積TiOx Ny 薄膜中的碳的量為約0.05原子%至約30原子%,更佳為約0.1原子%至約10原子%,且最佳為約0.1原子%至約5原子%。在一些情況下,碳的量小於約1原子%。
在一些實施例中,TiOx Ny 膜被沈積成約1 nm至約50 nm、較佳約3 nm至約30 nm、更佳約5 nm至約20 nm的厚度。此等厚度可在小於約100 nm、較佳約50 nm、更佳小於約30 nm、最佳小於約20 nm且在一些情況下小於約15 nm的特徵大小(寬度)中達成。根據一些實施例,TiOx Ny 膜沈積於三維結構上,且側壁處的厚度可甚至略微大於10 nm。
在一些實施例中,可生長大於50 nm的非晶形TiOx Ny 膜。在一些實施例中,可生長大於100 nm的TiOx Ny 膜。在一些實施例中,膜厚度為約1 nm至約200 nm,較佳約2 nm至約100 nm。在一些實施例中,膜厚度為約1 nm至約20 nm。一些實施例中,膜厚度為約1 nm至約10 nm。
根據一些實施例,可沈積具有各種濕式蝕刻速率(wet etch rate;WER)的TiOx Ny 膜。在一些實施例中,WER為約0.01 nm/min至約200 nm/min,較佳約0.01 nm/min至約50 nm/min。當使用1%dHF中的毯覆式WER(nm/min)時,經沈積TiOx Ny 膜可具有實質上類似於純氧化鈦的WER值的WER值。在一些實施例中,經沈積TiOx Ny 薄膜可具有約5.2 nm/min的WER。
在一些實施例中,可沈積具有各種乾式蝕刻速率(dry etch rate;DER)的TiOx Ny 膜。在一些實施例中,TiOx Ny 膜可具有針對常見氯類蝕刻劑氣體(諸如,BCl3 氣體)的DER,所述DER是熱氧化物(thermal oxide,Tox)的DER的約5倍至約15倍。在一些實施例中,TiOx Ny 薄膜可具有針對常見氟類氣體(諸如,CF4 氣體)的DER,所述DER小於Tox的DER的約一半。在一些實施例中,TiOx Ny 薄膜的DER小於熱氧化物的蝕刻速率,較佳少於熱氧化蝕刻速率的約二分之一,而在其他實施例中,TiOx Ny 薄膜的DER比熱氧化物蝕刻速率大約5以上。
根據一些實施例,TiOx Ny 薄膜可展現大於約50%、較佳大於約80%、更佳大於約90%且最佳大於約95%的步階覆蓋以及圖案負載效應。在一些情況下,步階覆蓋以及圖案負載效應可大於約98%,且在某一情況下為約100%(在量測工具或方法的精確度內)。此等值可按大於約2的縱橫比以及大於約3的縱橫比、較佳按大於5的縱橫比、更佳按大於10的縱橫比且最佳按大於15的縱橫比來達成。在一些實施例中,經沈積TiOx Ny 薄膜可展現實質上與相同厚度的氧化鈦膜相同的保形性。
如本文中所使用,「圖案負載效應(pattern loading effect)」根據其在本領域中的普通含義加以使用。雖然可關於雜質含量、密度、電性質以及蝕刻速率看到圖案負載效應,但除非另外指明,否則術語圖案負載效應當在文本中使用時指存在結構的基板區域中的膜厚度的變化。因此,圖案負載效應可指定為三維結構內部的特徵的側壁或底部中的膜厚度相對於面向開放場的三維結構/特徵的側壁或底部上的膜厚度。如本文中所使用,100%圖案負載效應(或比率1)將表示貫穿基板而不管特徵的完全均勻膜性質,亦即,換言之,不存在圖案負載效應(在特徵對開放場及/或對特徵尺寸以及間隔中特定膜性質(諸如,厚度)的差異)。
在一些實施例中,經沈積TiOx Ny 薄膜可具有小於約0.5 nm、較佳小於約0.3 nm、更佳小於約0.2 nm且最佳小於或等於約0.15 nm的粗糙度(roughness;RMS)。在一些實施例中,經沈積TiOx Ny 薄膜比相同厚度的純TiO2 薄膜結晶更少,且藉由相同前驅體加以沈積。 積體電路製造程序
本文中所描述的PEALD製程可用於形成用於(例如)積體電路製造中的TiOx Ny 膜。TiOx Ny 膜可被用作(例如)圖案化應用中的犧牲膜,或可被用作在間距倍增製程中使用的間隔件。藉助於實例,在間距倍增製程中,經由電漿增強ALD在反應空間中在包括現有遮罩特徵的基板上保形地沈積TiOx Ny 。保形、平滑且實質上非晶形的TiOx Ny 膜可隨後經方向性蝕刻以使得自遮罩特徵以及基板的水平表面移除TiOx Ny ,從而僅保留沈積於遮罩特徵的側壁上或自遮罩特徵的側壁延伸的TiOx Ny 。可隨後經由蝕刻製程移除遮罩特徵,從而僅留下間距加倍的TiOx Ny 特徵。
在本發明的較佳實施例中,組成PEALD製程中的第二反應物的氮前驅體對氧前驅體的比率使得在所得氮氧化鈦薄膜生長得厚於50 nm的情況下,所得氮氧化鈦薄膜實質上非晶形。由於保持實質上非晶形,所得TiOx Ny 薄膜足夠平滑以在多種上下文中用作(例如)間隔件或犧牲膜。在本發明的較佳實施例中,經由PEALD生長實質上不含微晶的TiOx Ny 薄膜。在一些實施例中,氮前驅體對氧前驅體的比率使得所得TiOx Ny 薄膜比在相同沈積條件下生長的純TiO2 薄膜結晶實質上更少。在本發明的一些實施例中,氮氧化鈦薄膜具有相對於SiO2 的蝕刻選擇性,亦即,與TiOx Ny 膜相比,蝕刻劑將優先蝕刻SiO2 。在本發明的較佳實施例中,TiOx Ny 膜具有實質上類似於純TiO2 的相對於SiO2 的蝕刻選擇性。
參看圖2A,且在本發明的一些實施例中,基板包括矽基板200上的熱SiO2 層210。在一些實施例中,基板包括矽類層,諸如矽基板上的Si、SiO2 或SiNx 層。在一些實施例中,基板包括犧牲層。在一些實施例中,基板包括聚合物或光阻膜。在本發明的較佳實施例中,基板包括至少一種遮罩特徵220,諸如三維凸起特徵。在較佳實施例中,遮罩特徵包括包含實質上垂直的側壁221的升高結構。在本發明的一些實施例中,遮罩特徵是藉由將形成於光阻層中的圖案轉印至矽基板上的SiO2 層而光微影地形成的。
如圖2B中所展示,且在本發明的較佳實施例中,TiOx Ny 膜230保形地沈積於一或多個遮罩特徵220以及基板200之上。在平滑、實質上非晶形的TiOx Ny 薄膜已保形地沈積於基板上的遮罩特徵之上之後,方向性蝕刻TiOx Ny 薄膜。如圖2C中所展示,且在一些實施例中,方向性蝕刻優先自遮罩特徵220的水平表面222、211以及基板200蝕刻TiOx Ny 薄膜,同時保持沈積於遮罩特徵220的垂直表面或側壁221上的TiOx Ny 231相對未蝕刻。在較佳實施例中,方向性蝕刻為反應性離子蝕刻。在較佳實施例中,方向性蝕刻自遮罩特徵220的水平表面222以及基板200移除實質上所有TiOx Ny 薄膜230,同時保持間隔件231或沈積於遮罩特徵的側壁221或垂直表面上或自遮罩特徵的側壁221或垂直表面延伸的TiOx Ny 實質上未蝕刻。
由於此方向性蝕刻,沈積於遮罩特徵220的側壁221上或自遮罩特徵220的側壁221延伸的TiOx Ny 薄膜231或間隔件以及遮罩特徵保持在基板上。如圖2D中所展示,且在一些實施例中,可隨後藉由優先蝕刻移除遮罩特徵220,從而使獨立間隔件240保留在基板200上。在一些實施例中,優先蝕刻為濕式蝕刻。在較佳實施例中,優先蝕刻為濕式氫氟酸蝕刻。在本發明的較佳實施例中,TiOx Ny 間隔件具有蝕刻選擇性特性,使得優先蝕刻移除實質上所有遮罩特徵,同時保持TiOx Ny 間隔件相對未蝕刻。在較佳實施例中,TiOx Ny 間隔件具有實質上與純TiO2 的蝕刻選擇性特性類似的蝕刻選擇性特性。
一旦已優先蝕刻遮罩特徵,TiOx Ny 間隔件231就保持在基板200上。已沈積於遮罩特徵的垂直表面上或自遮罩特徵的垂直表面延伸的TiOx Ny 現包括間隔件240。儘管以前具有一個特徵、遮罩特徵以及一個間隔,現在卻存在兩個特徵、TiOx Ny 間隔件以及兩個間隔。因此間隔件沈積製程已使基板上的特徵的線性密度加倍,或使間距加倍。 額外應用
本文中所描述的製程可用於形成供用於多種上下文(例如,積體電路製造)中的TiOx Ny 膜。TiOx Ny 膜可被用作(例如)圖案化應用中的犧牲膜。根據本發明沈積的TiOx Ny 薄膜還可適用作積體電路製造中的硬式遮罩層。習知氧化鈦硬式遮罩層的固有表面粗糙度可放大下伏基板的任何潛在表面粗糙度。然而,根據本發明沈積的TiOx Ny 硬式遮罩可歸因於相對較高程度的表面均一性以及較低結晶性而減少此問題。在一些實施例中,經沈積TiOx Ny 膜具有減少的粗糙度,亦即,與TiOx Ny 沈積之前的基板粗糙度相比減少的RMS粗糙度。在一些實施例中,TiOx Ny 沈積於基板表面上的犧牲膜的頂部上。在一些實施例中,TiOx Ny 沈積於聚合物或抗蝕劑膜的頂部上。在一些實施例中,TiOx Ny 被用作犧牲層或犧牲膜。
此外,根據本發明沈積的TiOx Ny 薄膜可用於光催化應用中。TiOx Ny 薄膜中的氮可用以改質膜相對於氧化鈦的帶隙能量。藉由控制第二反應物中的含N化合物對含O化合物的比率,可按需要調節氮的量以及因此所得TiOx Ny 薄膜的帶隙能量。
TiO2 具有所有金屬氧化物中最高的折射率,且因此用於許多光學應用中。在光學薄膜中,通常關鍵的是具有較高程度的平滑度,否則膜的表面特徵可能破壞效能。在一些實施例中,可沈積具有各種折射率(refractive indice;R.I.)的TiOx Ny 膜。在一些實施例中,TiOx Ny 膜可用於光學應用中,例如CMOS影像感測器(CMOS Image Sensor;CIS)。TiO2 亦已被研究作為氣體感測器、作為MOSFET以及記憶體應用(諸如,DRAM)的高k絕緣體、作為憶阻器中的電阻切換材料以及歸因於其生物相容性而用在植入物中。大體而言,平滑度為許多此等應用中所要的膜特性。根據本發明沈積的TiOx Ny 薄膜可在此等應用中展現優於習知氧化鈦膜的增大的平滑度。另外,存在於經沈積TiOx Ny 薄膜中的氮可改質其他膜性質,此可證明在某些應用中有益。 實例1
藉由將TDMAT用作鈦前驅體且將O2 +N2 電漿用作第二反應物的PEALD製程根據本發明沈積TiOx Ny 薄膜。使用190℃的晶座溫度。電漿功率為約400 W,且RF開啟時間為約0.2秒。第二反應物藉助於Ar運載氣體流動至腔室中。運載氣體流動速率為約2 slm。O2 流動速率為約0.1 slm,而N2 流動速率為約1.9 slm。
除了沈積TiOx Ny 薄膜以外,亦沈積氧化鈦參考膜。藉由將TDMAT用作鈦前驅體且將O2 電漿用作第二反應物的PEALD處理沈積氧化鈦薄膜。在與TiOx Ny 薄膜的晶座溫度、電漿功率以及壓力相同的晶座溫度、電漿功率以及壓力下沈積氧化鈦薄膜。第二反應物藉助於Ar運載氣體流動至腔室中。運載氣體流動速率為約2 slm。O2 流動速率為約4 slm。
dHF(1:100)中的經沈積TiOx Ny 薄膜的WER為熱氧化物(SiO2 )的WER的約68%。dHF(1:100)中的氧化鈦薄膜的WER為熱氧化物的WER的約57%。因此,經沈積TiOx Ny 薄膜展示與氧化鈦薄膜的WER類似的WER。
發現每循環的氧化鈦薄膜生長率為0.059 nm/循環,而發現每循環的TiOx Ny 薄膜生長率為0.056 nm/循環。 乾式蝕刻
使用300個沈積循環將TiOx Ny 膜沈積成18.7 nm的厚度。膜的生長率為0.62 Å/循環。經沈積TiOxNy薄膜亦展示優於氧化鈦參考膜的經改良表面粗糙度,如下表1中所展示。經改良表面粗糙度在圖3A以及圖3B中亦可顯而易見,圖3A以及圖3B展示所拍攝的TiOx Ny 膜以及氧化鈦膜的SEM影像。參看圖3A,氧化鈦膜展示分散於表面之上的許多凸塊。而如圖中3B可見,在TiOx Ny 薄膜的表面上觀測到極少的凸塊。 1 :藉由AFM量測的表面粗糙度。
觀測到的經沈積TiOx Ny 薄膜的步階覆蓋對於側邊步階覆蓋大於95%,且對於底部步階覆蓋大於95%。觀測到側邊步階覆蓋在約91%至約104%範圍內,而觀測到底部步階覆蓋在約96%至約108%範圍內。
藉由XPS分析根據本發明沈積的TiOx Ny 薄膜的組成。TiOx Ny 被發現包括0.5%碳以及0.3%氮。雖然此等結果未被充分理解,但膜性質以及蝕刻行為仍然在高品質間隔層應用的規格範圍內。
為簡單起見,本文中使用術語「膜(film)」以及「薄膜(thin film)」。「膜(film)」以及「薄膜(thin film)」意指藉由本文中所揭露的方法沈積的任何連續或非連續結構以及材料。舉例而言,「膜(film)」以及「薄膜(thin film)」可包含2D材料、奈米棒、奈米管或奈米粒子、或甚至單一部分或完全分子層或部分或完全原子層、或原子及/或分子的叢集。「膜(film)」以及「薄膜(thin film)」可包括具有針孔但仍至少部分連續的材料或層。
本領域的技術人員將理解,可在不脫離本發明的精神的情況下進行大量以及各種修改。所描述的特徵、結構、特性以及前驅體可按任何適合方式組合。因此,應明確理解,本發明的形式僅為說明性的,且並不意欲限制本發明的範疇。所有修改以及改變均意欲屬於如由所附申請專利範圍所界定的本發明的範疇內。
100‧‧‧氮氧化鈦沈積循環
200‧‧‧基板
210‧‧‧熱SiO2
220‧‧‧遮罩特徵
221‧‧‧側壁
222‧‧‧水平表面
230‧‧‧TiOxNy薄膜
231‧‧‧TiOxNy薄膜
240‧‧‧間隔件
圖1為說明根據本發明的一些實施例的藉由電漿增強ALD製程沈積氮氧化鈦薄膜的製程的流程圖。 圖2A說明根據一些實施例的例示性間隔件沈積製程的步驟的橫截面圖。 圖2B說明根據一些實施例的例示性間隔件沈積製程的步驟的橫截面圖。 圖2C說明根據一些實施例的例示性間隔件沈積製程的步驟的橫截面圖。 圖2D說明根據一些實施例的例示性間隔件沈積製程的步驟的橫截面圖。 圖3A為參考氧化鈦薄膜的掃描電子顯微照片。 圖3B為藉由根據一些實施例的沈積製程沈積的例示性TiOx Ny 膜的掃描電子顯微照片。
200‧‧‧矽基板
210‧‧‧熱SiO2
240‧‧‧間隔件

Claims (28)

  1. 一種用於在積體電路製造中沈積氮氧化鈦薄膜的製程,包括: 使基板與鈦反應物接觸; 若有過量鈦反應物以及反應副產物的話,將所述基板曝露於沖洗氣體及/或真空以移除所述過量鈦反應物以及所述反應副產物; 使所述基板與第二反應物接觸,其中所述第二反應物包括由電漿產生的多種反應性物質,其中所述多種反應性物質包括氮以及氧,且其中氮反應性物質對氧反應性物質的比率為約1:2至約250:1; 若有過量第二反應物以及反應副產物的話,將所述基板曝露於沖洗氣體及/或真空以移除所述過量第二反應物以及所述反應副產物; 重複接觸步驟以及曝露步驟,直至已形成所要厚度的氮氧化鈦薄膜為止,其中所述氮氧化鈦薄膜包括約0.05原子%至約30原子%的氮。
  2. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述製程用於在積體電路製造製程中形成間隔件。
  3. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述製程用於形成在間距倍增製程中使用的間隔件。
  4. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述氮氧化鈦膜為實質上非晶形。
  5. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述基板包括預先存在的遮罩特徵。
  6. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述鈦反應物包括烷胺配位體。
  7. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述鈦反應物包括Ti(NRI RII )4 ,其中RI 以及RII 可獨立選擇為烷基。
  8. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述第二反應物包括氮前驅體以及氧前驅體。
  9. 如申請專利範圍第8項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述氮前驅體包括N2 、NH3 或N2 H2
  10. 如申請專利範圍第8項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述氧前驅體包括O2
  11. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述反應性物質包括氮原子、氮離子、氮自由基或氮電漿,以及氧原子、氧自由基或氧電漿。
  12. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中沈積在較佳約70℃至約200℃的溫度下進行。
  13. 如申請專利範圍第1項所述的用於在積體電路製造中沈積氮氧化鈦薄膜的製程,其中所述製程為電漿增強原子層沈積製程。
  14. 一種用於沈積氮氧化鈦薄膜的製程,其包括至少一種沈積循環,所述沈積循環包括: 交替且依序地使所述基板與鈦反應物以及包括多種反應性物質的第二反應物接觸,多種所述反應性物質包含氮反應性物質以及氧反應性物質,其中所述第二反應物中的氮反應性物質對氧反應性物質的比率為約1:2至約250:1;且 其中所述沈積循環重複兩次或多於兩次以形成所述氮氧化鈦薄膜,所述氮氧化鈦薄膜包括約0.05原子%至約30原子%的氮。
  15. 如申請專利範圍第14項所述的用於沈積氮氧化鈦薄膜的製程,其中所述製程用於在積體電路製造製程中形成間隔件。
  16. 如申請專利範圍第14項所述的用於沈積氮氧化鈦薄膜的製程,其中所述鈦反應物具有式Ti(NRI RII )4 ,其中RI 以及RII 可獨立選擇為Me或Et。
  17. 如申請專利範圍第14項所述的用於沈積氮氧化鈦薄膜的製程,其中所述第二反應物包括氮前驅體以及氧前驅體。
  18. 如申請專利範圍第14項所述的用於沈積氮氧化鈦薄膜的製程,其中所述反應性物質包括氮原子、氮離子、氮自由基或氮電漿,以及氧原子、氧自由基或氧電漿。
  19. 如申請專利範圍第14項所述的用於沈積氮氧化鈦薄膜的製程,其中所述製程為電漿增強原子層沈積製程。
  20. 一種用於形成氮氧化鈦間隔件的製程,包括: 經由電漿增強原子層沈積在反應空間中在基板上的現有遮罩特徵之上保形地沈積實質上非晶形氮氧化鈦薄膜; 優先自所述基板以及所述遮罩特徵的水平表面蝕刻所述氮氧化鈦薄膜; 優先蝕刻所述遮罩特徵,其中沈積於所述遮罩特徵的垂直表面上或自所述遮罩特徵的垂直表面延伸的氮氧化鈦保持相對未蝕刻。
  21. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中所述間隔件用於間距倍增製程中。
  22. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中優先自水平表面蝕刻所述氮氧化鈦膜包括反應性離子蝕刻。
  23. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中優先蝕刻所述遮罩特徵包括氫氟酸濕式蝕刻。
  24. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中所述基板包括矽。
  25. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中所述遮罩特徵包括SiO2
  26. 如申請專利範圍第20項所述的用於形成氮氧化鈦間隔件的製程,其中經由電漿增強原子層沈積在反應空間中在基板上的現有遮罩特徵之上保形地沈積實質上非晶形氮氧化鈦薄膜包括交替且依序地使所述基板與鈦反應物以及包括多種反應性物質的第二反應物接觸。
  27. 如申請專利範圍第26項所述的用於形成氮氧化鈦間隔件的製程,其中多種所述反應性物質包含氮反應性物質以及氧反應性物質,其中氮反應性物質對氧反應性物質的比率為約1:2至約250:1。
  28. 如申請專利範圍第26項所述的用於形成氮氧化鈦間隔件的製程,其中所述氮氧化鈦薄膜包括約0.05原子%至約30原子%的氮。
TW105125546A 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沈積的製程 TWI702303B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/835,465 2015-08-25
US14/835,465 US9523148B1 (en) 2015-08-25 2015-08-25 Process for deposition of titanium oxynitride for use in integrated circuit fabrication

Publications (2)

Publication Number Publication Date
TW201710540A true TW201710540A (zh) 2017-03-16
TWI702303B TWI702303B (zh) 2020-08-21

Family

ID=57538622

Family Applications (3)

Application Number Title Priority Date Filing Date
TW109125013A TWI741692B (zh) 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沈積的製程
TW110132099A TWI747802B (zh) 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沉積的製程
TW105125546A TWI702303B (zh) 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沈積的製程

Family Applications Before (2)

Application Number Title Priority Date Filing Date
TW109125013A TWI741692B (zh) 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沈積的製程
TW110132099A TWI747802B (zh) 2015-08-25 2016-08-11 積體電路製造中使用的氮氧化鈦沉積的製程

Country Status (3)

Country Link
US (5) US9523148B1 (zh)
KR (1) KR102409668B1 (zh)
TW (3) TWI741692B (zh)

Families Citing this family (307)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US9373500B2 (en) 2014-02-21 2016-06-21 Lam Research Corporation Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
US9892917B2 (en) * 2010-04-15 2018-02-13 Lam Research Corporation Plasma assisted atomic layer deposition of multi-layer films for patterning applications
US9287113B2 (en) 2012-11-08 2016-03-15 Novellus Systems, Inc. Methods for depositing films on sensitive substrates
US8637411B2 (en) 2010-04-15 2014-01-28 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US9997357B2 (en) 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10026609B2 (en) * 2014-10-23 2018-07-17 Board Of Regents, The University Of Texas System Nanoshape patterning techniques that allow high-speed and low-cost fabrication of nanoshape structures
US9564312B2 (en) 2014-11-24 2017-02-07 Lam Research Corporation Selective inhibition in atomic layer deposition of silicon-containing films
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10566187B2 (en) 2015-03-20 2020-02-18 Lam Research Corporation Ultrathin atomic layer deposition film accuracy thickness control
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9523148B1 (en) * 2015-08-25 2016-12-20 Asm Ip Holdings B.V. Process for deposition of titanium oxynitride for use in integrated circuit fabrication
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US9824893B1 (en) 2016-06-28 2017-11-21 Lam Research Corporation Tin oxide thin film spacers in semiconductor device manufacturing
US12051589B2 (en) 2016-06-28 2024-07-30 Lam Research Corporation Tin oxide thin film spacers in semiconductor device manufacturing
US9773643B1 (en) 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10062563B2 (en) 2016-07-01 2018-08-28 Lam Research Corporation Selective atomic layer deposition with post-dose treatment
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10037884B2 (en) 2016-08-31 2018-07-31 Lam Research Corporation Selective atomic layer deposition for gapfill using sacrificial underlayer
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
KR102700194B1 (ko) 2016-12-19 2024-08-28 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
SG10201801132VA (en) 2017-02-13 2018-09-27 Lam Res Corp Method to create air gaps
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10546748B2 (en) 2017-02-17 2020-01-28 Lam Research Corporation Tin oxide films in semiconductor device manufacturing
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
USD876504S1 (en) 2017-04-03 2020-02-25 Asm Ip Holding B.V. Exhaust flow control ring for semiconductor deposition apparatus
KR102457289B1 (ko) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
JP7183187B2 (ja) * 2017-05-16 2022-12-05 エーエスエム アイピー ホールディング ビー.ブイ. 誘電体上の酸化物の選択的peald
US12040200B2 (en) 2017-06-20 2024-07-16 Asm Ip Holding B.V. Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR102401446B1 (ko) 2017-08-31 2022-05-24 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
KR102630301B1 (ko) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10727045B2 (en) * 2017-09-29 2020-07-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a semiconductor device
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
KR102443047B1 (ko) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 방법 및 그에 의해 제조된 장치
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
JP7214724B2 (ja) 2017-11-27 2023-01-30 エーエスエム アイピー ホールディング ビー.ブイ. バッチ炉で利用されるウェハカセットを収納するための収納装置
WO2019103610A1 (en) 2017-11-27 2019-05-31 Asm Ip Holding B.V. Apparatus including a clean mini environment
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
TWI799494B (zh) 2018-01-19 2023-04-21 荷蘭商Asm 智慧財產控股公司 沈積方法
CN111630203A (zh) 2018-01-19 2020-09-04 Asm Ip私人控股有限公司 通过等离子体辅助沉积来沉积间隙填充层的方法
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
KR102604345B1 (ko) * 2018-01-30 2023-11-20 램 리써치 코포레이션 패터닝에서 주석 옥사이드 맨드렐들 (mandrels)
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
JP7124098B2 (ja) 2018-02-14 2022-08-23 エーエスエム・アイピー・ホールディング・ベー・フェー 周期的堆積プロセスにより基材上にルテニウム含有膜を堆積させる方法
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
WO2019182872A1 (en) 2018-03-19 2019-09-26 Lam Research Corporation Chamfer-less via integration scheme
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102501472B1 (ko) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
TWI843623B (zh) 2018-05-08 2024-05-21 荷蘭商Asm Ip私人控股有限公司 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構
US12025484B2 (en) 2018-05-08 2024-07-02 Asm Ip Holding B.V. Thin film forming method
KR20190129718A (ko) 2018-05-11 2019-11-20 에이에스엠 아이피 홀딩 비.브이. 기판 상에 피도핑 금속 탄화물 막을 형성하는 방법 및 관련 반도체 소자 구조
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
TWI840362B (zh) 2018-06-04 2024-05-01 荷蘭商Asm Ip私人控股有限公司 水氣降低的晶圓處置腔室
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US20190390341A1 (en) * 2018-06-26 2019-12-26 Lam Research Corporation Deposition tool and method for depositing metal oxide films on organic materials
WO2020003000A1 (en) 2018-06-27 2020-01-02 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
TW202409324A (zh) 2018-06-27 2024-03-01 荷蘭商Asm Ip私人控股有限公司 用於形成含金屬材料之循環沉積製程
KR102686758B1 (ko) 2018-06-29 2024-07-18 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10755922B2 (en) * 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) * 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US20200043722A1 (en) * 2018-07-31 2020-02-06 Applied Materials, Inc. Cvd based spacer deposition with zero loading
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
KR102707956B1 (ko) 2018-09-11 2024-09-19 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
TWI844567B (zh) 2018-10-01 2024-06-11 荷蘭商Asm Ip私人控股有限公司 基材保持裝置、含有此裝置之系統及其使用之方法
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US12040199B2 (en) 2018-11-28 2024-07-16 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
JP7504584B2 (ja) 2018-12-14 2024-06-24 エーエスエム・アイピー・ホールディング・ベー・フェー 窒化ガリウムの選択的堆積を用いてデバイス構造体を形成する方法及びそのためのシステム
TWI819180B (zh) 2019-01-17 2023-10-21 荷蘭商Asm 智慧財產控股公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
JP2020136678A (ja) 2019-02-20 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材表面内に形成された凹部を充填するための方法および装置
TWI845607B (zh) 2019-02-20 2024-06-21 荷蘭商Asm Ip私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
KR20200102357A (ko) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. 3-d nand 응용의 플러그 충진체 증착용 장치 및 방법
TWI842826B (zh) 2019-02-22 2024-05-21 荷蘭商Asm Ip私人控股有限公司 基材處理設備及處理基材之方法
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200116033A (ko) 2019-03-28 2020-10-08 에이에스엠 아이피 홀딩 비.브이. 도어 개방기 및 이를 구비한 기판 처리 장치
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
KR20200123380A (ko) 2019-04-19 2020-10-29 에이에스엠 아이피 홀딩 비.브이. 층 형성 방법 및 장치
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
WO2020222853A1 (en) 2019-05-01 2020-11-05 Lam Research Corporation Modulated atomic layer deposition
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
JP2020188254A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141003A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 가스 감지기를 포함하는 기상 반응기 시스템
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20240031441A (ko) 2019-06-27 2024-03-07 램 리써치 코포레이션 교번하는 에칭 및 패시베이션 프로세스
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP7499079B2 (ja) 2019-07-09 2024-06-13 エーエスエム・アイピー・ホールディング・ベー・フェー 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
KR20210010820A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
KR20210010817A (ko) 2019-07-19 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 토폴로지-제어된 비정질 탄소 중합체 막을 형성하는 방법
TWI839544B (zh) 2019-07-19 2024-04-21 荷蘭商Asm Ip私人控股有限公司 形成形貌受控的非晶碳聚合物膜之方法
CN112309843A (zh) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
CN118422165A (zh) 2019-08-05 2024-08-02 Asm Ip私人控股有限公司 用于化学源容器的液位传感器
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. 成膜原料混合ガス生成装置及び成膜装置
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TWI846953B (zh) 2019-10-08 2024-07-01 荷蘭商Asm Ip私人控股有限公司 基板處理裝置
KR20210042810A (ko) 2019-10-08 2021-04-20 에이에스엠 아이피 홀딩 비.브이. 활성 종을 이용하기 위한 가스 분배 어셈블리를 포함한 반응기 시스템 및 이를 사용하는 방법
KR20210043460A (ko) 2019-10-10 2021-04-21 에이에스엠 아이피 홀딩 비.브이. 포토레지스트 하부층을 형성하기 위한 방법 및 이를 포함한 구조체
US12009241B2 (en) 2019-10-14 2024-06-11 Asm Ip Holding B.V. Vertical batch furnace assembly with detector to detect cassette
TWI834919B (zh) 2019-10-16 2024-03-11 荷蘭商Asm Ip私人控股有限公司 氧化矽之拓撲選擇性膜形成之方法
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
KR20210065848A (ko) 2019-11-26 2021-06-04 에이에스엠 아이피 홀딩 비.브이. 제1 유전체 표면과 제2 금속성 표면을 포함한 기판 상에 타겟 막을 선택적으로 형성하기 위한 방법
CN112885692A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
CN112885693A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
JP7527928B2 (ja) 2019-12-02 2024-08-05 エーエスエム・アイピー・ホールディング・ベー・フェー 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
TW202125596A (zh) 2019-12-17 2021-07-01 荷蘭商Asm Ip私人控股有限公司 形成氮化釩層之方法以及包括該氮化釩層之結構
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
KR20210089079A (ko) 2020-01-06 2021-07-15 에이에스엠 아이피 홀딩 비.브이. 채널형 리프트 핀
TW202140135A (zh) 2020-01-06 2021-11-01 荷蘭商Asm Ip私人控股有限公司 氣體供應總成以及閥板總成
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR102675856B1 (ko) 2020-01-20 2024-06-17 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TW202130846A (zh) 2020-02-03 2021-08-16 荷蘭商Asm Ip私人控股有限公司 形成包括釩或銦層的結構之方法
TW202146882A (zh) 2020-02-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TW202203344A (zh) 2020-02-28 2022-01-16 荷蘭商Asm Ip控股公司 專用於零件清潔的系統
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
KR20210116249A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 록아웃 태그아웃 어셈블리 및 시스템 그리고 이의 사용 방법
CN113394086A (zh) 2020-03-12 2021-09-14 Asm Ip私人控股有限公司 用于制造具有目标拓扑轮廓的层结构的方法
KR20210124042A (ko) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TW202146689A (zh) 2020-04-03 2021-12-16 荷蘭商Asm Ip控股公司 阻障層形成方法及半導體裝置的製造方法
TW202145344A (zh) 2020-04-08 2021-12-01 荷蘭商Asm Ip私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
KR20210127620A (ko) 2020-04-13 2021-10-22 에이에스엠 아이피 홀딩 비.브이. 질소 함유 탄소 막을 형성하는 방법 및 이를 수행하기 위한 시스템
KR20210128343A (ko) 2020-04-15 2021-10-26 에이에스엠 아이피 홀딩 비.브이. 크롬 나이트라이드 층을 형성하는 방법 및 크롬 나이트라이드 층을 포함하는 구조
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
TW202146831A (zh) 2020-04-24 2021-12-16 荷蘭商Asm Ip私人控股有限公司 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法
JP2021172884A (ja) 2020-04-24 2021-11-01 エーエスエム・アイピー・ホールディング・ベー・フェー 窒化バナジウム含有層を形成する方法および窒化バナジウム含有層を含む構造体
KR20210134226A (ko) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
KR20210134869A (ko) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Foup 핸들러를 이용한 foup의 빠른 교환
TW202147543A (zh) 2020-05-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 半導體處理系統
KR20210141379A (ko) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
TW202146699A (zh) 2020-05-15 2021-12-16 荷蘭商Asm Ip私人控股有限公司 形成矽鍺層之方法、半導體結構、半導體裝置、形成沉積層之方法、及沉積系統
KR20210143653A (ko) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210145078A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
KR102702526B1 (ko) 2020-05-22 2024-09-03 에이에스엠 아이피 홀딩 비.브이. 과산화수소를 사용하여 박막을 증착하기 위한 장치
TW202201602A (zh) 2020-05-29 2022-01-01 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TW202212620A (zh) 2020-06-02 2022-04-01 荷蘭商Asm Ip私人控股有限公司 處理基板之設備、形成膜之方法、及控制用於處理基板之設備之方法
TW202218133A (zh) 2020-06-24 2022-05-01 荷蘭商Asm Ip私人控股有限公司 形成含矽層之方法
TW202217953A (zh) 2020-06-30 2022-05-01 荷蘭商Asm Ip私人控股有限公司 基板處理方法
KR102707957B1 (ko) 2020-07-08 2024-09-19 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
TW202219628A (zh) 2020-07-17 2022-05-16 荷蘭商Asm Ip私人控股有限公司 用於光微影之結構與方法
TW202204662A (zh) 2020-07-20 2022-02-01 荷蘭商Asm Ip私人控股有限公司 用於沉積鉬層之方法及系統
US12040177B2 (en) 2020-08-18 2024-07-16 Asm Ip Holding B.V. Methods for forming a laminate film by cyclical plasma-enhanced deposition processes
KR20220027026A (ko) 2020-08-26 2022-03-07 에이에스엠 아이피 홀딩 비.브이. 금속 실리콘 산화물 및 금속 실리콘 산질화물 층을 형성하기 위한 방법 및 시스템
TW202229601A (zh) 2020-08-27 2022-08-01 荷蘭商Asm Ip私人控股有限公司 形成圖案化結構的方法、操控機械特性的方法、裝置結構、及基板處理系統
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US12009224B2 (en) 2020-09-29 2024-06-11 Asm Ip Holding B.V. Apparatus and method for etching metal nitrides
KR20220045900A (ko) 2020-10-06 2022-04-13 에이에스엠 아이피 홀딩 비.브이. 실리콘 함유 재료를 증착하기 위한 증착 방법 및 장치
CN114293174A (zh) 2020-10-07 2022-04-08 Asm Ip私人控股有限公司 气体供应单元和包括气体供应单元的衬底处理设备
TW202229613A (zh) 2020-10-14 2022-08-01 荷蘭商Asm Ip私人控股有限公司 於階梯式結構上沉積材料的方法
KR20220053482A (ko) 2020-10-22 2022-04-29 에이에스엠 아이피 홀딩 비.브이. 바나듐 금속을 증착하는 방법, 구조체, 소자 및 증착 어셈블리
TW202223136A (zh) 2020-10-28 2022-06-16 荷蘭商Asm Ip私人控股有限公司 用於在基板上形成層之方法、及半導體處理系統
TW202235649A (zh) 2020-11-24 2022-09-16 荷蘭商Asm Ip私人控股有限公司 填充間隙之方法與相關之系統及裝置
TW202235675A (zh) 2020-11-30 2022-09-16 荷蘭商Asm Ip私人控股有限公司 注入器、及基板處理設備
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (zh) 2020-12-22 2022-08-16 荷蘭商Asm Ip私人控股有限公司 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG43836A1 (en) 1992-12-11 1997-11-14 Intel Corp A mos transistor having a composite gate electrode and method of fabrication
EP0854505A3 (en) 1997-01-21 1998-11-11 Texas Instruments Incorporated Process of depositing a TiN based film during the fabrication of a semiconductor device
KR100275727B1 (ko) 1998-01-06 2001-01-15 윤종용 반도체 장치의 커패시터 형성방법
US6225168B1 (en) 1998-06-04 2001-05-01 Advanced Micro Devices, Inc. Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof
US6166417A (en) 1998-06-30 2000-12-26 Intel Corporation Complementary metal gates and a process for implementation
US6130123A (en) 1998-06-30 2000-10-10 Intel Corporation Method for making a complementary metal gate electrode technology
US6066533A (en) 1998-09-29 2000-05-23 Advanced Micro Devices, Inc. MOS transistor with dual metal gate structure
US20020008257A1 (en) 1998-09-30 2002-01-24 John P. Barnak Mosfet gate electrodes having performance tuned work functions and methods of making same
US6291282B1 (en) 1999-02-26 2001-09-18 Texas Instruments Incorporated Method of forming dual metal gate structures or CMOS devices
US6635939B2 (en) 1999-08-24 2003-10-21 Micron Technology, Inc. Boron incorporated diffusion barrier material
US6902763B1 (en) 1999-10-15 2005-06-07 Asm International N.V. Method for depositing nanolaminate thin films on sensitive surfaces
US6373111B1 (en) 1999-11-30 2002-04-16 Intel Corporation Work function tuning for MOSFET gate electrodes
US6383879B1 (en) 1999-12-03 2002-05-07 Agere Systems Guardian Corp. Semiconductor device having a metal gate with a work function compatible with a semiconductor device
KR100358056B1 (ko) 1999-12-27 2002-10-25 주식회사 하이닉스반도체 반도체 소자의 게이트 산화막 형성방법
US6407435B1 (en) 2000-02-11 2002-06-18 Sharp Laboratories Of America, Inc. Multilayer dielectric stack and method
AU2001245388A1 (en) 2000-03-07 2001-09-17 Asm America, Inc. Graded thin films
TW508658B (en) 2000-05-15 2002-11-01 Asm Microchemistry Oy Process for producing integrated circuits
KR100351056B1 (ko) 2000-06-27 2002-09-05 삼성전자 주식회사 선택적 금속산화막 형성단계를 포함하는 반도체 소자의 제조방법
US6368954B1 (en) 2000-07-28 2002-04-09 Advanced Micro Devices, Inc. Method of copper interconnect formation using atomic layer copper deposition
US6660660B2 (en) 2000-10-10 2003-12-09 Asm International, Nv. Methods for making a dielectric stack in an integrated circuit
US6613695B2 (en) 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
WO2002050922A1 (en) 2000-12-18 2002-06-27 Stanford University Gate electrode with depletion suppression and tunable workfunction
KR100387259B1 (ko) 2000-12-29 2003-06-12 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US6537901B2 (en) 2000-12-29 2003-03-25 Hynix Semiconductor Inc. Method of manufacturing a transistor in a semiconductor device
US6713846B1 (en) 2001-01-26 2004-03-30 Aviza Technology, Inc. Multilayer high κ dielectric films
US6596576B2 (en) 2001-04-10 2003-07-22 Applied Materials, Inc. Limiting hydrogen ion diffusion using multiple layers of SiO2 and Si3N4
US6518106B2 (en) 2001-05-26 2003-02-11 Motorola, Inc. Semiconductor device and a method therefor
US6511876B2 (en) 2001-06-25 2003-01-28 International Business Machines Corporation High mobility FETS using A1203 as a gate oxide
US6700771B2 (en) 2001-08-30 2004-03-02 Micron Technology, Inc. Decoupling capacitor for high frequency noise immunity
US7160817B2 (en) 2001-08-30 2007-01-09 Micron Technology, Inc. Dielectric material forming methods
US6806145B2 (en) 2001-08-31 2004-10-19 Asm International, N.V. Low temperature method of forming a gate stack with a high k layer deposited over an interfacial oxide layer
US6960537B2 (en) 2001-10-02 2005-11-01 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US6458695B1 (en) 2001-10-18 2002-10-01 Chartered Semiconductor Manufacturing Ltd. Methods to form dual metal gates by incorporating metals and their conductive oxides
US6902620B1 (en) * 2001-12-19 2005-06-07 Novellus Systems, Inc. Atomic layer deposition systems and methods
US6730588B1 (en) 2001-12-20 2004-05-04 Lsi Logic Corporation Method of forming SiGe gate electrode
US6696332B2 (en) 2001-12-26 2004-02-24 Texas Instruments Incorporated Bilayer deposition to avoid unwanted interfacial reactions during high K gate dielectric processing
US6824816B2 (en) 2002-01-29 2004-11-30 Asm International N.V. Process for producing metal thin films by ALD
US6730163B2 (en) 2002-03-14 2004-05-04 Micron Technology, Inc. Aluminum-containing material and atomic layer deposition methods
US6717226B2 (en) 2002-03-15 2004-04-06 Motorola, Inc. Transistor with layered high-K gate dielectric and method therefor
US20040058205A1 (en) 2002-08-21 2004-03-25 Mantese Joseph V. Metal alloys forming passivating conductive oxides for durable electrical contact surfaces
US20040036129A1 (en) 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
US8617312B2 (en) 2002-08-28 2013-12-31 Micron Technology, Inc. Systems and methods for forming layers that contain niobium and/or tantalum
US6714435B1 (en) 2002-09-19 2004-03-30 Cova Technologies, Inc. Ferroelectric transistor for storing two data bits
US6723581B1 (en) 2002-10-21 2004-04-20 Agere Systems Inc. Semiconductor device having a high-K gate dielectric and method of manufacture thereof
KR100460841B1 (ko) * 2002-10-22 2004-12-09 한국전자통신연구원 플라즈마 인가 원자층 증착법을 통한 질소첨가 산화물박막의 형성방법
US7045406B2 (en) 2002-12-03 2006-05-16 Asm International, N.V. Method of forming an electrode with adjusted work function
US6858524B2 (en) 2002-12-03 2005-02-22 Asm International, Nv Method of depositing barrier layer for metal gates
US20050045092A1 (en) 2003-09-03 2005-03-03 Taiwan Semiconductor Manufacturing Co. Method of multi-element compound deposition by atomic layer deposition for IC barrier layer applications
US20060151822A1 (en) 2005-01-07 2006-07-13 Shrinivas Govindarajan DRAM with high K dielectric storage capacitor and method of making the same
US7309895B2 (en) 2005-01-25 2007-12-18 Hewlett-Packard Development Company, L.P. Semiconductor device
US9136545B2 (en) * 2008-02-27 2015-09-15 GM Global Technology Operations LLC Low cost fuel cell bipolar plate and process of making the same
KR20090108747A (ko) * 2008-04-14 2009-10-19 삼성전자주식회사 가변적 원자층 적층 온도를 이용한 반도체 및 그 제조 방법
US8945675B2 (en) 2008-05-29 2015-02-03 Asm International N.V. Methods for forming conductive titanium oxide thin films
US8357583B2 (en) 2010-09-10 2013-01-22 Elpida Memory, Inc. Method for manufacturing semiconductor device
TWI478382B (zh) 2012-06-26 2015-03-21 Lextar Electronics Corp 發光二極體及其製造方法
KR102105608B1 (ko) * 2013-09-27 2020-04-28 엘지디스플레이 주식회사 유기 발광 장치와 이의 제조 방법
US9540729B1 (en) * 2015-08-25 2017-01-10 Asm Ip Holding B.V. Deposition of titanium nanolaminates for use in integrated circuit fabrication
US9523148B1 (en) * 2015-08-25 2016-12-20 Asm Ip Holdings B.V. Process for deposition of titanium oxynitride for use in integrated circuit fabrication
US10361213B2 (en) * 2016-06-28 2019-07-23 Sandisk Technologies Llc Three dimensional memory device containing multilayer wordline barrier films and method of making thereof

Also Published As

Publication number Publication date
US20190043711A1 (en) 2019-02-07
KR102409668B1 (ko) 2022-06-16
TW202039909A (zh) 2020-11-01
TWI741692B (zh) 2021-10-01
TWI747802B (zh) 2021-11-21
US9523148B1 (en) 2016-12-20
KR20170024572A (ko) 2017-03-07
US20190172705A1 (en) 2019-06-06
TW202146687A (zh) 2021-12-16
US10460928B2 (en) 2019-10-29
US10546744B2 (en) 2020-01-28
US10002755B2 (en) 2018-06-19
US20200251330A1 (en) 2020-08-06
TWI702303B (zh) 2020-08-21
US20170140926A1 (en) 2017-05-18
US11195712B2 (en) 2021-12-07

Similar Documents

Publication Publication Date Title
TWI747802B (zh) 積體電路製造中使用的氮氧化鈦沉積的製程
US11776807B2 (en) Plasma enhanced deposition processes for controlled formation of oxygen containing thin films
KR102524573B1 (ko) SiOCN 박막들의 형성
KR102503837B1 (ko) SiN 박막들의 형성
US11501965B2 (en) Plasma enhanced deposition processes for controlled formation of metal oxide thin films
CN106486349B (zh) 用于集成电路制作的钛纳米叠层的沉积
TWI518202B (zh) 使介電膜鈍化的製程
KR20190125934A (ko) 실리콘-하이드로할라이드 전구체를 사용한 SiN의 플라즈마 강화 원자층 증착(PEALD)
US11139163B2 (en) Selective deposition of SiOC thin films