TW201340351A - 具有寬能帶間隙半導體材料之射極區的太陽能電池 - Google Patents

具有寬能帶間隙半導體材料之射極區的太陽能電池 Download PDF

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TW201340351A
TW201340351A TW101148497A TW101148497A TW201340351A TW 201340351 A TW201340351 A TW 201340351A TW 101148497 A TW101148497 A TW 101148497A TW 101148497 A TW101148497 A TW 101148497A TW 201340351 A TW201340351 A TW 201340351A
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layer
forming
band gap
semiconductor
semiconductor substrate
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TWI575764B (zh
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Richard M Swanson
Marius M Bunea
Michael C Johnson
David D Smith
Yu-Chen Shen
Peter J Cousins
Tim Dennis
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Sunpower Corp
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Abstract

所說明者為具有由寬能帶間隙半導體材料所構成之射極區的太陽能電池。在一實例中，一種方法包括在具有控制氛圍之製程工具中，形成薄介電層於太陽能電池之半導體基板的表面上。半導體基板具有一能帶間隙。在不將半導體基板從由製程工具之控制氛圍中移出的情況下，半導體層係形成於薄介電層上。半導體層之能帶間隙高於半導體基板之能帶間隙至少約0.2電子伏特(eV)。

Description

具有寬能帶間隙半導體材料之射極區的太陽能電池
本發明之實施例屬於再生能源領域，尤其是具有由寬能帶間隙半導體材料所構成之射極區的太陽能電池。
光伏打電池(photovoltaic cells)，通常稱為太陽能電池，是廣為人知用於將太陽輻射直接轉換為電能的裝置。一般而言，太陽能電池係於半導體晶圓或基板上製造，並且其製造係使用半導體加工技術以在該基板之表面附近形成p-n接面(junction)。撞擊在該表面與進入該基板的太陽輻射會在該基板的主體產生電子電洞對。這些電子電洞對會遷移到該基板中的p-摻雜與n-摻雜區，從而在這些摻雜區間產生壓差。這些摻雜區係連接至該太陽能電池上的導電區，以將電流從電池導引到與其耦接的外部電路。
效率是太陽能電池的一個重要特性，因為其直接與太陽能電池產生電力的能力相關。同樣地，生產太陽能電池的效率直接與這些太陽能電池之成本效益性相關。因此，一般期望能有增加太陽能電池效率的技術，或增加太陽能電池製造效率的技術。本發明之某些實施例藉由提供用於製造太陽能電池結構之新穎方法，而能夠提高太陽能電池之製造效率。本發明之某些實施例藉由提供新穎太陽能電池結構，而能夠提高太陽能電池之效率。
本說明書中所揭露者為製造太陽能電池之方法。在一實施例中，一種方法包括在具有控制氛圍之製程工具中，形成薄介電層於太陽能電池之半導體基板的表面上。半導體基板具有能帶間隙。在不將該半導體基板由製程工具之控制氛圍中移出的情況下，半導體層係形成於薄介電層上。半導體層之能帶間隙為高於半導體基板之能帶間隙至少約0.2電子伏特(eV)。
本說明書中亦揭露者為具有由寬能帶間隙半導體材料所構成之射極區的太陽能電池。在一實施例中，太陽能電池包括矽基板。第一射極區係設置於矽基板之表面上，並且係由摻雜為第一傳導類型之氮化鋁(AlN)層所構成。該AlN層係設置於薄氧化鋁(Al2O3)層上。第二射極區係設置於矽基板之表面上，並且係由摻雜為第二相反傳導類型之半導體材料所構成。第二半導體材料係設置於薄介電層上。第一與第二接觸點(contact)係設置於，並且分別傳導性耦接至該第一與第二射極區。
通常用擴散與氧化來達成太陽能電池表面之鈍化，以形成薄介電材料於太陽能電池之一或多個表面上。形成此薄介電材料可提供結構性方法，以驅除在太陽能電池之表面的少數載子(minority carrier)。此外，該氧化製程可經設計以有效防止界面缺陷，這些缺陷可能存在於太陽能電池之最外表面。形成之介電材料可具有數種功能，例如但不限於作為水分阻隔使用、作為氫源使用、以及可能作為抗反射塗層使用。
在太陽能電池的製造期間，通常以兩或多個製程操作來達成以上三種太陽能電池表面鈍化的態樣。然而，使用多個製程操作可能會帶來一系列新問題，即裝卸複雜性與增加處理成本。並且典型的是，氧化物與擴散操作係於一工具（例如於擴散爐中）中進行，之後介電質形成通常會在不同的製程工具中進行。可惜的是，當形成之氧化物由該第一製程工具（例如該爐）中取出時，該氧化物可能會曝露於大氣條件與汙染物中，例如水分。因此，在本發明之一實施例中，係先形成一高品質氧化物，接著在進行進一步的處理操作前防止其曝露於空氣與水中。
介電質沉積之後續的擴散常會涉及多種相對高成本之多種製程工具作業。因此，在一實施例中，藉由在控制氛圍爐工具中生長薄氧化矽層來進行矽鈍化操作，該薄氧化矽層厚度例如小於約3奈米（並且可能小於約2奈米）。在相同工具（並且具體而言，未曝露於外部實驗室或晶圓廠大氣或周圍條件）內，接著沉積經摻雜寬能帶間隙半導體於薄氧化物層上。在一此類實施例中，該爐可為低壓化學氣相沉積(CVD)爐、或快速熱退火或快速熱處理(RTP)工具。在一具體實施例中，氧化物之生長與沉積會發生於基板或晶圓之兩側，此基板或晶圓最終會用來形成太陽能電池。在一實施例中，沉積於氧化物層上之膜為寬能帶間隙半導體材料，例如能帶間隙大於約3電子伏特(eV)者，其具有一或多個大價能帶偏移(valence band offset)、水分阻隔性質、對矽之低應力與形成歐姆接觸之能力。多晶矽常與矽基板耦合，但對於阻絕少數載子可能並非最適合者。相對而言，在實施例中，寬能帶間隙半導體材料會同時阻絕少數載子並且對於多數載子(majority carrier)具有高度傳導性。
在一實施例中，寬能帶間隙材料係相對於矽基板而考慮，並且可包括但不限於經摻雜非晶矽、碳化矽或氮化鋁鎵(aluminum gallium nitride)，如以下所更詳細說明者。經摻雜多晶矽為先前已揭示之另一選擇。經摻雜非晶矽對於鈍化與歐姆接觸而言可為良好選擇，但於光傳輸可能並非理想者。然而在一實施例中，經摻雜非晶矽係以足夠薄之形式來使用，以最小化光吸收。在另一實施例中，甚至使用更高能帶間隙之材料，以有利於基板之光接收表面的光傳輸，如以下所更詳細說明者。在一實施例中，使用具有管式低壓化學氣相沉積(tube low pressure chemical vapor deposition, LPCVD)反應器，其可達例如約攝氏900度之高溫，之真空工具配置，以形成氧化物與覆蓋寬能帶間隙半導體材料。在另一實施例中，使用結合電漿增強化學氣相沉積(plasma enhanced chemical vapor deposition, PECVD)工具之快速熱處理工具，以形成氧化物與覆蓋寬能帶間隙半導體材料。其他可能的實施例係如以下所更詳細說明者。
100．．．能帶圖
200．．．能帶圖
250．．．界面氧化物
300．．．流程圖
302．．．操作
304．．．操作
400．．．基礎結構
402．．．矽基板
404．．．經沉樍矽層
406．．．薄介電層
408．．．摻雜材料
409．．．摻雜物
410．．．第一氧化物層
412．．．第二氧化物層
414．．．第三氧化物層
424．．．曝露之多晶矽區
430．．．第一粗化矽區
432．．．第二粗化矽區
440．．．加熱
450．．．經摻雜多晶矽層
460．．．第一寬能帶間隙經摻雜半導體層
462．．．第二寬能帶間隙經摻雜半導體層
470．．．抗反射塗覆層
480．．．接觸開口
490．．．第一金屬柵極線
492．．．第二金屬柵極線
第1圖繪示為提高能量(E)之函數的能帶圖，此係針對不具有界面隧道氧化物之現有異質接面接觸。
第2圖繪示為提高能量(E)之函數的能帶圖，此係針對具有界面隧道氧化物之異質接面接觸，此係依據本發明之實施例。
第3圖為表示製造太陽能電池之方法的流程圖，此係依據本發明之實施例。
第4A圖繪示太陽能電池製造中之操作的剖視圖，其中提供用於製造太陽能電池之基礎結構，並且包括矽基板、薄介電層與經沉積矽層，此係依據本發明之另一實施例。
第4B圖繪示太陽能電池製造中之操作的剖視圖，其中摻雜材料層係沉積於第4A圖之經沉積矽層上方，此係依據本發明之另一實施例。
第4C圖繪示太陽能電池製造中之操作的剖視圖，其中第一氧化物層410係沉積於第4B圖之該層沉積材料上方，此係依據本發明之另一實施例。
第4D圖繪示太陽能電池製造中之操作的剖視圖，其中在第4C圖之結構上進行材料移除製程以形成曝露之多晶矽區，此係依據本發明之另一實施例。
第4E圖繪示太陽能電池製造中之操作的剖視圖，其中在第4D圖之結構上進行蝕刻製程以有利於蝕刻該曝露之多晶矽區，並且形成第一粗化矽區於該太陽能電池之背側，此係依據本發明之另一實施例。
第4F圖繪示太陽能電池製造中之操作的剖視圖，其中氧化物層係形成於第4E圖之摻雜材料層與第一粗化矽區上方，此係依據本發明之另一實施例。
第4G圖繪示太陽能電池製造中之操作的剖視圖，其中經摻雜多晶矽層係形成自第4F圖之結構，此係依據本發明之另一實施例。
第4H圖繪示太陽能電池製造中之操作的剖視圖，其中寬能帶間隙經摻雜半導體層係形成於第4G圖之結構上，此係依據本發明之另一實施例。
第4I圖繪示太陽能電池製造中之操作的剖視圖，其中寬能帶間隙經摻雜半導體層係沉積於第4H圖之粗化矽區上方，此係依據本發明之另一實施例。
第4J圖繪示太陽能電池製造中之操作的剖視圖，其中進行第4H圖之寬能帶間隙經摻雜半導體的部分移除，此係依據本發明之另一實施例。
第4K圖繪示太陽能電池製造中之操作的剖視圖，其中第一金屬柵極或柵極線係形成於第4J圖之結構的背側上，此係依據本發明之另一實施例。
第4L圖繪示太陽能電池製造中之操作的剖視圖，其中第二金屬柵極或柵極線係形成於第4K圖之結構的背側上，此係依據本發明之另一實施例。
本說明書中係說明具有由寬能帶間隙半導體材料所構成之射極區的太陽能電池。在以下說明中會提出許多具體細節，例如具體的製程流程操作與材料體系(material regimes)，以對於本發明之實施例提供全面性的瞭解。對於熟習該項技術者而言以下將為顯而易見，即本發明之實施例在沒有這些具體細節下還是可以實施。在其他實例中，並未詳細說明熟知的製造技術，例如後續之金屬接觸形成技術，以避免不必要地使本發明之實施例難以理解。此外，可理解顯示於圖式中的各種實施例為說明性的表示，而且不必然依比例繪製。
為了要較佳說明本說明書中所述之至少某些實施例的部分理論，第1圖繪示一作為提高能量(E)之函數的能帶圖，此係針對不具有界面隧道氧化物(interfacial tunnel oxide)之現有異質接面接觸(heterojunction contact)。請參照第1圖，現有N型基板與寬能帶間隙鈍化/接觸之能帶00顯示電子（多數載子(majority carriers)）與電洞（少數載子(minority carriers)）之價能階(Evalence)、費米能階(Fermi level)與傳導能階(Econduction)。高少數載子能帶偏移(band offset)可用來達成優良的鈍化，而低多數載子能帶偏移可用來達成優良的歐姆接觸。然而，要直接製造高能帶間隙材料於矽基板上常證明是有所困難。
相比之下，第2圖繪示為提高能量(E)之函數的能帶圖，此係針對具有界面隧道氧化物之異質接面接觸，此係依據本發明之一實施例。請參照第2圖，N型基板以其間有薄界面隧道氧化物而與寬能帶間隙鈍化/接觸之能帶圖200顯示電子（多數載子）與電洞（少數載子）之價能階(Evalence)、費米能階與傳導能階(Econduction)。在一實施例中，提供界面氧化物(interfacial oxide)（例如薄二氧化矽層）250以協助降低表面缺陷密度。亦即，在實施例中，薄介電質（例如穿隧氧化物層）係包括於矽基板與寬能帶間隙半導體界面間，以阻絕表面態。在具體實施例中，以介電質250鈍化矽基板會提供一界面，此界面具有小於約1012缺陷/cm2。在實施例中，即使包括此介電層，其費米能階仍接近能帶邊緣，如第2圖中所繪示者。
可能有許多處理流程適用於提供具有在半導體基板表面上方之寬能帶間隙半導體材料的太陽能電池，並且其間設置界面介電質與/或鈍化層。第3圖作為此製程流程之基本範例，其表示製造太陽能電池之方法中的操作之流程圖300，此係依據本發明之一實施例。請參照流程圖300中之操作302，製造太陽能電池之方法包括形成薄介電層於太陽能電池之半導體基板表面上。薄介電層係形成於具有控制氛圍(controlled atmosphere)之製程工具中。請參照流程圖300中之操作304，該方法接著包括形成半導體層於薄介電層上，並且未將半導體基板由製程工具之控制氛圍中移出。在一此類實施例中，半導體層之能帶間隙為高於半導體基板之能帶間隙至少約0.2電子伏特(eV)。在實施例中，該方法進一步包括由半導體層形成用於該太陽能電池之射極區。
一或多個本發明之實施例可能會帶來處理上的利益。例如，本說明書中所述之一或多個實施例會提供單一操作鈍化製程。本說明書中所述之一或多個實施例會提供使用此類鈍化來製造背N型接觸(back N-type contact)之能力，從而簡化單一操作鈍化製程後之太陽能電池製程。本說明書中所述之一或多個實施例會提供一種使形成之氧化物不曝露於大氣中之方法。本說明書中所述之一或多個實施例會提供一種用於形成高光反射率接觸之方法。本說明書中所述之一或多個實施例會提供一種不需要在N型接觸背側打開接觸窗之方法。本說明書中所述之一或多個實施例會提供一種用於便利全區域金屬接觸形成之方法。
依據本發明之一實施例，用於製造太陽能電池之改良技術為在單一製程工具中，提供在矽基板之背側上的薄介電層與經沉積之寬能帶間隙半導體層。詳細加工流程係提供如下，以說明許多可能實施例之其中一者，這些實施例係用於形成用來形成射極區之寬能帶間隙半導體材料與半導體基板配對。具體而言，第4A圖至第4L圖繪示太陽能電池製造中之各式階段的剖視圖，該太陽能電池具有由寬能帶間隙半導體材料所構成之射極區，此係依據本發明之另一實施例。
以下為一概述，在所繪示之特定實施例中，先藉由驅使摻雜物進入經沉積矽層，或者藉由原位形成經摻雜多晶矽區，以形成經摻雜之多晶矽區。之後在單一製程工具中，氧化層與寬能帶間隙經摻雜半導體層係形成於太陽能電池之前側及背側上。另一種作法是在氧化物與寬能帶間隙經摻雜半導體形成之前先粗化（texturizing）前表面及背表面。之後可形成穿過上層的接觸孔以曝露出經摻雜之多晶矽區。接著可進行金屬化製程以形成接觸至經摻雜之多晶矽層上。亦可藉由將金屬直接連接至矽基板上的射極區來形成第二組接觸，該射極區域係由位於太陽能電池之背側上的經摻雜之多晶矽區間之寬能帶間隙半導體層所形成。應理解本發明之實施例無需包括所繪示與說明之所有操作，並且這些實施例亦不會受到所繪示與說明者之限制。
請參照第4A圖，用於製造太陽能電池之基礎結構400包括矽基板402（例如N型單晶基板）、薄介電層406與經沉積矽層404。在某些實施例中，可在形成該薄介電層406前，先使矽基板402進行清潔、拋光、平面化與/或薄型化或其他處理。可透過熱製程來成長薄介電層406與經沉積矽層404。
請參照第4B圖與第4C圖，透過現有沉積製程沉積一層摻雜材料408於經沉積矽層404上方，接著沉積第一氧化物層410。該層摻雜材料408可包括摻雜材料或摻雜物409，並且可包含但不限於一層正型(positive-type)摻雜材料，例如硼，或一層負型(negative-type)摻雜材料，例如磷或砷。雖然薄介電層406與經沉積矽層404係分別描述為藉由熱製程進行成長或透過現有沉積製程進行沉積，然而各層皆可利用合適製程來形成。例如，可使用化學氣相沉積(CVD)製程、低壓化學氣相沉積(LPCVD)、大氣壓化學氣相沉積(APCVD)、電漿加強化學氣相沉積(PECVD)、熱成長或濺鍍製程以及其他合適技術。在一實施例中，藉由沉積技術、濺鍍或印刷製程，例如噴墨印刷或網印，或者藉由離子佈植來形成摻雜材料408於基板402上。
請參照第4D圖，所繪示者為接著將材料移除製程應用於第4C圖之結構的太陽能電池400。材料移除製程會形成曝露之多晶矽區424。材料移除製程的合適實例包括遮罩與蝕刻製程、雷射剝蝕製程及其他類似技術。曝露之多晶矽區424與該層摻雜材料408可經圖樣化，以具有用於最終射極形成之適當形狀與大小。合適之圖樣布線設計可包括但不限於形成交指圖樣(interdigitated pattern)。若是使用遮罩製程，則可利用網印機或噴墨印刷機以預定的交指圖案施用遮罩墨水。因此，可使用現有化學濕式蝕刻技術來移除遮罩墨水，從而形成曝露之多晶矽區424與該層摻雜材料408的交指圖樣。在一實施例中，移除部分或全部的第一氧化物層410。此移除可於移除經沉積矽層404區與介電層406之相同蝕刻或剝蝕製程中完成。
請參見第4E圖，可進行第二蝕刻製程以有利於蝕刻曝露之多晶矽區424，並且形成第一粗化矽區430於太陽能電池400之背側上，以及形成第二粗化矽區432於太陽能電池400之前側上，以提升太陽輻射之收集。粗化之表面可為具有規則或不規則形狀之表面者以散射入射光，進而減少由太陽能電池400之光接收表面反射回去的光量。
請參見第4F圖，可加熱440該太陽能電池400，以驅使摻雜材料409由該層摻雜材料408進入經沉積矽層404。相同的加熱440亦可形成矽氧化物或第二氧化物層412於該層摻雜材料408與第一粗化矽區430上方。在此製程期間，可成長第三氧化物層414於第二粗化矽區432上方。在一實施例中，氧化物層412、414皆係由高品質氧化物所構成。在一具體此類實施例中，高品質氧化物為一種低界面態密度之氧化物，其通常藉由熱氧化法在高於約攝氏900度之溫度下成長，並且此可對於基板402之曝露區提供改善之鈍化效果。
因此在一實施例中，藉由以熱氧化消耗一部分的半導體基板402以形成至少一部分之第二氧化物層412。在一此類實施例中，消耗該部分之半導體基板402包括熱氧化一部分之單晶N型矽基板，以形成二氧化矽(SiO2)層412於矽基板之曝露表面，並且該二氧化矽層之厚度為約3奈米或更低。在替代性之實施例中，藉由沉積介電材料層於第一粗化矽區430，以形成薄介電層於第一粗化矽區430上。在一此類實施例中，沉積包含形成氧化鋁(Al2O3)層於單晶N型矽基板之表面上。在具體的此類實施例，氧化鋁(Al2O3)層為非晶質氧化鋁( Al2O3)層。可藉由例如原子層沉積(ALD)，或者其他合適沉積技術來進行此類實施例。
請參見第4G圖，在一實施例中，可在氧化物層412、414形成期間達成經摻雜多晶矽層之形成，同時升溫以驅使摻雜物409由該層摻雜材料408進入經沉積矽層404。在一此類實施例中，用來自該層摻雜材料408之摻雜物409來摻雜經沉積矽層404，會形成結晶化之經摻雜多晶矽層或經摻雜多晶矽層450。在具體的此類實施例中，若使用正型摻雜材料，則經摻雜多晶矽層450為一層經正摻雜之多晶矽。在特定的此類實施例中，矽基板402係由主體N型矽基板所構成。在另一具體的實施例中，若使用負型摻雜材料，則經摻雜多晶矽層450為一層經負摻雜之多晶矽。在特定的此類實施例中，矽基板102係由主體P型矽基板所構成。總體而言，可用來自該層摻雜材料408之摻雜材料409來摻雜經沉積矽層404，因而形成經摻雜多晶矽層450。
請參照第4H圖，在未由用來形成氧化層412、414之製程工具的控制氛圍中移出基板402，第一寬能帶間隙經摻雜半導體層460係沉積於太陽能電池400之背側。在一實施例中，第一寬能帶間隙半導體層460之能帶間隙為高於半導體基板402之能帶間隙至少約0.2電子伏特(eV)。例如，第一寬能帶間隙半導體層460之能帶間隙，可高於能帶間隙為約1.0 eV之N型單晶矽基板之能帶間隙至少約0.2電子伏特(eV)。在一此類實施例中，第一寬能帶間隙半導體層460在可見光譜中實質上為透明。在具體的此類實施例中，第一寬能帶間隙半導體層460之能帶間隙大於約3 eV，並且由例如但不限於氮化鋁(AlN)、氮化鋁鎵（AlxGa1-xN，其中0 < x < 1）、氮化硼(BN)、4H-相碳化矽(4H-phase silicon carbide, SiC)（約3.23 eV）或6H-相碳化矽(6H-phase silicon carbide, SiC)（約3.05 eV）之材料所構成。在另一實施例中，半導體基板402係由單晶N型矽所構成，而且第一寬能帶間隙半導體層460之能帶間隙大於約1.5 eV並且係由例如但不限於非晶矽（a-Si，約1.5 eV）、碳化矽（SiC，高於約2.0 eV之不同相）、氮化鋁(AlN)、氮化鋁鎵（AlxGa1-xN，其中0 < x < 1）或氮化硼(BN)之材料所構成。
在一實施例中，在相同製程工具中形成氧化物層412、414與第一寬能帶間隙半導體層460包含使用低壓化學氣相沉積(LPCVD)反應室、快速熱退火(RTA)反應室、快速熱處理(RTP)反應室、常壓化學氣相沉積(APCVD)反應室、氫化物氣相磊晶(hydride vapor phase epitaxy, HVPE)反應室，或者同時使用快速熱處理反應室與電漿加強化學氣相沉積(PECVD)反應室。在一實施例中，「相同(same)」製程工具可為單一或多反應室之製程工具，只要其氛圍與罩蓋該製程工具之設施的氛圍為不同之控制氛圍。
在一實施例中，該方法用電荷載子摻雜物雜質原子(charge carrier dopant impurity atoms)來進一步摻雜第一寬能帶間隙半導體層460，且雜質原子之濃度範圍為約1 × 1017~1 × 1021原子/cm3。在一此類實施例中，在形成第一寬能帶間隙半導體層460期間原位進行該摻雜。在另一此類實施例中，在形成第一寬能帶間隙半導體層460後接著進行該摻雜。
請參見第4I圖，第二寬能帶間隙經摻雜半導體層462可沉積於太陽能電池400之前側上的第二粗化矽區432上方。在一實施例中，該層460與462係在相同製程操作中形成。然而在另一實施例中，該層460與462係在不同之製程操作中形成，並且可在相同或不同之製程工具中形成。在一實施例中，太陽能電池400之背側與前側上的寬能帶間隙經摻雜半導體層460、462均由寬能帶間隙經負型摻雜半導體所構成。在一實施例中，相較於該第一寬能帶間隙經摻雜半導體層460，該第二寬能帶間隙經摻雜半導體層462可為相對較薄。在具體的此類實施例中，第二薄寬能帶間隙經摻雜半導體層為第一厚寬能帶間隙經摻雜半導體層460之厚度的約10%至30%。在另一實施例中，太陽能電池400之背側與前側上的寬能帶間隙經摻雜半導體層460、462均由寬能帶間隙經正型摻雜半導體所構成。接著，抗反射塗覆(anti-reflective coating, ARC)層470可沉積於第二寬能帶間隙經摻雜半導體層462上方，如第4I圖中所繪示者。在一此類實施例中，該抗反射塗覆層470係由氮化矽所構成。
請參照第4J圖，進行太陽能電池400之背側上的第一寬能帶間隙經摻雜半導體層460、第二氧化物層412與該層摻雜材料408之部分移除，而形成一系列之接觸開口480。在一實施例中，可利用剝蝕製程來達成移除技術。一種此類剝蝕製程為雷射剝蝕製程。在另一實施例中，該移除技術可為現有圖樣化製程，例如遮罩之網印或噴墨印刷，接著進行蝕刻製程。在一實施例中，形成第一寬能帶間隙半導體層460包括形成一部分於至少一部分之經摻雜多晶矽層450上方，即使在圖樣化經摻雜多晶矽層450後，如第4J圖中所述者。
請參照第4K圖，第一金屬柵極或柵極線490係形成於太陽能電池400之背側。第一金屬柵極線490可在接觸開口480內電性耦接至經摻雜多晶矽450。在一實施例中，第一金屬柵極線490係形成為穿過接觸開口480至第一寬能帶間隙經摻雜半導體層460、第二氧化物層412與該層摻雜材料408，以連接由太陽能電池400供電之外部電路的正電端子。
請參照第4L圖，第二金屬柵極或柵極線492係形成於太陽能電池400之背側。第二金屬柵極線492可電性耦接至該第二粗化矽區432。在一實施例中，第二金屬柵極線492係耦接至第一寬能帶間隙經摻雜半導體層460、第二氧化物層412與第一粗化矽區430，作為太陽能電池400之背側區域中的異質接面，以連接由太陽能電池400供電之外部電路的負電端子。在某些實施例中，第4K圖與第4L圖中之金屬柵極線的形成係透過電鍍製程、網印製程、噴墨製程、鍍於由鋁金屬奈米粒子形成之金屬上或其他金屬化或金屬形成處理操作來進行。
因此，在一實施例中，第一射極區係形成自經摻雜多晶矽，而第二射極區係形成自寬能帶間隙半導體材料。然而在另一實施例中，第一射極區並非使用經摻雜多晶矽，而是亦形成自能帶間隙高於矽基板402之能帶間隙至少約0.2電子伏特(eV)的材料，例如高於單晶N型矽基板。
在另一態樣中，如上所述，請參照第4F圖，某些實施例包括在基板與寬能帶間隙界面間使用更異類(exotic)之氧化物層來作為鈍化層。在一例示性實施例中，一種此類太陽能電池包括矽基板。第一射極區係設置於矽基板之表面上，並且係由摻雜為第一傳導類型之氮化鋁(AlN)層所構成。氮化鋁層係設置於薄氧化鋁(Al2O3)層上。第二射極區係設置於矽基板之表面上，並且係由摻雜為第二相反傳導類型之半導體材料所構成。第二半導體材料係設置於薄介電層上。第一與第二接觸係設置於，並且分別傳導性耦接至第一與第二射極區。
在一此類實施例中，半導體材料之能帶間隙為高於矽基板之能帶間隙至少約0.2電子伏特(eV)。即，兩種射極區均包括寬能帶間隙材料。然而在另一此類實施例中，半導體材料係由多晶矽所構成，例如類似於第4A圖至第4K圖中所描述之結構者。在一實施例中，第一射極區係設置於矽基板表面之粗化部分上，而第二射極區係設置於矽基板表面之平坦部分上。
在一實施例中，第一與第二射極區係設置於半導體基板之背接觸表面。矽基板進一步包括相對於背接觸表面之光接收表面。光接收表面具有設置於其上之薄氧化鋁(Al2O3)層，以及設置於薄氧化鋁(Al2O3)層上之氮化鋁(AlN)層。在一實施例中，氮化鋁(AlN)層之一部分係設置於第二射極區之至少一部分上方，類似於第4J圖中所描述之結構。
本說明書中所述之數個實施例包括，藉由在單一製程工具中在矽基板之背側上提供薄介電層與經沉積之寬能帶間隙半導體層，而形成用於太陽能電池之射極區。應理解的是，其他實施例無需受此限制。例如，在一實施例中，藉由在單一製程工具中提供薄介電層與經沉積之寬能帶間隙半導體層於矽基板之背側上，來形成用於太陽能電池之鈍化層。無需自鈍化層形成射極區。
因此，已揭示具有由寬能帶間隙半導體材料所構成之射極區的太陽能電池與製造太陽能電池之方法。依據本發明之一實施例，一種方法包括在具有控制氛圍之製程工具中，形成薄介電層於太陽能電池之半導體基板的表面。半導體基板具有能帶間隙。在未將半導體基板由製程工具之控制氛圍中移出的情況下，接著將半導體層形成於薄介電層上。半導體層之能帶間隙為高於半導體基板之能帶間隙至少約0.2電子伏特(eV)。在一此類實施例中，該方法進一步包括由半導體層形成用於太陽能電池之射極區。在另一此類實施例中，形成半導體層包含形成在可見光譜中實質上為透明之層。
400．．．基礎結構
402．．．矽基板
406．．．薄介電層
408．．．摻雜材料
412．．．第二氧化物層
414．．．第三氧化物層
430．．．第一粗化矽區
450．．．經摻雜多晶矽層
460．．．第一寬能帶間隙經摻雜半導體層
462．．．第二寬能帶間隙經摻雜半導體層
470．．．抗反射塗覆層
490．．．第一金屬柵極線
492．．．第二金屬柵極線

Claims (35)

  1. 一種製造太陽能電池之方法，該方法包含：
    在具有一控制氛圍之一製程工具中，形成一薄介電層於該太陽能電池之一半導體基板的一表面上，該半導體基板具有一能帶間隙；以及
    在未將該半導體基板由該製程工具之該控制氛圍中移出的情況下，形成一半導體層於該薄介電層上，該半導體層之能帶間隙高於該半導體基板之能帶間隙至少約0.2電子伏特(eV)。
  2. 如申請專利範圍第1項所述之方法，其進一步包含：
    由該半導體層形成用於該太陽能電池之一射極區。
  3. 如申請專利範圍第1項所述之方法，其進一步包含：
    用電荷載子摻雜物雜質原子來進一步摻雜該半導體層，並且該電荷載子摻雜物雜質原子之濃度範圍為約1 × 1017至1 × 1021原子/cm3。
  4. 如申請專利範圍第3項所述之方法，其中在形成該半導體層期間在原位進行該摻雜。
  5. 如申請專利範圍第3項所述之方法，其中在形成該半導體層後接著進行該摻雜。
  6. 如申請專利範圍第1項所述之方法，其中形成該半導體層包含形成一在可見光譜中實質上為透明之層。
  7. 如申請專利範圍第6項所述之方法，其中形成該在可見光譜中實質上為透明之層包含形成一半導體層，且該半導體層之能帶間隙大於約3 eV並包含選自由氮化鋁(AlN)、氮化鋁鎵（AlxGa1-xN，其中0 < x < 1）、氮化硼(BN)、4H-相碳化矽(SiC)與6H-相碳化矽(SiC)所組成之群組的材料。
  8. 如申請專利範圍第1項所述之方法，其中該半導體基板包含單晶N型矽，且其中形成該半導體層包含形成能帶間隙大於約1.5 eV且包含選自由非晶矽（a-Si）、碳化矽、氮化鋁(AlN)、氮化鋁鎵（AlxGa1-xN，其中0 < x < 1）與氮化硼(BN)所組成之群組的材料之一半導體層。
  9. 如申請專利範圍第1項所述之方法，其中形成該薄介電層於該半導體基板之該表面包含以熱氧化消耗一部分的該半導體基板。
  10. 如申請專利範圍第9項所述之方法，其中消耗該部分的該半導體基板包括熱氧化一部分之一單晶N型矽基板，以形成一厚度為約3奈米或更少之一二氧化矽(SiO2)層。
  11. 如申請專利範圍第1項所述之方法，其中形成該薄介電層於該半導體基板之該表面包含沉積一介電材料層於該半導體基板之表面上。
  12. 如申請專利範圍第11項所述之方法，其中沉積該介電材料層於該半導體基板之該表面包含形成一氧化鋁(Al2O3)層於一單晶N型矽基板之表面。
  13. 如申請專利範圍第1項所述之方法，其中於該製程工具中形成該薄介電層與該半導體層包含使用一低壓化學氣相沉積(LPCVD)反應室、一快速熱退火(RTA)反應室、一快速熱處理(RTP)反應室、一常壓化學氣相沉積(APCVD)反應室、一氫化物氣相磊晶(HVPE)反應室，或者同時使用該快速熱處理反應室與一電漿增強化學氣相沉積(PECVD)反應室。
  14. 如申請專利範圍第1項所述之方法，其進一步包含：
    在形成該薄介電層前先粗化該半導體基板之該表面。
  15. 如申請專利範圍第1項所述之方法，其中形成該薄介電層與該半導體層於該半導體基板之該表面包含形成於該半導體基板之一背接觸表面上，該形成進一步包含形成該薄介電層與該半導體層於該半導體基板之一光接收表面上。
  16. 一種依據申請專利範圍第1項所述之方法製造的太陽能電池。
  17. 一種製造太陽能電池之方法，該方法包含：
    形成一第一射極區於該太陽能電池之一半導體基板的一表面上，該第一射極區包含經摻雜為一第一傳導類型並且形成於一第一薄介電層上之一半導體材料；以及
    形成一第二射極區於該半導體基板之該表面，該形成包含：
    在具有一控制氛圍之一製程工具中，形成一第二薄介電層於該半導體基板之該表面上，該半導體基板具有一能帶間隙；以及，
    在未將該半導體基板由該製程工具之該控制氛圍中移出的情況下，形成一寬能帶間隙半導體層於該第二薄介電層上，該寬能帶間隙半導體層之能帶間隙高於該半導體基板之能帶間隙至少約0.2電子伏特(eV)；以及
    用一第二相反之傳導類型的電荷載子摻雜物雜質原子來摻雜該寬能帶間隙半導體層。
  18. 如申請專利範圍第17項所述之方法，其中在形成該寬能帶間隙半導體層期間原位進行該摻雜。
  19. 如申請專利範圍第17項所述之方法，其中在形成該寬能帶間隙半導體層後接著進行該摻雜。
  20. 如申請專利範圍第17項所述之方法，其中該半導體基板包含單晶N型矽，並且其中形成該寬能帶間隙半導體層包含形成能帶間隙大於約1.5 eV且包含選自由非晶矽（a-Si）、碳化矽、氮化鋁(AlN)、氮化鋁鎵（AlxGa1-xN，其中0 < x < 1）與氮化硼(BN)所組成之群組的材料之一半導體層。
  21. 如申請專利範圍第20項所述之方法，其中形成該半導體材料包含形成能帶間隙高於該單晶N型矽基板之能帶間隙至少約0.2電子伏特(eV)的材料。
  22. 如申請專利範圍第20項所述之方法，其中形成該半導體材料包含形成一多晶矽層。
  23. 如申請專利範圍第17項所述之方法，其中形成該第二薄介電層於該半導體基板之該表面包含以熱氧化消耗一部分的該半導體基板。
  24. 如申請專利範圍第17項所述之方法，其中形成該第二薄介電層於該半導體基板之該表面包含沉積一介電材料層於該半導體基板之該表面。
  25. 如申請專利範圍第17項所述之方法，其中於該製程工具中形成該第二薄介電層與該寬能帶間隙半導體層包含使用一低壓化學氣相沉積(LPCVD)反應室、一快速熱退火(RTA)反應室、一快速熱處理(RTP)反應室、一常壓化學氣相沉積(APCVD)反應室、一氫化物氣相磊晶(HVPE)反應室，或者同時使用該快速熱處理反應室與一電漿加強化學氣相沉積(PECVD)反應室。
  26. 如申請專利範圍第17項所述之方法，其進一步包含：
    在形成該第二薄介電層前先粗化該半導體基板之該表面。
  27. 如申請專利範圍第17項所述之方法，其中形成該第二薄介電層與該寬能帶間隙半導體層於該半導體基板之該表面包含形成於該半導體基板之一背接觸表面，該形成進一步包含形成該第二薄介電層與該寬能帶間隙半導體層於該半導體基板之一光接收表面。
  28. 如申請專利範圍第17項所述之方法，其中形成該寬能帶間隙半導體層包含形成一部分於至少一部分的該第一射極區上方。
  29. 一種依據申請專利範圍第17項所述之方法製造的太陽能電池。
  30. 一種太陽能電池，其包含：
    一矽基板；
    一第一射極區，其係設置於該矽基板之一表面上並且包含一氮化鋁(AlN)層，該氮化鋁(AlN)層係經摻雜為一第一傳導類型並且設置於一氧化鋁(Al2O3)層上；
    一第二射極區，其係設置於該矽基板之該表面上並且包含一半導體材料，該半導體材料係經摻雜為一第二相反傳導類型並且設置於一薄介電層上；以及
    第一與第二接觸點，其係分別設置於且傳導性耦接至該第一射極區與該第二射極區。
  31. 如申請專利範圍第30項所述之太陽能電池，其中該半導體材料之能帶間隙高於該矽基板之能帶間隙至少約0.2電子伏特(eV)。
  32. 如申請專利範圍第30項所述之太陽能電池，其中該半導體材料包含多晶矽。
  33. 如申請專利範圍第32項所述之太陽能電池，其中該第一射極區係設置於該矽基板表面之一粗化部分上，而該第二射極區係設置於該矽基板表面之一平坦部分上。
  34. 如申請專利範圍第30項所述之太陽能電池，其中該第一射極區與該第二射極區係設置於該半導體基板之一背接觸表面上，該矽基板進一步包含：
    相對於該背接觸表面之一光接收表面，該光接收表面包含設置於其上之一薄氧化鋁(Al2O3)層，以及設置於該薄氧化鋁(Al2O3)層上之一氮化鋁(AlN)層。
  35. 如申請專利範圍第30項所述之太陽能電池，其中一部分之該氮化鋁(AlN)層係設置於至少一部分之該第二射極區上方。
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