TW201110206A - Method for cleaning a semiconductor device - Google Patents

Method for cleaning a semiconductor device Download PDF

Info

Publication number
TW201110206A
TW201110206A TW099116885A TW99116885A TW201110206A TW 201110206 A TW201110206 A TW 201110206A TW 099116885 A TW099116885 A TW 099116885A TW 99116885 A TW99116885 A TW 99116885A TW 201110206 A TW201110206 A TW 201110206A
Authority
TW
Taiwan
Prior art keywords
layer
main surface
cleaning
insulating layer
gate
Prior art date
Application number
TW099116885A
Other languages
English (en)
Chinese (zh)
Inventor
Hirokazu Kurisu
Yutaka Takeshima
Itaru Kanno
Masahiko Higashi
Yusaku Hirota
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW201110206A publication Critical patent/TW201110206A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H10P70/234—Cleaning during device manufacture during, before or after processing of insulating materials the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0698—Local interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
TW099116885A 2009-06-25 2010-05-26 Method for cleaning a semiconductor device TW201110206A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009151288A JP5326113B2 (ja) 2009-06-25 2009-06-25 半導体装置の洗浄方法

Publications (1)

Publication Number Publication Date
TW201110206A true TW201110206A (en) 2011-03-16

Family

ID=43381215

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099116885A TW201110206A (en) 2009-06-25 2010-05-26 Method for cleaning a semiconductor device

Country Status (3)

Country Link
US (2) US20100330794A1 (https=)
JP (1) JP5326113B2 (https=)
TW (1) TW201110206A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104658966A (zh) * 2013-11-21 2015-05-27 中芯国际集成电路制造(上海)有限公司 制作高k金属栅晶体管的接触孔的方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101809927B1 (ko) 2011-07-11 2017-12-18 쿠리타 고교 가부시키가이샤 메탈 게이트 반도체의 세정 방법
TWI517235B (zh) * 2013-03-01 2016-01-11 栗田工業股份有限公司 半導體基板洗淨系統以及半導體基板的洗淨方法
FR3013502A1 (fr) * 2013-11-20 2015-05-22 Commissariat Energie Atomique Procede de protection d’une couche de siliciure
US9536877B2 (en) * 2014-03-03 2017-01-03 Globalfoundries Inc. Methods of forming different spacer structures on integrated circuit products having differing gate pitch dimensions and the resulting products
JP6737436B2 (ja) 2015-11-10 2020-08-12 株式会社Ｓｃｒｅｅｎホールディングス 膜処理ユニットおよび基板処理装置
JP2017157863A (ja) * 2017-06-06 2017-09-07 セントラル硝子株式会社 ウェハの洗浄方法
US11152213B2 (en) * 2019-03-01 2021-10-19 International Business Machines Corporation Transistor device with ultra low-k self aligned contact cap and ultra low-k spacer
CN115802743B (zh) * 2022-11-11 2025-07-15 上海积塔半导体有限公司 半导体测试结构及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6664196B1 (en) * 1999-03-15 2003-12-16 Matsushita Electric Industrial Co., Ltd. Method of cleaning electronic device and method of fabricating the same
JP3434750B2 (ja) * 1999-09-30 2003-08-11 Ｎｅｃエレクトロニクス株式会社 洗浄装置のライン構成及びその設計方法
US7008872B2 (en) * 2002-05-03 2006-03-07 Intel Corporation Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures
JP2006100378A (ja) * 2004-09-28 2006-04-13 Renesas Technology Corp 半導体装置及びその製造方法
KR100655647B1 (ko) * 2005-07-04 2006-12-08 삼성전자주식회사 반도체 기판용 세정액 조성물, 이의 제조 방법, 이를이용한 반도체 기판의 세정 방법 및 반도체 장치의 제조방법
JP4362785B2 (ja) * 2006-09-28 2009-11-11 エルピーダメモリ株式会社 半導体装置の製造方法
JP2010205782A (ja) * 2009-02-27 2010-09-16 Renesas Electronics Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104658966A (zh) * 2013-11-21 2015-05-27 中芯国际集成电路制造(上海)有限公司 制作高k金属栅晶体管的接触孔的方法

Also Published As

Publication number Publication date
JP5326113B2 (ja) 2013-10-30
US20130189835A1 (en) 2013-07-25
JP2011009452A (ja) 2011-01-13
US20100330794A1 (en) 2010-12-30

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