TW201042719A - Plasma etching method for etching an object - Google Patents

Plasma etching method for etching an object Download PDF

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Publication number
TW201042719A
TW201042719A TW098124875A TW98124875A TW201042719A TW 201042719 A TW201042719 A TW 201042719A TW 098124875 A TW098124875 A TW 098124875A TW 98124875 A TW98124875 A TW 98124875A TW 201042719 A TW201042719 A TW 201042719A
Authority
TW
Taiwan
Prior art keywords
etched
mask
etching
plasma etching
opening
Prior art date
Application number
TW098124875A
Other languages
English (en)
Chinese (zh)
Inventor
Masatoshi Miyake
Nobuyuki Negishi
Masatoshi Oyama
Tadamitsu Kanekiyo
Masaru Izawa
Original Assignee
Hitachi High Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Tech Corp filed Critical Hitachi High Tech Corp
Publication of TW201042719A publication Critical patent/TW201042719A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
TW098124875A 2009-05-22 2009-07-23 Plasma etching method for etching an object TW201042719A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009124508A JP2010272758A (ja) 2009-05-22 2009-05-22 被エッチング材のプラズマエッチング方法

Publications (1)

Publication Number Publication Date
TW201042719A true TW201042719A (en) 2010-12-01

Family

ID=43124841

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098124875A TW201042719A (en) 2009-05-22 2009-07-23 Plasma etching method for etching an object

Country Status (4)

Country Link
US (1) US20100297849A1 (enExample)
JP (1) JP2010272758A (enExample)
KR (1) KR101167624B1 (enExample)
TW (1) TW201042719A (enExample)

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TWI657502B (zh) * 2014-02-24 2019-04-21 日商東京威力科創股份有限公司 蝕刻方法

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US8975185B2 (en) 2012-11-26 2015-03-10 Spansion, Llc Forming charge trap separation in a flash memory semiconductor device
JP2014225501A (ja) 2013-05-15 2014-12-04 東京エレクトロン株式会社 プラズマエッチング方法及びプラズマエッチング装置
JP6339963B2 (ja) * 2015-04-06 2018-06-06 東京エレクトロン株式会社 エッチング方法
US9934984B2 (en) 2015-09-09 2018-04-03 International Business Machines Corporation Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication
CN106548933B (zh) * 2015-09-23 2020-07-17 北京北方华创微电子装备有限公司 一种刻蚀工艺
JP2018046185A (ja) * 2016-09-15 2018-03-22 東京エレクトロン株式会社 酸化シリコン及び窒化シリコンを互いに選択的にエッチングする方法
US10775323B2 (en) * 2016-10-18 2020-09-15 Kla-Tencor Corporation Full beam metrology for X-ray scatterometry systems
JP2020141033A (ja) * 2019-02-27 2020-09-03 東京エレクトロン株式会社 堆積処理方法及びプラズマ処理装置
JP7721458B2 (ja) * 2022-02-21 2025-08-12 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理システム

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
TWI657502B (zh) * 2014-02-24 2019-04-21 日商東京威力科創股份有限公司 蝕刻方法

Also Published As

Publication number Publication date
US20100297849A1 (en) 2010-11-25
KR101167624B1 (ko) 2012-07-20
JP2010272758A (ja) 2010-12-02
KR20100126149A (ko) 2010-12-01

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