TW200917392A - Semiconductor device and method of bump formation - Google Patents

Semiconductor device and method of bump formation Download PDF

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Publication number
TW200917392A
TW200917392A TW097123558A TW97123558A TW200917392A TW 200917392 A TW200917392 A TW 200917392A TW 097123558 A TW097123558 A TW 097123558A TW 97123558 A TW97123558 A TW 97123558A TW 200917392 A TW200917392 A TW 200917392A
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TW
Taiwan
Prior art keywords
layer
bump
pad
seed layer
protective layer
Prior art date
Application number
TW097123558A
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English (en)
Inventor
Chiu-Shun Lin
Chia-Hui Wu
Wen-Chieh Tu
Original Assignee
Himax Tech Ltd
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Publication date
Application filed by Himax Tech Ltd filed Critical Himax Tech Ltd
Publication of TW200917392A publication Critical patent/TW200917392A/zh

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

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200917392 rw 25873twf.d〇c/n , 九、發明說明： 【發明所屬之技術領域】 本發明是有關於-種電子裝置及其製程，且特別是有 關於一種半導體元件與凸塊製作方法。 【先前技術】 覆晶技術為一經常應用在晶片級封裝（Chip kde Packaging，CSP)的封裝技術。由於覆晶技術對於接墊在晶 #上的配置採用平面陣列式（—a Array)，因而能夠； 減封裳面積。此外，由於覆晶技術採用凸塊來電性連接晶 片與承載器，因而能夠縮短訊號傳輸路徑。 一般而言，晶片表面覆蓋有一保護層，其存在一覆蓋 晶片表面且暴露出晶片之銘接整的。當進行覆晶技術在進 行時，會先在保護層與接墊上形成一凸塊下金屬層（Under Bump Metal，UBM)。然後，在凸塊下金屬層上形成一光 阻層，但光阻層會暴露位於接墊之上的部分凸塊下金屬 層。接著，在位於接墊之上的部分凸塊下金屬層上形成金 ‘ 凸塊。之後’剝除光阻層。其後’似彳掉不在金凸塊與結 接墊之間的其他部分之凸塊下金屬層。為了避免過度侧 在，凸塊與紹接墊之間的凸塊下金屬層，金凸塊必須部分 重豐保護層至足夠的程度，這會使得金凸塊之上表面的粗 链度增加。舉例而言，金凸塊之上表面的邊緣會朝遠雜 接墊的方向突出。當金凸塊經由一異方性導電膜 (Anisotropic Conductive Film，ACF)接合至承載器時， 上表面的粗糙度之增加會使得金凸塊的某些部分無法壓迫 TW 25873twf.doc/n 200917392 到異方性導電膜中的導電顆粒 間的導電性。 【發明内容】 料降低晶片與承载器之 有鑑於此，本發明提出一 半導體元件。 種凸塊具有較平坦之表面的 坦表面 本發明提出一種在半導體基板上形成有較平 之凸塊的凸塊製作方法。
本發明之一實施例提出一種半導體元件，其 導體基板、-接墊、-保護層、一凸塊以及子層。半 導體基板具有一主動表面。接墊配置於主動表面上7保t 層配置於主動表面上且暴露接墊的一中央部分。種子層配 置於接墊之外露的中央部分上。凸塊具有—上表面、二相 對於上表面之下表面以及一連接上表面與下表面之側表 面。凸塊配置於種子層上。凸塊是以下表面及部分側表面 接觸種子層。 在本發明之一實施例中’種子層未直接連接至保讀 Μ ° … 在本發明之一實施例中，種子層覆蓋接墊的中央部 分’並覆蓋圍繞接塾之中央部分的保護層。 在本發明之一實施例中，在種子層下方之保護層小於 3微米。 在本發明之一實施例中’半導體基板包括一積體電 路。 在本發明之一實施例中，接墊為一金屬墊。 200917392 ------------W 25873twf.doc/n 在本發明之一實施例中，凸塊為一金屬凸塊。 在本發明之一實施例中，種子層為—凸塊下金屬層。 r %
本务明之另一實施例提出一種凸塊製作方法，包括下 列步驟。首先，提供一半導體基板，其具有—主動表面， 其中主動表面上配置有一接墊及一保護層。保護層具有一 開口以暴露出接墊。然後，形成一第一光阻層於保護層上， 其中第一光阻層具有一上表面以及至少一連接至上表面的 側壁面，且侧壁面定義出一暴露部分接墊的開口。之後， 形成一種子層於上表面、侧壁面及接墊上。其後，形成一 第二光阻層於種子層之位於上表面上的—部分，並暴露出 種子層之在開口内的另一部分。接著，在開口及在種子層 上形成一凸塊。再來’移除第二光阻層。然後，移除種子 層之位於上表面上的部分。其後，移除第一光阻層。 在本發明之-實施例中，保護層的開口暴露二接塾的 一中央部分。 在本發明之-實_巾’在g—絲層的形成步驟 中，弟一光阻層覆蓋接墊之中央部分的邊緣。 f本發明之-實施财，在第—絲層的形成步驟 中，弟-光阻層之側壁面所定義出的開口以小於3 程度暴路出圍繞中央部分的部分保護層。 在本發明之-實關巾，在帛—絲層的 中，更包括使第-絲層的_面實f上位在—介= 之中央部分及保護層之間的交界線上。 、牧雙 在本發明之-實施例中，凸塊的形成步驟是藉由電鎮 200917392 「w 25873twf.doc/n 來形成凸塊。 在本發明之一實施例中，種子層移除步驟是藉由蝕刻 來移除在上表面之上的種子層。 在本發明之實施例的半導體元件中，凸塊是以部分侧 表面接觸種子層，這可避免位於凸塊與接墊之間的種子層 在製造過程中被過度蝕刻，所以凸塊無須部分重疊保護層 至足夠的程度以避免種子層被過度钱刻，因而使得凸塊具 C： 有一較平坦之表面。此外，在本發明之實施例的凸塊製作 方法中，當蝕刻種子層時，在種子層下方的第一光阻層仍 存在且圍繞著凸塊，這能避免位於凸塊與接墊之間的種子 層被過度钱刻。如此一來，凸塊無須部分重疊保護層至足 夠的程度以避免種子層被過度蝕刻，所以凸塊能夠具有一 較平坦之表面。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉本發明之實施例，並配合所附圖式，作詳 細說明如下。 0 【實施方式】 圖1是根據本發明之一實施例之半導體元件的剖面示 意圖。請參照圖1，本實施例之半導體元件10〇包括一半 導體基板110、多個接墊120、一保護層130、多個凸塊140 以及多個種子層150。然而，在圖1中以一個接墊12〇、一 個凸塊140以及一個種子層15〇為代表。半導體基板11〇 具有一主動表面112。各接墊120配置於主動表面112上， 且例如為一金屬墊。在本實施例中，半導體基板11()例如 200917392 -------------rW 25873twf.doc/n 為-晶片，其包括-電性連接至接塾12〇之積體電路。保 護層130配置於主動表面112上，且暴露出各接塾—之 一中央部分122。保護層例如為一絕緣層。 種子層150配置於接墊12〇之外露的中央部分 上。凸塊140具有一上表面142、一相對於上表面142之 下表面144以及至少一連接上表面142與下表面144之側 表面146。凸塊140例如為一金屬凸塊。此外，凸塊14〇 Γ：配置於種子層150上。凸塊140是以下表® 144及部分侧 表面146接觸種子層15(^在本實施例中，種子層15〇為 凸塊下金屬層，其可以是由多層所|且合而成的膜層。舉 例而言，當凸塊140為一金凸塊且接墊12〇為一鋁墊時， 凸塊下金屬層包括一形成在鋁墊上之鈦鎢（Titanium Tungsten)層152以及一形成在鈦鎢層152與凸塊14〇之 間的金層154。 在本實施例之半導體元件1〇〇中，凸塊140是以部分 I 側表面I46接觸種子層150，這可避免位於凸塊14〇與接 塾120之間的種子層⑼在製造過程中被過度钱刻，所以 凸塊140無須部分重疊保護層13〇至足夠的程度以避免種 子層150被過度蝕刻，因而使得凸塊14〇具有一較平坦之 ^表面142。在本實施例中，種子層15〇未直接連接至保 瘦層130。亦即是說，凸塊14〇與保護層13〇未部分重疊， 所以凸塊140之上表面142的粗糙度可小於1微米。如此 —來，半導體元件1〇〇與凸塊14〇所接合之一承載器（未 '々示）之間的導電率便能夠較佳。舉例而言，這是因為較 200917392 ▲ “ - — i W" 2.5873twf.doc/x][ 平坦之上表面142可均勻地壓迫在使凸塊140接合至承載 益之一異方性導電膜中的導電顆粒。另外’由於凸塊14〇 無須部分重疊保護層130，因此凸塊140之寬度S可以較 小’這能夠增加半導體元件1〇〇與承載器的佈局（lay〇ut) 彈性。 圖2是根據本發明之另一實施例之半導體元件的剖面 示意圖。本實施例之半導體元件l〇〇a類似於上述在圖1 中之半導體元件100’而兩者之差異如下所述。在半導體 元件100a中’種子層150覆蓋接墊120之中央部分122， 且凸塊恰好沒部分重疊到保護層130。半導體元件10如具 有類似上述半導體元件100之優點，而在此不再重述。 圖3是根據本發明之又一實施例之半導體元件的剖面 示意圖。本貫施例之半導體元件l〇〇b類似於上述在圖1 中之半導體元件100，而兩者之差異如下所述。在半導體 元件100b中，種子層150覆蓋接墊12〇之中央部分122， 並覆蓋圍繞接墊120之中央部分122的保護層13〇。在本 實施例中，在種子層150下方之保護層13〇小於3微米。 換言之，在圖3中所繪示之寬度W1小於3微米。亦即是 說，凸塊140稍微地部分重疊保護層13〇，所以凸塊14〇 之上表面142仍然比習知之凸塊的上表面來得平坦。因 此，半導體元件100b仍具有類似上述半導體元件1〇〇之優 點，而在此不再重述。 圖4A至4H繪示本發明之一實施例之凸塊製作方法 的步驟。凸塊製作方法可用以製造上述在圖1中之半導體 200917392 rw 25873twf.doc/n 元件100 ’且包括下列步驟。首先，請參照圖4A，提供一 半導體基板110’其具有一主動表面112，其中主動表面 112上配置於有一接墊120及一保護層no，而保護層13〇 具有一開口 132以暴露出接墊120。在本實施例中，保護 層130的開口 132暴露出接墊120的一中央部分122。然 後，請參照圖4B，形成一第一光阻層16〇於保護層13〇 上，其中第一光阻層160具有一上表面162以及至少一連 接至上表面162的側壁面164，且側壁面164定義出—暴 露部分接墊120的開口 166。在本實施例中，第一光阻層 160是以微影術（photolithography)來形成。此外，在本 實施例中，第一光阻層160覆蓋接墊12〇之中央部分122 的邊緣。之後，請參照圖4C，形成一種子層150於上表面 162、側壁面164以及接墊120上。在本實施例中，種子層 150的材料為凸塊下金屬，其如同圖1中之種子層Μ。的 材料。其後，請參照圖4D，形成一第二光阻層18〇於種子 層150之位在上表面162上的一部分，並暴露出種子層15〇 之在開口 166内的另一部分。在本實施例中，第二光阻層 180亦可是以微影術來形成。接著，請參照圖4E，在開口 166及在種子層150上形成一凸塊14〇。在本實施例中，凸 塊140疋是藉由電鍍來形成。再來，請參照圖4f，移除第 二光阻層180。然後，請參照圖4(}，移除種子層15〇之位 於上表面162上的部分。在本實施例中，在上表面162上 之種子層15〇是是藉由侧來移除。具體而言，在本實施 例中’種子層15G的金層154例如是藉由蛾倾（pGtassium 11 200917392 一—- TW 25873twf.doc/n
Iodide，KI)溶液來姓刻，而種子層150的鈦鶴層152例如 是藉由過氣化氳（Hydrogen Peroxide，H202)溶液來钱刻。 其後’睛參照圖4H，移除第一光阻層160。至此，即完成 本實施例之凸塊製作方法。 在本實施例之凸塊製作方法中，當蝕刻種子層150 時，在種子層150下方的第一光阻層160仍存在且圍繞著 凸塊140，這能避免過度蝕刻位於凸塊140與接墊12〇之 間的種子層150。如此一來，凸塊140無須部分重疊保護 層130至足夠的程度以避免種子層被過度蝕刻，所以凸塊 140能夠具有一較平坦之上表面142。 圖5繪示本發明之另一實施例之顯示凸塊製作方法的 步驟。本實施例之凸塊製作方法類似於上述在圖4A至4H 中之凸塊製作方法’而兩者之差異如下所述。請參照圖5， 在本實施例中’當形成第一光阻層160時，第一光阻層160 之侧壁面164實質上位在一介於接墊120之中央部分in 以及保護層130之間的交界線B上。本實施例中之凸塊製 作方法可形成圖2中之凸塊140。 圖6繪示本發明之又一實施例之顯示凸塊製作方法的 步驟。本實施例之凸塊製作方法類似於上述在圖4A至4H 中之凸塊製作方法，而兩者之差異如下所述。請參照圖6， 在本實施例中，當形成第一光阻層160時，第一光卩且層wo 之側壁面164所定義出的開口 166以小於3微米的程度暴 露出圍繞中央部分122的部分保護層丨30。換言之，在圖6 中所给示之寬度W2小於3微米。本實施例中之凸塊製作 12 200917392 25873twf.doc/n 方法可形成圖3中之凸塊140。 紅上所述’在本發明之實施例的半導體元件t ’凸塊 疋以4力側表面接觸種子層。這可避免位於凸塊與接墊之 間的種子層在製造過程中被過度蝕刻，所以凸塊無須部分 重=保護層至足夠的程度以避免種子層被過度蝕刻，因而 使得凸塊具有-較平坦之表面。如此―來，半導體元件與 凸塊所接合的一承載器之間的導電率便能夠較佳。另外， 由於凸塊域縣重#賴層，凸塊之寬度可較小，這能 夠增加半導體元件及承載器的佈局彈性。 此外，在本發明之實施例的凸塊製作方法中，當蝕刻 種子層時，在種子層下方的第一光阻層仍存在且圍繞著凸 塊^能避免過度侧位於凸塊與接墊之間的種子層。如 此-來’凸塊無_分重疊倾層至足夠雜度以避免種 子層被過度_，所以凸塊能夠具有—較平坦之表面。 c 本發明已以實施例揭露如上，然錢非用以限定 所屬技術領域中具有通常知識者，在不脫離 it日=和内’當可作些許之更動與潤錦，因此 準：月之保€範圍當視後附之巾請專利範圍所界定者為 【圖式簡單說明】 意圖圖1是根據本發明之—實施例之半導體元件的剖面示 示意Ξί是根據本發明之另—實施例之半導體7^件的剖面 13 200917392 rW 25873twf.doc/n 圖3是根據本發明之又一實施例之半導體元件的剖面 示意圖。 圖4A至4H繪示本發明之一實施例之顯示凸塊製作 方法的步驟。 圖5繪示本發明之另一實施例之顯示凸塊製作方法的 步驟。 圖6繪示本發明之又一實施例之顯示凸塊製作方法的 步驟。 ~ 【主要元件符號說明】 100 :半導體元件 100a :半導體元件 100b :半導體元件 110 :半導體基板 112 :主動表面 120 :接墊 122 :中央部分 1/ 130 :保護層 132 :開口 140 :凸塊 142 :上表面 144 :下表面 146 :側表面 150 :種子層 152 :鈦鎢層 14 200917392 25873twf.doc/n 154 ： 金層 160 : 第一光阻層 162 ： 上表面 164 ： 侧壁面 166 ： 開口 180 ： 第二光阻層 W1 ： 寬度 W2 ： 寬度

Claims (1)

  1. 200917392 rw 25873twf.doc/n 十、申請專利範圍·· L 一種半導體元件，包括： 一半導體基板，具有-主動表面； 一接墊，配置於該主動表面上； 一保護層，配置於該主動I 分； 動表面上且暴露該接墊的一中央部 墊之外露的該中央部分上;以及 O 一連表面以及 上， 側表面，該凸塊配置於該種子層 f中該以該下表面及部分該側表面接觸該種子声。 2.如帽專利細第丨項所述之轉體 曰 子層未直接連接該保護層。 /、Τ这種 3‘如申請專利範圍第】項所述之半導體元件，盆中 子層覆蓋該雜賴巾央部分，並紐圍_祕之該中= 分的該保護層。 、° 4. 如申請專利範圍第3項所述之半導體元件，其歹 種子層下方之該保護層小於3微米。 '、 ^ 5. 如申請專利範圍第1項所述之半導體元件，i中 導體基板包括一積體電路。 6. 如申請專利範圍第1項所述之半導體元件，其中該招 墊為一金屬墊。 7. 如申請專利範圍第1項所述之半導體元件，其中該^ 塊為一金屬凸塊。 ^ 〇Χ 16 rW 25873twf.doc/n 200917392 8·如申請專利範圍第1項所述之半導體元件，其中該種 子層為一凸塊下金屬層。 9. 一種凸塊製作方法，包括： 提供一半導體基板，其具有一主動表面，其中該主動表面 上配置有一接墊及一保護層，該保護層具有一開口以暴露^★亥 接墊； ' ~ 形成一第一光阻層於該保護層上’其中該第一光阻層具有 一上表面以及至少一連接至該上表面的側壁面，且該侧壁面定 義出一暴露部分該接墊的開口； 形成一種子層於該上表面、該側壁面及該接墊上； 形成一第二光阻層於該種子層之位於該上表面上的一部 分，並暴露出該種子層之在該開口内的另一部分； 在该開口及在該種子層上形成一凸塊； 移除該第二光阻層； 移除該種子層之位於該上表面上的該部分；以及 移除該第一光阻層。 10. 如申請專利範圍第9項所述之凸塊製作方法，其中該 保護層的該開口暴露出該接墊的一中央部分。 11. 如申請專利範圍第1〇項所述之凸塊製作方法，其中 在該第一光阻層的形成步驟中，該第一光阻層覆蓋該接墊之該 中央部分的邊緣。 12. 如申請專利範圍第1〇項所述之凸塊製作方法，其中 在该第一光阻層的形成步驟中，該第一光阻層之該側壁面所定 義出的該開口以小於3微米的程度暴露出圍繞該中央部分的 17 TW 25873twf.doc/n 200917392 部分該保護層。 13. 如申請專利範圍第10項所述之凸塊製作方法，其中 在該第一光阻層的形成步驟中，更包括使該第一光阻層的^側 壁面實質上位於一介於該接墊之該中央部分及該保二 的交界線上。 ^之間 14. 如申晴專利範圍第9項所述之凸塊製作方法，政 凸塊的形成麵是藉由電錄賴該凸塊。 〃 如申請專利範圍第9項所述之凸塊製作方法，其 ㈢移除步驟是藉由蝴來瓣在該上表面上魄種子層: 18
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