TW200845342A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
TW200845342A
TW200845342A TW097107439A TW97107439A TW200845342A TW 200845342 A TW200845342 A TW 200845342A TW 097107439 A TW097107439 A TW 097107439A TW 97107439 A TW97107439 A TW 97107439A TW 200845342 A TW200845342 A TW 200845342A
Authority
TW
Taiwan
Prior art keywords
lead
wafer
pad
semiconductor device
internal
Prior art date
Application number
TW097107439A
Other languages
English (en)
Chinese (zh)
Inventor
Kazuyuki Misumi
Kazushi Hatauchi
Yasuki Takata
Naoya Yasuda
Hideyuki Arakawa
Fukudome Katsuyuki
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200845342A publication Critical patent/TW200845342A/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49558—Insulating layers on lead frames, e.g. bridging members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6638—Differential pair signal lines
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48253—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a potential ring of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01082—Lead [Pb]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
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    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW097107439A 2007-03-06 2008-03-04 Semiconductor device TW200845342A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007055247A JP2008218776A (ja) 2007-03-06 2007-03-06 半導体装置

Publications (1)

Publication Number Publication Date
TW200845342A true TW200845342A (en) 2008-11-16

Family

ID=39740812

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097107439A TW200845342A (en) 2007-03-06 2008-03-04 Semiconductor device

Country Status (4)

Country Link
US (1) US7763966B2 (enExample)
JP (1) JP2008218776A (enExample)
CN (1) CN101261973B (enExample)
TW (1) TW200845342A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5499696B2 (ja) 2009-12-25 2014-05-21 富士通セミコンダクター株式会社 半導体装置及び実装構造
CN104851863B (zh) * 2015-04-17 2017-11-28 华为技术有限公司 一种集成电路、引线键合封装芯片及倒装封装芯片
DE112019003540T5 (de) * 2018-07-12 2021-03-25 Rohm Co., Ltd. Halbleiterbauteil

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JPS5530210A (en) * 1978-08-25 1980-03-04 Hitachi Ltd Transistor amplifier circuit
JP2580674B2 (ja) 1988-02-08 1997-02-12 三菱電機株式会社 高周波用モールド型パッケージ
JP2880734B2 (ja) * 1989-08-31 1999-04-12 株式会社東芝 集積回路及びその接続回路
JPH0714976A (ja) 1993-06-24 1995-01-17 Shinko Electric Ind Co Ltd リードフレーム及び半導体装置
US5343074A (en) * 1993-10-04 1994-08-30 Motorola, Inc. Semiconductor device having voltage distribution ring(s) and method for making the same
JP2866572B2 (ja) * 1994-02-07 1999-03-08 三菱電機株式会社 半導体製造方法
KR0148077B1 (ko) * 1994-08-16 1998-08-01 김광호 분리된 다이 패드를 갖는 반도체 패키지
US5949132A (en) * 1995-05-02 1999-09-07 Texas Instruments Incorporated Dambarless leadframe for molded component encapsulation
DE69735361T2 (de) * 1996-07-03 2006-10-19 Seiko Epson Corp. Harzverkapselte halbleiteranordnung und herstellungsverfahren dafür
US6118173A (en) * 1996-11-14 2000-09-12 Nippon Steel Semiconductor Corporation Lead frame and a semiconductor device
US5903050A (en) * 1998-04-30 1999-05-11 Lsi Logic Corporation Semiconductor package having capacitive extension spokes and method for making the same
JP4373531B2 (ja) * 1999-06-18 2009-11-25 パナソニック株式会社 差動平衡信号伝送基板
JP2001102488A (ja) * 1999-09-28 2001-04-13 Hitachi Cable Ltd 半導体装置
US6198163B1 (en) * 1999-10-18 2001-03-06 Amkor Technology, Inc. Thin leadframe-type semiconductor package having heat sink with recess and exposed surface
JP2002084107A (ja) * 2000-07-04 2002-03-22 Matsushita Electric Ind Co Ltd 伝送線路を有する多層配線基板
JP4319339B2 (ja) * 2000-08-30 2009-08-26 株式会社ルネサステクノロジ 半導体装置
US6538336B1 (en) * 2000-11-14 2003-03-25 Rambus Inc. Wirebond assembly for high-speed integrated circuits
TW490826B (en) * 2001-05-02 2002-06-11 Siliconware Precision Industries Co Ltd Semiconductor package device and its manufacture method
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US7479680B2 (en) * 2005-11-30 2009-01-20 California Micro Devices Method and apparatus that provides differential connections with improved ESD protection and routing
US8294249B2 (en) * 2008-08-05 2012-10-23 Integrated Device Technology Inc. Lead frame package

Also Published As

Publication number Publication date
JP2008218776A (ja) 2008-09-18
US7763966B2 (en) 2010-07-27
US20080217750A1 (en) 2008-09-11
CN101261973B (zh) 2011-12-21
CN101261973A (zh) 2008-09-10

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