TW200818292A - Semiconductor device and method for manufacturing the same - Google Patents

Semiconductor device and method for manufacturing the same Download PDF

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Publication number
TW200818292A
TW200818292A TW096128851A TW96128851A TW200818292A TW 200818292 A TW200818292 A TW 200818292A TW 096128851 A TW096128851 A TW 096128851A TW 96128851 A TW96128851 A TW 96128851A TW 200818292 A TW200818292 A TW 200818292A
Authority
TW
Taiwan
Prior art keywords
pattern
semiconductor
integrated circuit
semiconductor integrated
semiconductor device
Prior art date
Application number
TW096128851A
Other languages
English (en)
Chinese (zh)
Other versions
TWI344175B (https=
Inventor
Yukihiro Tanemura
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Publication of TW200818292A publication Critical patent/TW200818292A/zh
Application granted granted Critical
Publication of TWI344175B publication Critical patent/TWI344175B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041Photolithographic processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/04Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
    • B23K26/042Automatically aligning the laser beam
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/351Working by laser beam, e.g. welding, cutting or boring for trimming or tuning of electrical components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H10W20/494Fuses, i.e. interconnections changeable from conductive to non-conductive changeable by the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/301Marks applied to devices, e.g. for alignment or identification for alignment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/501Marks applied to devices, e.g. for alignment or identification for use before dicing
    • H10W46/503Located in scribe lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/601Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/603Formed on wafers or substrates before dicing and remaining on chips after dicing

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Laser Beam Processing (AREA)
TW096128851A 2006-09-05 2007-08-06 Semiconductor device and method for manufacturing the same TW200818292A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006240324A JP5076407B2 (ja) 2006-09-05 2006-09-05 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
TW200818292A true TW200818292A (en) 2008-04-16
TWI344175B TWI344175B (https=) 2011-06-21

Family

ID=39288840

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096128851A TW200818292A (en) 2006-09-05 2007-08-06 Semiconductor device and method for manufacturing the same

Country Status (4)

Country Link
US (1) US7781901B2 (https=)
JP (1) JP5076407B2 (https=)
KR (1) KR100904197B1 (https=)
TW (1) TW200818292A (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103227123A (zh) * 2012-01-27 2013-07-31 半导体元件工业有限责任公司 半导体装置及其自动外观检查方法

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006019911A1 (en) * 2004-07-26 2006-02-23 Sun Microsystems, Inc. Multi-chip module and single-chip module for chips and proximity connectors
JP5263918B2 (ja) * 2007-07-24 2013-08-14 日本電気株式会社 半導体装置及びその製造方法
JP5353035B2 (ja) * 2008-03-17 2013-11-27 富士電機株式会社 半導体装置およびその製造方法
JP5266857B2 (ja) * 2008-04-24 2013-08-21 ミツミ電機株式会社 チップのアライメント方法
JP2010074106A (ja) * 2008-09-22 2010-04-02 Nec Electronics Corp 半導体チップ、半導体ウェーハおよびそのダイシング方法
WO2017027505A1 (en) * 2015-08-10 2017-02-16 Delta Design, Inc. Ic device-in-pocket detection with angular mounted lasers and a camera
KR102403730B1 (ko) 2018-01-22 2022-05-30 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지
CN113394193B (zh) * 2020-03-13 2022-03-22 长鑫存储技术有限公司 半导体结构及其形成方法、激光熔丝的熔断方法
KR102507592B1 (ko) * 2021-05-24 2023-03-09 한국과학기술원 Mems 소자의 제조 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01243419A (ja) * 1988-03-25 1989-09-28 Hitachi Ltd 位置合わせ方法
JPH1012527A (ja) * 1996-06-26 1998-01-16 Hitachi Ltd 半導体チップおよび半導体製造用レチクル
KR100298193B1 (ko) * 1998-06-16 2001-11-15 박종섭 웨이퍼의수평정렬을위한레티클
KR20000026310A (ko) * 1998-10-20 2000-05-15 김영환 반도체장치
JP3566133B2 (ja) 1999-05-11 2004-09-15 セイコーインスツルメンツ株式会社 半導体装置の製造方法
US6441504B1 (en) * 2000-04-25 2002-08-27 Amkor Technology, Inc. Precision aligned and marked structure
US7053495B2 (en) * 2001-09-17 2006-05-30 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device and method for fabricating the same
US6815838B2 (en) * 2002-02-20 2004-11-09 International Business Machines Corporation Laser alignment target and method
KR100463047B1 (ko) 2002-03-11 2004-12-23 삼성전자주식회사 반도체 장치의 퓨즈 박스 및 그 제조방법
JP2005109145A (ja) * 2003-09-30 2005-04-21 Toshiba Corp 半導体装置
JP4753170B2 (ja) * 2004-03-05 2011-08-24 三洋電機株式会社 半導体装置及びその製造方法
JP4673569B2 (ja) * 2004-03-31 2011-04-20 株式会社リコー 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103227123A (zh) * 2012-01-27 2013-07-31 半导体元件工业有限责任公司 半导体装置及其自动外观检查方法
CN103227123B (zh) * 2012-01-27 2016-01-20 半导体元件工业有限责任公司 半导体装置及其自动外观检查方法

Also Published As

Publication number Publication date
KR100904197B1 (ko) 2009-06-23
KR20080022041A (ko) 2008-03-10
US20080251950A1 (en) 2008-10-16
TWI344175B (https=) 2011-06-21
JP2008066381A (ja) 2008-03-21
JP5076407B2 (ja) 2012-11-21
US7781901B2 (en) 2010-08-24

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MM4A Annulment or lapse of patent due to non-payment of fees