TW200710965A - Method of forming align key in well structure formation process and method of forming element isolation structure using the align key - Google Patents

Method of forming align key in well structure formation process and method of forming element isolation structure using the align key

Info

Publication number
TW200710965A
TW200710965A TW095129643A TW95129643A TW200710965A TW 200710965 A TW200710965 A TW 200710965A TW 095129643 A TW095129643 A TW 095129643A TW 95129643 A TW95129643 A TW 95129643A TW 200710965 A TW200710965 A TW 200710965A
Authority
TW
Taiwan
Prior art keywords
align key
forming
region
well
ion implantation
Prior art date
Application number
TW095129643A
Other languages
English (en)
Inventor
Sung-Il Jo
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200710965A publication Critical patent/TW200710965A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
TW095129643A 2005-08-12 2006-08-11 Method of forming align key in well structure formation process and method of forming element isolation structure using the align key TW200710965A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050074477A KR100699860B1 (ko) 2005-08-12 2005-08-12 웰 구조 형성 과정에서 정렬 키를 형성하는 방법 및 이를이용한 소자 분리 형성 방법

Publications (1)

Publication Number Publication Date
TW200710965A true TW200710965A (en) 2007-03-16

Family

ID=37721998

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095129643A TW200710965A (en) 2005-08-12 2006-08-11 Method of forming align key in well structure formation process and method of forming element isolation structure using the align key

Country Status (6)

Country Link
US (1) US20070037359A1 (zh)
JP (1) JP2007053365A (zh)
KR (1) KR100699860B1 (zh)
CN (1) CN1913119A (zh)
DE (1) DE102006038374A1 (zh)
TW (1) TW200710965A (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3775508B1 (ja) * 2005-03-10 2006-05-17 株式会社リコー 半導体装置の製造方法及び半導体装置
KR100630768B1 (ko) * 2005-09-26 2006-10-04 삼성전자주식회사 캡핑층을 구비한 얼라인먼트 키 형성방법 및 이를 이용한반도체 장치의 제조방법
JP4718961B2 (ja) * 2005-09-30 2011-07-06 株式会社東芝 半導体集積回路装置及びその製造方法
KR100928510B1 (ko) * 2007-12-24 2009-11-26 주식회사 동부하이텍 임플란트 패턴 ｃｄ-ｋｅｙ 및 그 생성 방법
CN101894800A (zh) * 2010-05-28 2010-11-24 上海宏力半导体制造有限公司 高压cmos器件的制造方法
CN102403233B (zh) * 2011-12-12 2014-06-11 复旦大学 垂直沟道的隧穿晶体管的制造方法
JP2013187263A (ja) 2012-03-06 2013-09-19 Canon Inc 半導体装置、記録装置及びそれらの製造方法
KR101967753B1 (ko) * 2012-07-30 2019-04-10 삼성전자주식회사 반도체 장치의 제조 방법
CN102856164B (zh) * 2012-09-07 2016-04-13 无锡华润上华科技有限公司 一种提高对位标记清晰度的方法
CN104779241B (zh) * 2015-04-29 2017-10-20 上海华虹宏力半导体制造有限公司 外延工艺中光刻标记的制作方法
CN105810568A (zh) * 2016-05-17 2016-07-27 上海华力微电子有限公司 减少零层对准光罩使用的方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3149428B2 (ja) * 1998-10-09 2001-03-26 日本電気株式会社 半導体装置の製造方法
KR100299519B1 (ko) * 1999-06-24 2001-11-01 박종섭 반도체 소자의 정렬 키 형성방법
US6656815B2 (en) * 2001-04-04 2003-12-02 International Business Machines Corporation Process for implanting a deep subcollector with self-aligned photo registration marks
KR100480593B1 (ko) * 2002-01-04 2005-04-06 삼성전자주식회사 활성 영역 한정용 얼라인 키를 가지는 반도체 소자 및 그제조 방법
JP2003243293A (ja) 2002-02-19 2003-08-29 Mitsubishi Electric Corp 半導体装置の製造方法
KR100511094B1 (ko) * 2002-12-28 2005-08-31 매그나칩 반도체 유한회사 반도체 소자의 키 정렬 방법
JP3775508B1 (ja) * 2005-03-10 2006-05-17 株式会社リコー 半導体装置の製造方法及び半導体装置
JP4718961B2 (ja) * 2005-09-30 2011-07-06 株式会社東芝 半導体集積回路装置及びその製造方法

Also Published As

Publication number Publication date
US20070037359A1 (en) 2007-02-15
KR20070019473A (ko) 2007-02-15
KR100699860B1 (ko) 2007-03-27
CN1913119A (zh) 2007-02-14
DE102006038374A1 (de) 2007-04-12
JP2007053365A (ja) 2007-03-01

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