TW200625520A - Method for forming trench isolation structure - Google Patents
Method for forming trench isolation structureInfo
- Publication number
- TW200625520A TW200625520A TW094118295A TW94118295A TW200625520A TW 200625520 A TW200625520 A TW 200625520A TW 094118295 A TW094118295 A TW 094118295A TW 94118295 A TW94118295 A TW 94118295A TW 200625520 A TW200625520 A TW 200625520A
- Authority
- TW
- Taiwan
- Prior art keywords
- isolation structure
- trench isolation
- substrate
- substance film
- silica substance
- Prior art date
Links
- 238000002955 isolation Methods 0.000 title abstract 4
- 238000000034 method Methods 0.000 title abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 5
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 239000000126 substance Substances 0.000 abstract 3
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 229920000642 polymer Polymers 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 1
- 239000011800 void material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
- H01L21/02222—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen the compound being a silazane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004167435A JP2005347636A (ja) | 2004-06-04 | 2004-06-04 | トレンチ・アイソレーション構造の形成方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW200625520A true TW200625520A (en) | 2006-07-16 |
Family
ID=35463125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094118295A TW200625520A (en) | 2004-06-04 | 2005-06-03 | Method for forming trench isolation structure |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20080061398A1 (enExample) |
| EP (1) | EP1768175B1 (enExample) |
| JP (1) | JP2005347636A (enExample) |
| KR (1) | KR20070028518A (enExample) |
| CN (1) | CN1965402A (enExample) |
| TW (1) | TW200625520A (enExample) |
| WO (1) | WO2005119758A1 (enExample) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4901221B2 (ja) * | 2006-01-17 | 2012-03-21 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2008101206A (ja) * | 2006-09-21 | 2008-05-01 | Jsr Corp | シリコーン樹脂、シリコーン樹脂組成物およびトレンチアイソレーションの形成方法 |
| KR20090057397A (ko) * | 2006-09-21 | 2009-06-05 | 제이에스알 가부시끼가이샤 | 실리콘 수지 조성물 및 트렌치 아이솔레이션의 형성 방법 |
| JP2008266119A (ja) * | 2006-11-24 | 2008-11-06 | Jsr Corp | シリコーン樹脂、シリコーン樹脂組成物およびトレンチアイソレーションの形成方法 |
| JP4748042B2 (ja) * | 2006-11-30 | 2011-08-17 | 東京エレクトロン株式会社 | 熱処理方法、熱処理装置及び記憶媒体 |
| JP2009044000A (ja) | 2007-08-09 | 2009-02-26 | Toshiba Corp | 不揮発性半導体メモリ及びその製造方法 |
| US8318582B2 (en) * | 2008-02-01 | 2012-11-27 | Jsr Corporation | Method of forming a trench isolation |
| US7999355B2 (en) | 2008-07-11 | 2011-08-16 | Air Products And Chemicals, Inc. | Aminosilanes for shallow trench isolation films |
| JP4886021B2 (ja) | 2008-12-16 | 2012-02-29 | エルピーダメモリ株式会社 | 半導体装置及びその製造方法 |
| JP5490753B2 (ja) * | 2010-07-29 | 2014-05-14 | 東京エレクトロン株式会社 | トレンチの埋め込み方法および成膜システム |
| KR101683071B1 (ko) | 2010-09-08 | 2016-12-06 | 삼성전자 주식회사 | 반도체 소자 및 그 제조방법 |
| JP5675331B2 (ja) * | 2010-12-27 | 2015-02-25 | 東京エレクトロン株式会社 | トレンチの埋め込み方法 |
| KR101361454B1 (ko) * | 2012-08-23 | 2014-02-21 | 이근수 | 반도체 소자의 실리콘 산화막 형성 방법 |
| CN103531522B (zh) * | 2013-10-30 | 2016-08-17 | 上海华力微电子有限公司 | 浅沟槽隔离结构制备方法 |
| KR101825546B1 (ko) * | 2014-05-26 | 2018-02-05 | 제일모직 주식회사 | 실리카계 막 형성용 조성물, 및 실리카계 막의 제조방법 |
| US10020185B2 (en) | 2014-10-07 | 2018-07-10 | Samsung Sdi Co., Ltd. | Composition for forming silica layer, silica layer, and electronic device |
| KR101837971B1 (ko) | 2014-12-19 | 2018-03-13 | 삼성에스디아이 주식회사 | 실리카계 막 형성용 조성물, 실리카계 막, 및 전자 디바이스 |
| KR101833800B1 (ko) | 2014-12-19 | 2018-03-02 | 삼성에스디아이 주식회사 | 실리카계 막 형성용 조성물, 실리카계 막의 제조방법 및 상기 실리카계 막을 포함하는 전자 소자 |
| CN106356281B (zh) * | 2015-07-16 | 2019-10-25 | 中芯国际集成电路制造(上海)有限公司 | 二氧化硅介电薄膜制备方法 |
| KR20170014946A (ko) | 2015-07-31 | 2017-02-08 | 삼성에스디아이 주식회사 | 실리카 막 형성용 조성물, 실리카 막의 제조방법 및 실리카 막 |
| JP6573578B2 (ja) * | 2016-05-31 | 2019-09-11 | 株式会社Ｋｏｋｕｓａｉ Ｅｌｅｃｔｒｉｃ | 半導体装置の製造方法、基板処理装置、およびプログラム |
| CN107393864A (zh) * | 2017-08-29 | 2017-11-24 | 睿力集成电路有限公司 | 一种隔离结构及其制造方法 |
| SG11202001450UA (en) * | 2017-09-12 | 2020-03-30 | Applied Materials Inc | Apparatus and methods for manufacturing semiconductor structures using protective barrier layer |
| CN110739264B (zh) * | 2019-10-30 | 2022-08-09 | 上海华力微电子有限公司 | 浅沟槽隔离结构及其形成方法、半导体器件的制作方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03178412A (ja) * | 1989-12-07 | 1991-08-02 | Mazda Motor Corp | インモールドコート方法 |
| JPH0897277A (ja) * | 1994-09-29 | 1996-04-12 | Toshiba Corp | 半導体装置の製造方法 |
| JPH10303289A (ja) * | 1997-04-30 | 1998-11-13 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| JP3178412B2 (ja) * | 1998-04-27 | 2001-06-18 | 日本電気株式会社 | トレンチ・アイソレーション構造の形成方法 |
| JP5020425B2 (ja) * | 2000-04-25 | 2012-09-05 | Ａｚエレクトロニックマテリアルズ株式会社 | 微細溝をシリカ質材料で埋封する方法 |
| JP2002043408A (ja) * | 2000-07-28 | 2002-02-08 | Nec Kansai Ltd | 半導体装置の製造方法 |
| JP2002088156A (ja) * | 2000-09-07 | 2002-03-27 | Dow Corning Corp | 結晶性水素化シルセスキオキサンの製造方法 |
| US6479405B2 (en) * | 2000-10-12 | 2002-11-12 | Samsung Electronics Co., Ltd. | Method of forming silicon oxide layer in semiconductor manufacturing process using spin-on glass composition and isolation method using the same method |
| KR100436495B1 (ko) * | 2001-06-07 | 2004-06-22 | 삼성전자주식회사 | 스핀온글래스 조성물을 이용한 반도체 장치의 산화실리콘막 형성방법 및 이를 이용한 반도체 장치의 소자분리 방법 |
| KR100354441B1 (en) * | 2000-12-27 | 2002-09-28 | Samsung Electronics Co Ltd | Method for fabricating spin-on-glass insulation layer of semiconductor device |
| KR100568100B1 (ko) * | 2001-03-05 | 2006-04-05 | 삼성전자주식회사 | 트렌치형 소자 분리막 형성 방법 |
| KR100512167B1 (ko) * | 2001-03-12 | 2005-09-02 | 삼성전자주식회사 | 트렌치 소자 분리형 반도체 장치 및 트렌치형 소자 분리막형성방법 |
| US6699799B2 (en) * | 2001-05-09 | 2004-03-02 | Samsung Electronics Co., Ltd. | Method of forming a semiconductor device |
| JP5121102B2 (ja) * | 2001-07-11 | 2013-01-16 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US6767642B2 (en) * | 2002-03-11 | 2004-07-27 | E. I. Du Pont Nemours And Company | Preparation and use of crosslinkable acrylosilane polymers containing vinyl silane monomers |
| JP2004273519A (ja) * | 2003-03-05 | 2004-09-30 | Clariant (Japan) Kk | トレンチ・アイソレーション構造の形成方法 |
| JP2004311487A (ja) * | 2003-04-02 | 2004-11-04 | Hitachi Ltd | 半導体装置の製造方法 |
| US7521378B2 (en) * | 2004-07-01 | 2009-04-21 | Micron Technology, Inc. | Low temperature process for polysilazane oxidation/densification |
-
2004
- 2004-06-04 JP JP2004167435A patent/JP2005347636A/ja active Pending
-
2005
- 2005-05-30 KR KR1020077000156A patent/KR20070028518A/ko not_active Ceased
- 2005-05-30 EP EP05743708.9A patent/EP1768175B1/en not_active Ceased
- 2005-05-30 US US11/596,785 patent/US20080061398A1/en not_active Abandoned
- 2005-05-30 CN CNA200580017325XA patent/CN1965402A/zh active Pending
- 2005-05-30 WO PCT/JP2005/009891 patent/WO2005119758A1/ja not_active Ceased
- 2005-06-03 TW TW094118295A patent/TW200625520A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP1768175A8 (en) | 2007-05-09 |
| CN1965402A (zh) | 2007-05-16 |
| WO2005119758A1 (ja) | 2005-12-15 |
| EP1768175A4 (en) | 2011-07-27 |
| US20080061398A1 (en) | 2008-03-13 |
| EP1768175B1 (en) | 2019-05-15 |
| KR20070028518A (ko) | 2007-03-12 |
| JP2005347636A (ja) | 2005-12-15 |
| EP1768175A1 (en) | 2007-03-28 |
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