TW200612430A - Semiconductor memory device and package thereof, and memory card using the same - Google Patents
Semiconductor memory device and package thereof, and memory card using the sameInfo
- Publication number
- TW200612430A TW200612430A TW093138521A TW93138521A TW200612430A TW 200612430 A TW200612430 A TW 200612430A TW 093138521 A TW093138521 A TW 093138521A TW 93138521 A TW93138521 A TW 93138521A TW 200612430 A TW200612430 A TW 200612430A
- Authority
- TW
- Taiwan
- Prior art keywords
- memory
- memory device
- semiconductor memory
- same
- page
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/105—Aspects related to pads, pins or terminals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040078954A KR100624960B1 (ko) | 2004-10-05 | 2004-10-05 | 반도체 메모리 장치 및 이의 패키지 및 이를 이용한메모리 카드 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200612430A true TW200612430A (en) | 2006-04-16 |
TWI254937B TWI254937B (en) | 2006-05-11 |
Family
ID=36088950
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093138521A TWI254937B (en) | 2004-10-05 | 2004-12-13 | Semiconductor memory device and package thereof, and memory card using the same |
Country Status (6)
Country | Link |
---|---|
US (1) | US20060083096A1 (zh) |
JP (1) | JP2006107691A (zh) |
KR (1) | KR100624960B1 (zh) |
CN (1) | CN100452401C (zh) |
DE (1) | DE102004060348A1 (zh) |
TW (1) | TWI254937B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9875808B2 (en) | 2013-01-15 | 2018-01-23 | Micron Technology, Inc. | Reclaimable semiconductor device package and associated systems and methods |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100630730B1 (ko) * | 2005-01-07 | 2006-10-02 | 삼성전자주식회사 | 테스트 타임을 단축할 수 있는 멀티 칩 패키지 |
KR100626393B1 (ko) * | 2005-04-07 | 2006-09-20 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 멀티-페이지 카피백 방법 |
KR100694978B1 (ko) | 2006-05-12 | 2007-03-14 | 주식회사 하이닉스반도체 | 데이터 입출력 속도를 증가시키는 구조를 가지는 플래시메모리 장치 및 그 데이터 입출력 동작 방법 |
KR100855972B1 (ko) | 2007-01-23 | 2008-09-02 | 삼성전자주식회사 | 서로 다른 독출 대기 시간을 가지는 복수개의 메모리 셀어레이들을 구비하는 불휘발성 메모리 시스템 및 상기불휘발성 메모리 시스템의 데이터 독출 방법 |
KR100875978B1 (ko) * | 2007-02-06 | 2008-12-26 | 삼성전자주식회사 | 메모리 카드 및 그것을 포함한 메모리 시스템 |
US20090013148A1 (en) * | 2007-07-03 | 2009-01-08 | Micron Technology, Inc. | Block addressing for parallel memory arrays |
US7706184B2 (en) * | 2007-12-28 | 2010-04-27 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
US20090187701A1 (en) * | 2008-01-22 | 2009-07-23 | Jin-Ki Kim | Nand flash memory access with relaxed timing constraints |
JP4653833B2 (ja) * | 2008-11-04 | 2011-03-16 | シャープ株式会社 | 不揮発性半導体記憶装置及びその制御方法 |
CN101777382B (zh) * | 2009-01-09 | 2012-04-04 | 义隆电子股份有限公司 | 多次可编程快闪存储器的列解码器 |
KR101599795B1 (ko) * | 2009-01-13 | 2016-03-22 | 삼성전자주식회사 | 페이지 사이즈를 조절할 수 있는 반도체 장치 |
KR101131552B1 (ko) * | 2010-02-24 | 2012-04-04 | 주식회사 하이닉스반도체 | 상 변화 메모리 장치 |
TWI447579B (zh) * | 2011-05-18 | 2014-08-01 | Phison Electronics Corp | 程式碼載入與存取方法、記憶體控制器與記憶體儲存裝置 |
KR20150130848A (ko) * | 2014-05-14 | 2015-11-24 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
KR102254100B1 (ko) * | 2015-01-05 | 2021-05-20 | 삼성전자주식회사 | 메모리 장치, 메모리 시스템 및 메모리 장치의 동작 방법 |
CN106486144B (zh) * | 2015-08-31 | 2019-05-14 | 旺宏电子股份有限公司 | 存储器结构 |
KR20170027493A (ko) * | 2015-09-02 | 2017-03-10 | 에스케이하이닉스 주식회사 | 반도체 장치의 레이아웃 구조 |
KR102528314B1 (ko) * | 2016-10-17 | 2023-05-03 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
KR102615775B1 (ko) * | 2017-01-31 | 2023-12-20 | 에스케이하이닉스 주식회사 | 반도체 장치 |
Family Cites Families (22)
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JPH0240192A (ja) * | 1988-07-29 | 1990-02-08 | Mitsubishi Electric Corp | シリアルアクセス動作の可能な半導体記憶装置 |
NL8902820A (nl) * | 1989-11-15 | 1991-06-03 | Philips Nv | Geintegreerde halfgeleiderschakeling van het master slice type. |
JPH0457284A (ja) * | 1990-06-21 | 1992-02-25 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP3579461B2 (ja) * | 1993-10-15 | 2004-10-20 | 株式会社ルネサステクノロジ | データ処理システム及びデータ処理装置 |
JPH0991953A (ja) * | 1995-09-21 | 1997-04-04 | Hitachi Ltd | 半導体記憶装置 |
JP3352577B2 (ja) * | 1995-12-21 | 2002-12-03 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 記憶装置 |
KR0170723B1 (ko) * | 1995-12-29 | 1999-03-30 | 김광호 | 단일 ras 신호에 의해 동시 동작이 가능한 이중 뱅크를 갖는 반도체 메모리 장치 |
JPH09231764A (ja) * | 1996-01-19 | 1997-09-05 | Sgs Thomson Microelectron Inc | バーストカウンタ回路及びその動作方法 |
JPH09265774A (ja) * | 1996-01-24 | 1997-10-07 | Hitachi Ltd | 積層メモリモジュール基板およびその基板へのアクセス方式 |
KR0183871B1 (ko) * | 1996-05-29 | 1999-04-15 | 김광호 | 분리 확장 데이터 출력모드를 갖는 반도체 메모리장치 |
JPH10177797A (ja) * | 1996-12-17 | 1998-06-30 | Toshiba Corp | 半導体記憶装置 |
JP3907785B2 (ja) * | 1997-06-04 | 2007-04-18 | 富士通株式会社 | 半導体記憶装置 |
US5991224A (en) * | 1998-05-22 | 1999-11-23 | International Business Machines Corporation | Global wire management apparatus and method for a multiple-port random access memory |
JP3916862B2 (ja) * | 2000-10-03 | 2007-05-23 | 株式会社東芝 | 不揮発性半導体メモリ装置 |
US6763424B2 (en) * | 2001-01-19 | 2004-07-13 | Sandisk Corporation | Partial block data programming and reading operations in a non-volatile memory |
JP2002251884A (ja) * | 2001-02-21 | 2002-09-06 | Toshiba Corp | 半導体記憶装置及びそのシステム装置 |
KR100422445B1 (ko) * | 2001-06-01 | 2004-03-12 | 삼성전자주식회사 | 선택적 배속동작 모드를 갖는 불휘발성 반도체 메모리 장치 |
JP3932166B2 (ja) * | 2001-08-07 | 2007-06-20 | シャープ株式会社 | 同期型半導体記憶装置モジュールおよびその制御方法、情報機器 |
JP2003059264A (ja) * | 2001-08-08 | 2003-02-28 | Hitachi Ltd | 半導体記憶装置 |
KR100466980B1 (ko) * | 2002-01-15 | 2005-01-24 | 삼성전자주식회사 | 낸드 플래시 메모리 장치 |
JP4156985B2 (ja) * | 2003-06-30 | 2008-09-24 | 株式会社東芝 | 半導体記憶装置 |
JP4237648B2 (ja) * | 2004-01-30 | 2009-03-11 | 株式会社東芝 | 不揮発性半導体記憶装置 |
-
2004
- 2004-10-05 KR KR1020040078954A patent/KR100624960B1/ko not_active IP Right Cessation
- 2004-12-13 US US11/010,664 patent/US20060083096A1/en not_active Abandoned
- 2004-12-13 TW TW093138521A patent/TWI254937B/zh not_active IP Right Cessation
- 2004-12-15 DE DE102004060348A patent/DE102004060348A1/de not_active Withdrawn
- 2004-12-27 JP JP2004375285A patent/JP2006107691A/ja active Pending
-
2005
- 2005-01-11 CN CNB2005100037666A patent/CN100452401C/zh not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9875808B2 (en) | 2013-01-15 | 2018-01-23 | Micron Technology, Inc. | Reclaimable semiconductor device package and associated systems and methods |
US10482988B2 (en) | 2013-01-15 | 2019-11-19 | Micron Technology, Inc. | Reclaimable semiconductor device package and associated systems and methods |
US11854635B2 (en) | 2013-01-15 | 2023-12-26 | Micron Technology, Inc. | Reclaimable semiconductor device package and associated systems and methods |
Also Published As
Publication number | Publication date |
---|---|
CN1758438A (zh) | 2006-04-12 |
KR100624960B1 (ko) | 2006-09-15 |
DE102004060348A1 (de) | 2006-04-13 |
CN100452401C (zh) | 2009-01-14 |
JP2006107691A (ja) | 2006-04-20 |
TWI254937B (en) | 2006-05-11 |
KR20060030172A (ko) | 2006-04-10 |
US20060083096A1 (en) | 2006-04-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |