ES2187475T3 - Dispositivo de memoria con mezclado no predictible de direcciones. - Google Patents

Dispositivo de memoria con mezclado no predictible de direcciones.

Info

Publication number
ES2187475T3
ES2187475T3 ES00931196T ES00931196T ES2187475T3 ES 2187475 T3 ES2187475 T3 ES 2187475T3 ES 00931196 T ES00931196 T ES 00931196T ES 00931196 T ES00931196 T ES 00931196T ES 2187475 T3 ES2187475 T3 ES 2187475T3
Authority
ES
Spain
Prior art keywords
predictible
memory device
address
address mixing
scrambling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES00931196T
Other languages
English (en)
Inventor
Michael Baldischweiler
Stefan Eckardt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Application granted granted Critical
Publication of ES2187475T3 publication Critical patent/ES2187475T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/357—Cards having a plurality of specified features

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • General Business, Economics & Management (AREA)
  • Strategic Management (AREA)
  • Accounting & Taxation (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

Dispositivo de memoria, con una memoria dotada de una serie de celdas de almacenamiento (10) y un dispositivo de selección (14) que selecciona una celda de almacenamiento (10) debido a una dirección lógica (23) suministrada con intermedio de un bus de direcciones (20), accediendo entonces físicamente a dicha celda, comprendiendo el dispositivo de selección (14) un dispositivo de mezcla al azar (15) que, cuando se ha originado la operación de mezcla asigna una celda de almacenamiento (10) a una dirección lógica (23) transmitida al dispositivo de selección (14), teniéndose a continuación acceso físicamente a la celda de almacenamiento designada (10), caracterizado porque el dispositivo de mezcla al azar (15) lleva a cabo la designación de la dirección lógica a una celda de almacenamiento (10) de forma no predictible.
ES00931196T 1999-05-12 2000-05-11 Dispositivo de memoria con mezclado no predictible de direcciones. Expired - Lifetime ES2187475T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19922155A DE19922155A1 (de) 1999-05-12 1999-05-12 Speicheranordnung mit Adreßverwürfelung

Publications (1)

Publication Number Publication Date
ES2187475T3 true ES2187475T3 (es) 2003-06-16

Family

ID=7908004

Family Applications (1)

Application Number Title Priority Date Filing Date
ES00931196T Expired - Lifetime ES2187475T3 (es) 1999-05-12 2000-05-11 Dispositivo de memoria con mezclado no predictible de direcciones.

Country Status (10)

Country Link
US (1) US6572024B1 (es)
EP (1) EP1183690B1 (es)
JP (1) JP2003500786A (es)
KR (1) KR100648325B1 (es)
CN (1) CN1185658C (es)
AT (1) ATE229219T1 (es)
AU (1) AU4921100A (es)
DE (2) DE19922155A1 (es)
ES (1) ES2187475T3 (es)
WO (1) WO2000070620A1 (es)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
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JP4683442B2 (ja) * 2000-07-13 2011-05-18 富士通フロンテック株式会社 処理装置および集積回路
WO2002071231A1 (en) 2001-02-15 2002-09-12 Nokia Corporation Method and arrangement for protecting information
DE10127181A1 (de) * 2001-06-05 2002-12-19 Infineon Technologies Ag Sicherheitsmodul, Verfahren zum Konfigurieren desselben und Verfahren und Vorrichtung zum Herstellen desselben
DE10340405B3 (de) 2003-09-02 2004-12-23 Infineon Technologies Ag Integrierter Halbleiterspeicher
US20060161743A1 (en) * 2005-01-18 2006-07-20 Khaled Fekih-Romdhane Intelligent memory array switching logic
US20060171234A1 (en) * 2005-01-18 2006-08-03 Liu Skip S DDR II DRAM data path
US20060171233A1 (en) * 2005-01-18 2006-08-03 Khaled Fekih-Romdhane Near pad ordering logic
US20060245230A1 (en) * 2005-04-29 2006-11-02 Ambroggi Luca D Memory module and method for operating a memory module
JP4583305B2 (ja) * 2005-12-28 2010-11-17 シャープ株式会社 記録方法、記録装置及びｉｃカード
JP2008003976A (ja) * 2006-06-26 2008-01-10 Sony Corp メモリアクセス制御装置および方法、並びに、通信装置
JP2008027327A (ja) * 2006-07-25 2008-02-07 Sony Corp メモリアクセス制御装置および方法、並びに、通信装置
KR100813627B1 (ko) * 2007-01-04 2008-03-14 삼성전자주식회사 멀티-비트 데이터를 저장할 수 있는 플래시 메모리 장치를제어하는 메모리 제어기와 그것을 포함한 메모리 시스템
JP5571883B2 (ja) * 2007-06-18 2014-08-13 軒▲ソン▼科技有限公司 デジタル情報の保護方法、装置およびコンピュータによるアクセス可能な記録媒体
IL210169A0 (en) 2010-12-22 2011-03-31 Yehuda Binder System and method for routing-based internet security
JP5839659B2 (ja) * 2011-06-20 2016-01-06 ルネサスエレクトロニクス株式会社 半導体装置
JP2013114644A (ja) * 2011-12-01 2013-06-10 Fujitsu Ltd メモリモジュールおよび半導体記憶装置
US9236143B2 (en) * 2011-12-28 2016-01-12 Intel Corporation Generic address scrambler for memory circuit test engine
KR101997623B1 (ko) 2013-02-26 2019-07-09 삼성전자주식회사 메모리 장치 및 그것을 포함하는 메모리 시스템
JP5986279B2 (ja) * 2015-08-28 2016-09-06 ルネサスエレクトロニクス株式会社 半導体装置
GB2544546B (en) * 2015-11-20 2020-07-15 Advanced Risc Mach Ltd Dynamic memory scrambling
DE102018128980A1 (de) 2018-11-19 2020-05-20 Technische Universität München Verfahren und vorrichtung zum betreiben einer speicheranordnung

Family Cites Families (27)

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JPS5332A (en) * 1976-06-23 1978-01-05 Fujitsu Ltd Memory redundance system
JPS6344242A (ja) * 1986-08-11 1988-02-25 Fujitsu Ltd マイクロプロセツサ
JPS63167588A (ja) * 1986-12-27 1988-07-11 Toshiba Corp 暗号情報伝送システム
US5603000A (en) * 1989-05-15 1997-02-11 Dallas Semiconductor Corporation Integrated circuit memory with verification unit which resets an address translation register upon failure to define one-to-one correspondences between addresses and memory cells
JPH0314147A (ja) * 1989-06-13 1991-01-22 Fujitsu Ltd プログラム暗号化回路
JP2685915B2 (ja) * 1989-08-22 1997-12-08 株式会社東芝 有料放送受信装置
US5081675A (en) * 1989-11-13 1992-01-14 Kitti Kittirutsunetorn System for protection of software in memory against unauthorized use
JPH03168831A (ja) * 1989-11-29 1991-07-22 Nec Corp プログラム秘匿装置
GB2248702B (en) * 1990-10-11 1994-11-02 Viserge Limited Data-processing apparatus
JPH05189327A (ja) * 1992-01-17 1993-07-30 Fujitsu Ltd 集積回路の内蔵メモリ故障時の救済方法
US5666516A (en) * 1993-12-16 1997-09-09 International Business Machines Corporation Protected programmable memory cartridge having selective access circuitry
JPH07235200A (ja) * 1994-02-24 1995-09-05 Toshiba Corp 半導体記憶装置
FR2723223B1 (fr) * 1994-07-29 1996-08-30 Sgs Thomson Microelectronics Procede de brouillage numerique et application a un circuit programmable
JP3935515B2 (ja) * 1994-08-03 2007-06-27 富士通株式会社 コピー防止機能付半導体集積回路装置
JPH08227588A (ja) * 1995-02-21 1996-09-03 Hitachi Ltd 情報保護機能付き不揮発性半導体記憶装置
JPH08234709A (ja) * 1995-02-23 1996-09-13 Sony Corp 情報表示方法および装置
US5815572A (en) * 1995-08-31 1998-09-29 Lucent Technologies Inc. Video scrambling
JP3747520B2 (ja) * 1996-01-30 2006-02-22 富士ゼロックス株式会社 情報処理装置及び情報処理方法
JPH10187543A (ja) * 1996-12-24 1998-07-21 Toshiba Corp メモリアクセス方法および情報処理装置およびカード処理装置
GB2321728B (en) * 1997-01-30 2001-12-19 Motorola Inc Apparatus and method for accessing secured data stored in a portable data carrier
JPH1145212A (ja) * 1997-07-29 1999-02-16 Matsushita Electric Ind Co Ltd 秘密情報の解読攻撃対抗方法
JPH11167526A (ja) * 1997-12-03 1999-06-22 Tamura Electric Works Ltd メモリリード・ライト方法及びメモリリード・ライト装置
US5943283A (en) * 1997-12-05 1999-08-24 Invox Technology Address scrambling in a semiconductor memory
JP2000029790A (ja) * 1998-07-15 2000-01-28 Matsushita Electric Ind Co Ltd データセキュリティシステム
JP4174326B2 (ja) * 2003-01-15 2008-10-29 日本放送協会 セキュリティモジュール、限定受信装置、限定受信方法および限定受信プログラム
JP4791741B2 (ja) * 2005-03-16 2011-10-12 株式会社リコー データ処理装置とデータ処理方法
JP4349389B2 (ja) * 2006-07-28 2009-10-21 ソニー株式会社 データ記憶装置、および、通信装置

Also Published As

Publication number Publication date
AU4921100A (en) 2000-12-05
DE50000882D1 (de) 2003-01-16
EP1183690A1 (de) 2002-03-06
DE19922155A1 (de) 2000-11-23
KR20020001877A (ko) 2002-01-09
CN1185658C (zh) 2005-01-19
US6572024B1 (en) 2003-06-03
EP1183690B1 (de) 2002-12-04
WO2000070620A1 (de) 2000-11-23
KR100648325B1 (ko) 2006-11-23
CN1355922A (zh) 2002-06-26
ATE229219T1 (de) 2002-12-15
JP2003500786A (ja) 2003-01-07

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