SG37287G - A semiconductor memory device - Google Patents
A semiconductor memory deviceInfo
- Publication number
- SG37287G SG37287G SG372/87A SG37287A SG37287G SG 37287 G SG37287 G SG 37287G SG 372/87 A SG372/87 A SG 372/87A SG 37287 A SG37287 A SG 37287A SG 37287 G SG37287 G SG 37287G
- Authority
- SG
- Singapore
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56079210A JPS57194567A (en) | 1981-05-27 | 1981-05-27 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG37287G true SG37287G (en) | 1987-07-24 |
Family
ID=13683571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG372/87A SG37287G (en) | 1981-05-27 | 1987-04-23 | A semiconductor memory device |
Country Status (9)
Country | Link |
---|---|
US (1) | US4612565A (ja) |
JP (1) | JPS57194567A (ja) |
KR (3) | KR910002303B1 (ja) |
DE (1) | DE3219639A1 (ja) |
GB (1) | GB2107114B (ja) |
HK (1) | HK70387A (ja) |
IT (1) | IT1151245B (ja) |
MY (1) | MY8700606A (ja) |
SG (1) | SG37287G (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3304651A1 (de) * | 1983-02-10 | 1984-08-16 | Siemens AG, 1000 Berlin und 8000 München | Dynamische halbleiterspeicherzelle mit wahlfreiem zugriff (dram) und verfahren zu ihrer herstellung |
FR2555364B1 (fr) * | 1983-11-18 | 1990-02-02 | Hitachi Ltd | Procede de fabrication de connexions d'un dispositif a circuits integres a semi-conducteurs comportant en particulier un mitset |
JPH0795395B2 (ja) * | 1984-02-13 | 1995-10-11 | 株式会社日立製作所 | 半導体集積回路 |
JPH0658947B2 (ja) * | 1984-02-24 | 1994-08-03 | 株式会社日立製作所 | 半導体メモリ装置の製法 |
US4672407A (en) * | 1984-05-30 | 1987-06-09 | Kabushiki Kaisha Toshiba | Conductivity modulated MOSFET |
US5061986A (en) * | 1985-01-22 | 1991-10-29 | National Semiconductor Corporation | Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics |
US5227316A (en) * | 1985-01-22 | 1993-07-13 | National Semiconductor Corporation | Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size |
US5045916A (en) * | 1985-01-22 | 1991-09-03 | Fairchild Semiconductor Corporation | Extended silicide and external contact technology |
JPS61198664A (ja) * | 1985-02-27 | 1986-09-03 | Sharp Corp | 半導体装置の製造方法 |
JPS6269664A (ja) * | 1985-09-24 | 1987-03-30 | Toshiba Corp | 相補mos型半導体装置 |
JPS6286865A (ja) * | 1985-10-14 | 1987-04-21 | Mitsubishi Electric Corp | Mos型トランジスタ |
JPS62219966A (ja) * | 1986-03-22 | 1987-09-28 | Toshiba Corp | 半導体装置 |
JPH0789569B2 (ja) * | 1986-03-26 | 1995-09-27 | 株式会社日立製作所 | 半導体集積回路装置及びその製造方法 |
FR2616966B1 (fr) * | 1987-06-22 | 1989-10-27 | Thomson Semiconducteurs | Structure de transistors mos de puissance |
US5332682A (en) * | 1990-08-31 | 1994-07-26 | Micron Semiconductor, Inc. | Local encroachment reduction |
KR0121992B1 (ko) * | 1993-03-03 | 1997-11-12 | 모리시다 요이치 | 반도체장치 및 그 제조방법 |
JP4356804B2 (ja) * | 1998-08-06 | 2009-11-04 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5015550A (ja) * | 1973-06-08 | 1975-02-19 | ||
US3889287A (en) * | 1973-12-06 | 1975-06-10 | Motorola Inc | Mnos memory matrix |
US4021789A (en) * | 1975-09-29 | 1977-05-03 | International Business Machines Corporation | Self-aligned integrated circuits |
JPS5380985A (en) * | 1976-12-25 | 1978-07-17 | Toshiba Corp | Semiconductor device |
US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
US4128670A (en) * | 1977-11-11 | 1978-12-05 | International Business Machines Corporation | Fabrication method for integrated circuits with polysilicon lines having low sheet resistance |
JPS5819144B2 (ja) * | 1977-12-02 | 1983-04-16 | 株式会社東芝 | 読み出し専用記憶装置 |
JPS5488783A (en) * | 1977-12-26 | 1979-07-14 | Cho Lsi Gijutsu Kenkyu Kumiai | Semiconductor |
JPS54116184A (en) * | 1978-03-01 | 1979-09-10 | Mitsubishi Electric Corp | Manufacture for semiconductor device |
DE2815605C3 (de) * | 1978-04-11 | 1981-04-16 | Siemens AG, 1000 Berlin und 8000 München | Halbleiterspeicher mit Ansteuerleitungen hoher Leitfähigkeit |
JPS5530846A (en) * | 1978-08-28 | 1980-03-04 | Hitachi Ltd | Method for manufacturing fixed memory |
JPS5534492A (en) * | 1978-09-02 | 1980-03-11 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor integrated circuit device having mis field effect type transistor and its manufacture |
JPS5650533A (en) * | 1979-10-01 | 1981-05-07 | Hitachi Ltd | Semiconductor device |
JPS5583251A (en) * | 1978-12-20 | 1980-06-23 | Fujitsu Ltd | Method of fabricating semiconductor device |
US4329706A (en) * | 1979-03-01 | 1982-05-11 | International Business Machines Corporation | Doped polysilicon silicide semiconductor integrated circuit interconnections |
JPS55132055A (en) * | 1979-03-30 | 1980-10-14 | Nec Corp | Mos integrated circuit |
JPS55140271A (en) * | 1979-04-20 | 1980-11-01 | Hitachi Ltd | Manufacture of mis transistor |
DE2926874A1 (de) * | 1979-07-03 | 1981-01-22 | Siemens Ag | Verfahren zum herstellen von niederohmigen, diffundierten bereichen bei der silizium-gate-technologie |
JPS5623771A (en) * | 1979-08-01 | 1981-03-06 | Hitachi Ltd | Semiconductor memory |
US4339766A (en) * | 1979-10-11 | 1982-07-13 | Texas Instruments Incorporated | Dummy columns for reducing pattern sensitivity in MOS/LSI dynamic RAM |
US4388121A (en) * | 1980-03-21 | 1983-06-14 | Texas Instruments Incorporated | Reduced field implant for dynamic memory cell array |
JPS5780739A (en) * | 1980-11-07 | 1982-05-20 | Hitachi Ltd | Semiconductor integrated circuit device and manufacture thereof |
US4362597A (en) * | 1981-01-19 | 1982-12-07 | Bell Telephone Laboratories, Incorporated | Method of fabricating high-conductivity silicide-on-polysilicon structures for MOS devices |
-
1981
- 1981-05-27 JP JP56079210A patent/JPS57194567A/ja active Pending
-
1982
- 1982-05-05 GB GB08212946A patent/GB2107114B/en not_active Expired
- 1982-05-25 IT IT8221482A patent/IT1151245B/it active
- 1982-05-25 DE DE19823219639 patent/DE3219639A1/de not_active Ceased
- 1982-05-25 KR KR8202305A patent/KR910002303B1/ko active
-
1985
- 1985-10-03 US US06/783,531 patent/US4612565A/en not_active Expired - Lifetime
-
1987
- 1987-04-23 SG SG372/87A patent/SG37287G/en unknown
- 1987-10-01 HK HK703/87A patent/HK70387A/xx not_active IP Right Cessation
- 1987-12-30 MY MY606/87A patent/MY8700606A/xx unknown
-
1990
- 1990-06-28 KR KR9009660A patent/KR900008667B1/ko not_active IP Right Cessation
-
1991
- 1991-07-02 KR KR1019910000045A patent/KR910002304B1/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
MY8700606A (en) | 1987-12-31 |
DE3219639A1 (de) | 1982-12-23 |
KR910002303B1 (ko) | 1991-04-11 |
KR920002830A (ko) | 1992-02-28 |
KR910002304B1 (ko) | 1991-04-11 |
KR900008667B1 (en) | 1990-11-26 |
HK70387A (en) | 1987-10-09 |
GB2107114A (en) | 1983-04-20 |
GB2107114B (en) | 1986-02-12 |
IT8221482A0 (it) | 1982-05-25 |
KR840000083A (ko) | 1984-01-30 |
IT1151245B (it) | 1986-12-17 |
JPS57194567A (en) | 1982-11-30 |
US4612565A (en) | 1986-09-16 |
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