SG168461A1 - Method for fabricating a semiconductor substrate - Google Patents

Method for fabricating a semiconductor substrate

Info

Publication number
SG168461A1
SG168461A1 SG201003856-0A SG2010038560A SG168461A1 SG 168461 A1 SG168461 A1 SG 168461A1 SG 2010038560 A SG2010038560 A SG 2010038560A SG 168461 A1 SG168461 A1 SG 168461A1
Authority
SG
Singapore
Prior art keywords
impurity
substrate
semiconductor substrate
semiconductor
fabricating
Prior art date
Application number
SG201003856-0A
Other languages
English (en)
Inventor
Christophe Maleville
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG168461A1 publication Critical patent/SG168461A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
SG201003856-0A 2009-08-04 2010-06-02 Method for fabricating a semiconductor substrate SG168461A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP09290609A EP2282332B1 (fr) 2009-08-04 2009-08-04 Methode de fabrication d'un substrat semiconducteur

Publications (1)

Publication Number Publication Date
SG168461A1 true SG168461A1 (en) 2011-02-28

Family

ID=41503765

Family Applications (1)

Application Number Title Priority Date Filing Date
SG201003856-0A SG168461A1 (en) 2009-08-04 2010-06-02 Method for fabricating a semiconductor substrate

Country Status (7)

Country Link
US (1) US8058149B2 (fr)
EP (1) EP2282332B1 (fr)
JP (1) JP5666842B2 (fr)
KR (1) KR101698434B1 (fr)
CN (1) CN101989567B (fr)
SG (1) SG168461A1 (fr)
TW (1) TWI492274B (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2977069B1 (fr) 2011-06-23 2014-02-07 Soitec Silicon On Insulator Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire
JPWO2013031868A1 (ja) * 2011-08-30 2015-03-23 有限会社Mtec 化合物半導体装置及びその製造方法
CN106489187B (zh) * 2014-07-10 2019-10-25 株式会社希克斯 半导体基板和半导体基板的制造方法
FR3057396B1 (fr) * 2016-10-10 2018-12-14 Soitec Substrat pour capteur d'image de type face avant et procede de fabrication d'un tel substrat

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JP3211998B2 (ja) * 1993-05-31 2001-09-25 ソニー株式会社 半導体装置製造方法
JP3542376B2 (ja) * 1994-04-08 2004-07-14 キヤノン株式会社 半導体基板の製造方法
US6326280B1 (en) * 1995-02-02 2001-12-04 Sony Corporation Thin film semiconductor and method for making thin film semiconductor
US6107213A (en) * 1996-02-01 2000-08-22 Sony Corporation Method for making thin film semiconductor
JP3697106B2 (ja) * 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
JP2002110688A (ja) * 2000-09-29 2002-04-12 Canon Inc Soiの熱処理方法及び製造方法
JP2002134722A (ja) * 2000-10-26 2002-05-10 Sumitomo Metal Ind Ltd Soiウェーハの製造方法及びsoiウェーハ
JP4723860B2 (ja) * 2002-12-09 2011-07-13 クォンタム セミコンダクター リミテッド ライアビリティ カンパニー Cmos画像センサー
US20070069335A1 (en) * 2003-09-08 2007-03-29 Akihiko Endo Bonded wafer and its manufacturing method
JP2006108365A (ja) * 2004-10-05 2006-04-20 Renesas Technology Corp 半導体装置およびその製造方法
US7238583B2 (en) * 2005-02-11 2007-07-03 Sarnoff Corporation Back-illuminated imaging device and method of fabricating same
JP2007059873A (ja) * 2005-07-26 2007-03-08 Sharp Corp 半導体発光素子及びその製造方法
US7446018B2 (en) * 2005-08-22 2008-11-04 Icemos Technology Corporation Bonded-wafer superjunction semiconductor device
JP2007059704A (ja) * 2005-08-25 2007-03-08 Sumco Corp 貼合せ基板の製造方法及び貼合せ基板
US7745309B2 (en) * 2006-08-09 2010-06-29 Applied Materials, Inc. Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure
JP2009536446A (ja) * 2006-09-07 2009-10-08 Necエレクトロニクス株式会社 半導体基板の製造方法及び半導体デバイスの製造方法
CN101281912B (zh) * 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
JP5220335B2 (ja) * 2007-04-11 2013-06-26 信越化学工業株式会社 Soi基板の製造方法
KR101436116B1 (ko) * 2007-04-27 2014-09-01 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Soi 기판 및 그 제조 방법, 및 반도체 장치
JP5272329B2 (ja) * 2007-05-22 2013-08-28 信越半導体株式会社 Soiウエーハの製造方法
KR100873299B1 (ko) * 2007-08-20 2008-12-11 주식회사 실트론 Ssoi 기판의 제조방법
US8101501B2 (en) * 2007-10-10 2012-01-24 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
US8093136B2 (en) * 2007-12-28 2012-01-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
EP2105957A3 (fr) * 2008-03-26 2011-01-19 Semiconductor Energy Laboratory Co., Ltd. Procédé de fabrication d'un substrat SOI et procédé de fabrication d'un dispositif semi-conducteur
JPWO2009131111A1 (ja) * 2008-04-25 2011-08-18 株式会社アルバック 太陽電池の製造方法,太陽電池の製造装置,及び太陽電池
JP2010114409A (ja) * 2008-10-10 2010-05-20 Sony Corp Soi基板とその製造方法、固体撮像装置とその製造方法、および撮像装置
US7955940B2 (en) * 2009-09-01 2011-06-07 International Business Machines Corporation Silicon-on-insulator substrate with built-in substrate junction

Also Published As

Publication number Publication date
TW201110199A (en) 2011-03-16
CN101989567B (zh) 2015-03-04
US8058149B2 (en) 2011-11-15
EP2282332A1 (fr) 2011-02-09
KR101698434B1 (ko) 2017-01-20
CN101989567A (zh) 2011-03-23
US20110034006A1 (en) 2011-02-10
TWI492274B (zh) 2015-07-11
EP2282332B1 (fr) 2012-06-27
JP5666842B2 (ja) 2015-02-12
KR20110014083A (ko) 2011-02-10
JP2011035390A (ja) 2011-02-17

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