SE0900641L - Förfarande för framställning av halvledaranordning - Google Patents

Förfarande för framställning av halvledaranordning

Info

Publication number
SE0900641L
SE0900641L SE0900641A SE0900641A SE0900641L SE 0900641 L SE0900641 L SE 0900641L SE 0900641 A SE0900641 A SE 0900641A SE 0900641 A SE0900641 A SE 0900641A SE 0900641 L SE0900641 L SE 0900641L
Authority
SE
Sweden
Prior art keywords
impurity
stage
type channel
channel layer
layer
Prior art date
Application number
SE0900641A
Other languages
English (en)
Other versions
SE533083C2 (sv
Inventor
Rajesh Kumar Malhan
Adolf Schoener
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of SE0900641L publication Critical patent/SE0900641L/sv
Publication of SE533083C2 publication Critical patent/SE533083C2/sv

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/40Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02378Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/203
    • H01L21/2033
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Drying Of Semiconductors (AREA)
SE0900641A 2008-05-13 2009-05-12 Förfarande för framställning av halvledaranordning SE533083C2 (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008125683A JP2009277757A (ja) 2008-05-13 2008-05-13 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
SE0900641L true SE0900641L (sv) 2009-11-14
SE533083C2 SE533083C2 (sv) 2010-06-22

Family

ID=41416046

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0900641A SE533083C2 (sv) 2008-05-13 2009-05-12 Förfarande för framställning av halvledaranordning

Country Status (2)

Country Link
JP (1) JP2009277757A (sv)
SE (1) SE533083C2 (sv)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102057078B (zh) * 2008-06-04 2015-04-01 陶氏康宁公司 降低半导体外延内记忆效应的方法
JP5698043B2 (ja) * 2010-08-04 2015-04-08 株式会社ニューフレアテクノロジー 半導体製造装置
JP2013201190A (ja) 2012-03-23 2013-10-03 Toshiba Corp 接合形電界効果トランジスタ及びその製造方法
JP6541257B2 (ja) * 2015-06-22 2019-07-10 昭和電工株式会社 炭化珪素膜の成膜装置のクリーニング方法
JP6547444B2 (ja) * 2015-06-24 2019-07-24 株式会社デンソー 炭化珪素半導体のエピタキシャル成長方法
JP2017165615A (ja) * 2016-03-16 2017-09-21 住友電気工業株式会社 炭化珪素のエピタキシャル成長装置
JP6786939B2 (ja) * 2016-08-05 2020-11-18 富士電機株式会社 炭化珪素半導体基板および炭化珪素半導体基板の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0258325A (ja) * 1988-08-24 1990-02-27 Matsushita Electric Ind Co Ltd 半導体薄膜気相成長装置
JP3070309B2 (ja) * 1992-12-07 2000-07-31 富士電機株式会社 薄膜太陽電池の製造方法
JP3624963B2 (ja) * 1995-01-27 2005-03-02 川崎マイクロエレクトロニクス株式会社 成膜装置のクリーニング方法
JP2802747B2 (ja) * 1996-02-23 1998-09-24 株式会社半導体エネルギー研究所 プラズマ処理方法
JP3603598B2 (ja) * 1997-08-04 2004-12-22 住友化学株式会社 3−5族化合物半導体の製造方法
JP4487655B2 (ja) * 2004-04-14 2010-06-23 株式会社デンソー 半導体装置の製造方法
ITMI20041677A1 (it) * 2004-08-30 2004-11-30 E T C Epitaxial Technology Ct Processo di pulitura e processo operativo per un reattore cvd.

Also Published As

Publication number Publication date
JP2009277757A (ja) 2009-11-26
SE533083C2 (sv) 2010-06-22

Similar Documents

Publication Publication Date Title
SE0900641L (sv) Förfarande för framställning av halvledaranordning
KR101369355B1 (ko) 에피택셜 층 형성 동안에 형태를 제어하는 방법
TW200943389A (en) Selective formation of silicon carbon epitaxial layer
WO2012002995A3 (en) Thin films and methods of making them using cyclohexasilane
WO2015027080A3 (en) Selective deposition of diamond in thermal vias
JP2009071290A5 (sv)
JP2009533844A5 (sv)
WO2011115997A3 (en) Silicon nitride passivation layer for covering high aspect ratio features
WO2008073926A3 (en) Formation of epitaxial layers containing silicon
KR20090026354A (ko) 에피택시 챔버에서의 기판의 선-세정 방법
JP2007186413A5 (sv)
TW200802614A (en) A method of ultra-shallow junction formation using si film alloyed with carbon
SG151184A1 (en) Impurity control in hdp-cvd dep/etch/dep processes
JP2009111350A5 (sv)
JP2010512668A5 (sv)
JP2012114423A5 (sv)
JP2010157721A5 (sv)
CN105239056B (zh) 一种原子层沉积设备以及方法
JP2012015344A5 (ja) 半導体装置の製造方法、基板処理方法及び基板処理装置
TW200620452A (en) Method of preparing the surface of a Si substrate or layer or source and drain recess of semiconductor elements for depositing an epitaxial layer of sige
CN104716191B (zh) 双栅双极石墨烯场效应晶体管及其制作方法
WO2015096304A1 (zh) 在半导体衬底表面制备锌掺杂超浅结的方法
CN102290333A (zh) 一种适用于石墨烯基器件的栅氧介质的形成方法
SG168461A1 (en) Method for fabricating a semiconductor substrate
WO2009075321A1 (ja) GaN層含有積層基板及びその製造方法並びにデバイス