GB2525332A - Epitaxial film growth on patterned substrate - Google Patents

Epitaxial film growth on patterned substrate Download PDF

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Publication number
GB2525332A
GB2525332A GB1510570.3A GB201510570A GB2525332A GB 2525332 A GB2525332 A GB 2525332A GB 201510570 A GB201510570 A GB 201510570A GB 2525332 A GB2525332 A GB 2525332A
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GB
United Kingdom
Prior art keywords
trench
epi layer
embodiment includes
defect
epi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB1510570.3A
Other versions
GB2525332B (en
GB201510570D0 (en
Inventor
Niti Goel
Niloy Mukherjee
Seung Hoon Sung
Van H Le
Matthew V Metz
Jack T Kavalieros
Ravi Pillarisetty
Sanaz K Gardner
Sansaptak Dasgupta
Willy Rachmady
Benjamin Chu-Kung
Marko Radosavljevic
Gilbert Dewey
Marc C French
Jessica S Kachian
Suri Satyarth
Robert S Chau
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Intel Corp
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Intel Corp
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Publication date
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Publication of GB201510570D0 publication Critical patent/GB201510570D0/en
Publication of GB2525332A publication Critical patent/GB2525332A/en
Application granted granted Critical
Publication of GB2525332B publication Critical patent/GB2525332B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

An embodiment includes depositing a material onto a substrate where the material includes a different lattice constant than the substrate (e.g., III-V or IV epitaxial (EPI) material on a Si substrate). An embodiment includes an EPI layer formed within a trench having walls that narrow as the trench extends upwards. An embodiment includes an EPI layer formed within a trench using multiple growth temperatures. A defect barrier, formed in the EPI layer when the temperature changes, contains defects within the trench and below the defect barrier. The EPI layer above the defect barrier and within the trench is relatively defect free. An embodiment includes an EPI layer annealed within a trench to induce defect annihilation. An embodiment includes an EPI superlattice formed within a trench and covered with a relatively defect free EPI layer (that is still included in the trench). Other embodiments are described herein.
GB1510570.3A 2012-12-20 2013-06-29 Epitaxial film growth on patterned substrate Active GB2525332B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/722,746 US8785907B2 (en) 2012-12-20 2012-12-20 Epitaxial film growth on patterned substrate
PCT/US2013/048799 WO2014099037A1 (en) 2012-12-20 2013-06-29 Epitaxial film growth on patterned substrate

Publications (3)

Publication Number Publication Date
GB201510570D0 GB201510570D0 (en) 2015-07-29
GB2525332A true GB2525332A (en) 2015-10-21
GB2525332B GB2525332B (en) 2017-09-06

Family

ID=50973608

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1510570.3A Active GB2525332B (en) 2012-12-20 2013-06-29 Epitaxial film growth on patterned substrate

Country Status (7)

Country Link
US (1) US8785907B2 (en)
KR (1) KR102072610B1 (en)
CN (1) CN104813442B (en)
DE (1) DE112013005557T5 (en)
GB (1) GB2525332B (en)
TW (1) TWI532081B (en)
WO (1) WO2014099037A1 (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9123633B2 (en) 2013-02-01 2015-09-01 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for forming semiconductor regions in trenches
CN105531797A (en) * 2013-06-28 2016-04-27 英特尔公司 Nanostructures and nanofeatures with si (111) planes on si (100) wafers for iii-n epitaxy
CN107004712B (en) * 2014-12-23 2021-04-20 英特尔公司 Forming a uniform layer using an aspect ratio trench based process
CN105990475B (en) * 2015-02-11 2019-03-08 中国科学院苏州纳米技术与纳米仿生研究所 Opto-electronic device and preparation method thereof
US9401583B1 (en) * 2015-03-30 2016-07-26 International Business Machines Corporation Laser structure on silicon using aspect ratio trapping growth
US9443940B1 (en) 2015-04-07 2016-09-13 Globalfoundries Inc. Defect reduction with rotated double aspect ratio trapping
EP3125273B1 (en) * 2015-07-31 2024-08-28 IMEC vzw Strained group iv channels
US9570297B1 (en) 2015-12-09 2017-02-14 International Business Machines Corporation Elimination of defects in long aspect ratio trapping trench structures
KR102430501B1 (en) 2015-12-29 2022-08-09 삼성전자주식회사 Semiconductor single crystal sturucture, semiconductor device and method of fabricating the same
US10181526B2 (en) 2016-06-02 2019-01-15 Samsung Electronics Co., Ltd. Field effect transistor including multiple aspect ratio trapping structures
WO2017213650A1 (en) 2016-06-09 2017-12-14 Intel Corporation Quantum dot devices with trenched substrates
US10847619B2 (en) * 2016-09-30 2020-11-24 Intel Corporation Supperlatice channel included in a trench
EP3340403B1 (en) * 2016-12-23 2023-06-28 IMEC vzw Improvements in or relating to laser devices
US10522741B1 (en) 2018-06-14 2019-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process
KR102644454B1 (en) * 2021-11-05 2024-03-08 한국과학기술연구원 Semiconductor device including trehcn with undercut structure and method for manufacturing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080142880A1 (en) * 2001-10-04 2008-06-19 Vishay General Semiconductor Llc Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands
US20090146263A1 (en) * 2007-12-10 2009-06-11 International Business Machines Corporation Structure and method to increase effective mosfet width
US7682859B2 (en) * 2004-07-23 2010-03-23 International Business Machines Corporation Patterned strained semiconductor substrate and device
US20100283108A1 (en) * 2009-05-08 2010-11-11 Renesas Technology Corp. Semiconductor device and method of manufacturing the same
US20120088344A1 (en) * 2010-10-08 2012-04-12 Taiwan Semiconductor Manufacturing Company, Ltd., ("Tsmc") Method of fabricating a semiconductor device having an epitaxy region

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070267722A1 (en) * 2006-05-17 2007-11-22 Amberwave Systems Corporation Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US7777250B2 (en) * 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
US7494911B2 (en) 2006-09-27 2009-02-24 Intel Corporation Buffer layers for device isolation of devices grown on silicon
SG169921A1 (en) * 2009-09-18 2011-04-29 Taiwan Semiconductor Mfg Improved fabrication and structures of crystalline material
US8575698B2 (en) * 2011-10-27 2013-11-05 International Business Machines Corporation MOSFET with thin semiconductor channel and embedded stressor with enhanced junction isolation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080142880A1 (en) * 2001-10-04 2008-06-19 Vishay General Semiconductor Llc Method for fabricating a power semiconductor device having a voltage sustaining layer with a terraced trench facilitating formation of floating islands
US7682859B2 (en) * 2004-07-23 2010-03-23 International Business Machines Corporation Patterned strained semiconductor substrate and device
US20090146263A1 (en) * 2007-12-10 2009-06-11 International Business Machines Corporation Structure and method to increase effective mosfet width
US20100283108A1 (en) * 2009-05-08 2010-11-11 Renesas Technology Corp. Semiconductor device and method of manufacturing the same
US20120088344A1 (en) * 2010-10-08 2012-04-12 Taiwan Semiconductor Manufacturing Company, Ltd., ("Tsmc") Method of fabricating a semiconductor device having an epitaxy region

Also Published As

Publication number Publication date
CN104813442B (en) 2017-10-31
US20140175378A1 (en) 2014-06-26
CN104813442A (en) 2015-07-29
DE112013005557T5 (en) 2015-08-20
TW201442070A (en) 2014-11-01
US8785907B2 (en) 2014-07-22
GB2525332B (en) 2017-09-06
KR20150097540A (en) 2015-08-26
WO2014099037A1 (en) 2014-06-26
GB201510570D0 (en) 2015-07-29
TWI532081B (en) 2016-05-01
KR102072610B1 (en) 2020-02-03

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