SG143236A1 - Multi-chips package and method of forming the same - Google Patents

Multi-chips package and method of forming the same

Info

Publication number
SG143236A1
SG143236A1 SG200718396-5A SG2007183965A SG143236A1 SG 143236 A1 SG143236 A1 SG 143236A1 SG 2007183965 A SG2007183965 A SG 2007183965A SG 143236 A1 SG143236 A1 SG 143236A1
Authority
SG
Singapore
Prior art keywords
die
dielectric layer
rdl
forming
substrate
Prior art date
Application number
SG200718396-5A
Other languages
English (en)
Inventor
Wen-Kun Yang
Original Assignee
Advanced Chip Eng Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Chip Eng Tech Inc filed Critical Advanced Chip Eng Tech Inc
Publication of SG143236A1 publication Critical patent/SG143236A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
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    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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    • H01L2924/351Thermal stress

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)
SG200718396-5A 2006-12-07 2007-12-06 Multi-chips package and method of forming the same SG143236A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/567,767 US20080136002A1 (en) 2006-12-07 2006-12-07 Multi-chips package and method of forming the same

Publications (1)

Publication Number Publication Date
SG143236A1 true SG143236A1 (en) 2008-06-27

Family

ID=39493494

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200718396-5A SG143236A1 (en) 2006-12-07 2007-12-06 Multi-chips package and method of forming the same

Country Status (7)

Country Link
US (1) US20080136002A1 (ko)
JP (1) JP2008153654A (ko)
KR (1) KR20080052491A (ko)
CN (1) CN101197360A (ko)
DE (1) DE102007059162A1 (ko)
SG (1) SG143236A1 (ko)
TW (1) TW200832666A (ko)

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7812434B2 (en) * 2007-01-03 2010-10-12 Advanced Chip Engineering Technology Inc Wafer level package with die receiving through-hole and method of the same
TWI360207B (en) 2007-10-22 2012-03-11 Advanced Semiconductor Eng Chip package structure and method of manufacturing
TWI453877B (zh) * 2008-11-07 2014-09-21 Advanced Semiconductor Eng 內埋晶片封裝的結構及製程
TWI501359B (zh) * 2009-03-13 2015-09-21 Xintec Inc 電子元件封裝體及其形成方法
TWI460844B (zh) * 2009-04-06 2014-11-11 King Dragon Internat Inc 具有內嵌式晶片及矽導通孔晶粒之堆疊封裝結構及其製造方法
US8612809B2 (en) * 2009-12-31 2013-12-17 Intel Corporation Systems, methods, and apparatuses for stacked memory
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
US8320134B2 (en) 2010-02-05 2012-11-27 Advanced Semiconductor Engineering, Inc. Embedded component substrate and manufacturing methods thereof
CN102194706B (zh) * 2010-03-02 2013-08-21 日月光半导体制造股份有限公司 封装工艺
TW201131705A (en) * 2010-03-03 2011-09-16 Advanced Chip Eng Tech Inc Conductor package structure and method of the same
TWI411075B (zh) 2010-03-22 2013-10-01 Advanced Semiconductor Eng 半導體封裝件及其製造方法
US8518746B2 (en) * 2010-09-02 2013-08-27 Stats Chippac, Ltd. Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die
TWI501365B (zh) * 2010-10-13 2015-09-21 Ind Tech Res Inst 封裝單元及其堆疊結構與製造方法
US9337116B2 (en) * 2010-10-28 2016-05-10 Stats Chippac, Ltd. Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die
TWI416679B (zh) 2010-12-06 2013-11-21 Ind Tech Res Inst 半導體結構及其製造方法
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US8487426B2 (en) 2011-03-15 2013-07-16 Advanced Semiconductor Engineering, Inc. Semiconductor package with embedded die and manufacturing methods thereof
WO2012126377A1 (en) * 2011-03-22 2012-09-27 Nantong Fujitsu Microelectronics Co., Ltd. System-level packaging methods and structures
US9543269B2 (en) * 2011-03-22 2017-01-10 Nantong Fujitsu Microelectronics Co., Ltd. System-level packaging methods and structures
US8546900B2 (en) * 2011-06-09 2013-10-01 Optiz, Inc. 3D integration microelectronic assembly for integrated circuit devices
KR101918261B1 (ko) * 2011-11-28 2018-11-14 삼성전자주식회사 모바일 장치용 반도체 패키지
US8648473B2 (en) * 2012-03-27 2014-02-11 Infineon Technologies Ag Chip arrangement and a method for forming a chip arrangement
US9136213B2 (en) * 2012-08-02 2015-09-15 Infineon Technologies Ag Integrated system and method of making the integrated system
US9941229B2 (en) 2013-10-31 2018-04-10 Infineon Technologies Ag Device including semiconductor chips and method for producing such device
US9527723B2 (en) 2014-03-13 2016-12-27 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming microelectromechanical systems (MEMS) package
KR20150144416A (ko) * 2014-06-16 2015-12-28 한국전자통신연구원 적층 모듈 패키지 및 그 제조 방법
TWI566348B (zh) * 2014-09-03 2017-01-11 矽品精密工業股份有限公司 封裝結構及其製法
TWI611523B (zh) * 2014-09-05 2018-01-11 矽品精密工業股份有限公司 半導體封裝件之製法
CN104282657A (zh) * 2014-10-28 2015-01-14 华进半导体封装先导技术研发中心有限公司 超薄多层封装体及其制作方法
KR101640076B1 (ko) 2014-11-05 2016-07-15 앰코 테크놀로지 코리아 주식회사 웨이퍼 레벨의 칩 적층형 패키지 및 이의 제조 방법
CN104409424B (zh) * 2014-12-24 2017-05-24 华进半导体封装先导技术研发中心有限公司 一种基于玻璃转接板的叠层封装体及其制备方法
US9627224B2 (en) * 2015-03-30 2017-04-18 Stmicroelectronics, Inc. Semiconductor device with sloped sidewall and related methods
TWI634629B (zh) * 2015-08-20 2018-09-01 矽品精密工業股份有限公司 電子封裝件及其製法
US9831147B2 (en) 2015-11-30 2017-11-28 Infineon Technologies Austria Ag Packaged semiconductor device with internal electrical connections to outer contacts
EP3267484B1 (en) * 2016-07-04 2021-09-01 ams International AG Sensor chip stack and method of producing a sensor chip stack
US9679878B1 (en) * 2016-07-27 2017-06-13 Semiconductor Components Industries, Llc Embedded stacked die packages and related methods
KR102549402B1 (ko) 2016-08-04 2023-06-28 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
KR102059403B1 (ko) * 2016-10-04 2019-12-26 삼성전자주식회사 팬-아웃 반도체 패키지
US9966361B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10312194B2 (en) 2016-11-04 2019-06-04 General Electric Company Stacked electronics package and method of manufacturing thereof
US9966371B1 (en) 2016-11-04 2018-05-08 General Electric Company Electronics package having a multi-thickness conductor layer and method of manufacturing thereof
US10700035B2 (en) * 2016-11-04 2020-06-30 General Electric Company Stacked electronics package and method of manufacturing thereof
US10529671B2 (en) * 2016-12-13 2020-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same
US10763242B2 (en) 2017-06-23 2020-09-01 Samsung Electronics Co., Ltd. Semiconductor package and method of manufacturing the same
US11158595B2 (en) * 2017-07-07 2021-10-26 Texas Instruments Incorporated Embedded die package multichip module
US10497648B2 (en) * 2018-04-03 2019-12-03 General Electric Company Embedded electronics package with multi-thickness interconnect structure and method of making same
CN108364913A (zh) * 2018-04-25 2018-08-03 哈尔滨奥瑞德光电技术有限公司 一种用于碳化硅功率器件的无引线封装结构和制备方法
CN109599389A (zh) * 2018-12-19 2019-04-09 成都瑞迪威科技有限公司 一种一体化集成电路封装结构
US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
US11088100B2 (en) * 2019-02-21 2021-08-10 Powertech Technology Inc. Semiconductor package and manufacturing method thereof
US20200272564A1 (en) 2019-02-22 2020-08-27 Micron Technology, Inc. Memory device interface and method
US11798865B2 (en) * 2019-03-04 2023-10-24 Intel Corporation Nested architectures for enhanced heterogeneous integration
CN110035625B (zh) * 2019-03-07 2021-07-06 武汉迈斯卡德微电子科技有限公司 一种讯号量测介质软板的制作方法
KR102586890B1 (ko) * 2019-04-03 2023-10-06 삼성전기주식회사 반도체 패키지
US10903169B2 (en) * 2019-04-30 2021-01-26 Advanced Semiconductor Engineering, Inc. Conductive structure and wiring structure including the same
IT201900006740A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di strutturazione di substrati
IT201900006736A1 (it) 2019-05-10 2020-11-10 Applied Materials Inc Procedimenti di fabbricazione di package
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
EP4081954A4 (en) 2019-12-27 2023-04-05 Micron Technology, Inc. NEUROMORPHIC STORAGE DEVICE AND METHOD
KR20220116258A (ko) 2019-12-30 2022-08-22 마이크론 테크놀로지, 인크. 메모리 디바이스 인터페이스 및 방법
CN113125007B (zh) * 2019-12-31 2023-04-07 科大国盾量子技术股份有限公司 一种正弦门控探测器雪崩信号处理系统及处理方法
EP4085459A4 (en) 2019-12-31 2024-02-21 Micron Technology, Inc. MEMORY MODULE MULTI-PORT BUFFER TECHNIQUES
US11183765B2 (en) 2020-02-05 2021-11-23 Samsung Electro-Mechanics Co., Ltd. Chip radio frequency package and radio frequency module
US11101840B1 (en) 2020-02-05 2021-08-24 Samsung Electro-Mechanics Co., Ltd. Chip radio frequency package and radio frequency module
CN111312697B (zh) * 2020-02-28 2022-02-22 西安微电子技术研究所 一种三维堆叠集成结构及其多芯片集成结构和制备方法
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11605571B2 (en) * 2020-05-29 2023-03-14 Qualcomm Incorporated Package comprising a substrate, an integrated device, and an encapsulation layer with undercut
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
CN112349693B (zh) * 2020-09-28 2022-06-28 中国电子科技集团公司第二十九研究所 一种采用bga接口的宽带射频系统级封装结构
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
CN115274598A (zh) * 2021-02-01 2022-11-01 长江存储科技有限责任公司 扇出型芯片堆叠封装结构及其制造方法
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging
CN113707630A (zh) * 2021-08-26 2021-11-26 矽磐微电子(重庆)有限公司 Mcm封装结构及其制作方法

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