SG143236A1 - Multi-chips package and method of forming the same - Google Patents
Multi-chips package and method of forming the sameInfo
- Publication number
- SG143236A1 SG143236A1 SG200718396-5A SG2007183965A SG143236A1 SG 143236 A1 SG143236 A1 SG 143236A1 SG 2007183965 A SG2007183965 A SG 2007183965A SG 143236 A1 SG143236 A1 SG 143236A1
- Authority
- SG
- Singapore
- Prior art keywords
- die
- dielectric layer
- rdl
- forming
- substrate
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/92—Specific sequence of method steps
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- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/567,767 US20080136002A1 (en) | 2006-12-07 | 2006-12-07 | Multi-chips package and method of forming the same |
Publications (1)
Publication Number | Publication Date |
---|---|
SG143236A1 true SG143236A1 (en) | 2008-06-27 |
Family
ID=39493494
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200718396-5A SG143236A1 (en) | 2006-12-07 | 2007-12-06 | Multi-chips package and method of forming the same |
Country Status (7)
Country | Link |
---|---|
US (1) | US20080136002A1 (ko) |
JP (1) | JP2008153654A (ko) |
KR (1) | KR20080052491A (ko) |
CN (1) | CN101197360A (ko) |
DE (1) | DE102007059162A1 (ko) |
SG (1) | SG143236A1 (ko) |
TW (1) | TW200832666A (ko) |
Families Citing this family (78)
Publication number | Priority date | Publication date | Assignee | Title |
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US7812434B2 (en) * | 2007-01-03 | 2010-10-12 | Advanced Chip Engineering Technology Inc | Wafer level package with die receiving through-hole and method of the same |
TWI360207B (en) | 2007-10-22 | 2012-03-11 | Advanced Semiconductor Eng | Chip package structure and method of manufacturing |
TWI453877B (zh) * | 2008-11-07 | 2014-09-21 | Advanced Semiconductor Eng | 內埋晶片封裝的結構及製程 |
TWI501359B (zh) * | 2009-03-13 | 2015-09-21 | Xintec Inc | 電子元件封裝體及其形成方法 |
TWI460844B (zh) * | 2009-04-06 | 2014-11-11 | King Dragon Internat Inc | 具有內嵌式晶片及矽導通孔晶粒之堆疊封裝結構及其製造方法 |
US8612809B2 (en) * | 2009-12-31 | 2013-12-17 | Intel Corporation | Systems, methods, and apparatuses for stacked memory |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US8320134B2 (en) | 2010-02-05 | 2012-11-27 | Advanced Semiconductor Engineering, Inc. | Embedded component substrate and manufacturing methods thereof |
CN102194706B (zh) * | 2010-03-02 | 2013-08-21 | 日月光半导体制造股份有限公司 | 封装工艺 |
TW201131705A (en) * | 2010-03-03 | 2011-09-16 | Advanced Chip Eng Tech Inc | Conductor package structure and method of the same |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
US8518746B2 (en) * | 2010-09-02 | 2013-08-27 | Stats Chippac, Ltd. | Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die |
TWI501365B (zh) * | 2010-10-13 | 2015-09-21 | Ind Tech Res Inst | 封裝單元及其堆疊結構與製造方法 |
US9337116B2 (en) * | 2010-10-28 | 2016-05-10 | Stats Chippac, Ltd. | Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die |
TWI416679B (zh) | 2010-12-06 | 2013-11-21 | Ind Tech Res Inst | 半導體結構及其製造方法 |
US9406658B2 (en) | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
US8487426B2 (en) | 2011-03-15 | 2013-07-16 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with embedded die and manufacturing methods thereof |
WO2012126377A1 (en) * | 2011-03-22 | 2012-09-27 | Nantong Fujitsu Microelectronics Co., Ltd. | System-level packaging methods and structures |
US9543269B2 (en) * | 2011-03-22 | 2017-01-10 | Nantong Fujitsu Microelectronics Co., Ltd. | System-level packaging methods and structures |
US8546900B2 (en) * | 2011-06-09 | 2013-10-01 | Optiz, Inc. | 3D integration microelectronic assembly for integrated circuit devices |
KR101918261B1 (ko) * | 2011-11-28 | 2018-11-14 | 삼성전자주식회사 | 모바일 장치용 반도체 패키지 |
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-
2006
- 2006-12-07 US US11/567,767 patent/US20080136002A1/en not_active Abandoned
-
2007
- 2007-12-05 TW TW096146338A patent/TW200832666A/zh unknown
- 2007-12-06 DE DE102007059162A patent/DE102007059162A1/de not_active Withdrawn
- 2007-12-06 SG SG200718396-5A patent/SG143236A1/en unknown
- 2007-12-07 KR KR1020070126609A patent/KR20080052491A/ko not_active Application Discontinuation
- 2007-12-07 CN CNA2007101969953A patent/CN101197360A/zh active Pending
- 2007-12-07 JP JP2007317569A patent/JP2008153654A/ja not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE102007059162A1 (de) | 2008-07-03 |
KR20080052491A (ko) | 2008-06-11 |
CN101197360A (zh) | 2008-06-11 |
US20080136002A1 (en) | 2008-06-12 |
JP2008153654A (ja) | 2008-07-03 |
TW200832666A (en) | 2008-08-01 |
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