SG140608A1 - Semiconductor construction with isolation regions for dram cell and production method - Google Patents
Semiconductor construction with isolation regions for dram cell and production methodInfo
- Publication number
- SG140608A1 SG140608A1 SG200801563-8A SG2008015638A SG140608A1 SG 140608 A1 SG140608 A1 SG 140608A1 SG 2008015638 A SG2008015638 A SG 2008015638A SG 140608 A1 SG140608 A1 SG 140608A1
- Authority
- SG
- Singapore
- Prior art keywords
- production method
- constructions
- isolation regions
- dram cell
- semiconductor construction
- Prior art date
Links
- 238000010276 construction Methods 0.000 title abstract 6
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000002955 isolation Methods 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/512—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being parallel to the channel plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/925,789 US7122425B2 (en) | 2004-08-24 | 2004-08-24 | Methods of forming semiconductor constructions |
Publications (1)
Publication Number | Publication Date |
---|---|
SG140608A1 true SG140608A1 (en) | 2008-03-28 |
Family
ID=34959107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200801563-8A SG140608A1 (en) | 2004-08-24 | 2004-10-19 | Semiconductor construction with isolation regions for dram cell and production method |
Country Status (7)
Country | Link |
---|---|
US (2) | US7122425B2 (ja) |
EP (2) | EP2330620B1 (ja) |
JP (1) | JP5071899B2 (ja) |
CN (1) | CN101010799B (ja) |
SG (1) | SG140608A1 (ja) |
TW (1) | TWI248197B (ja) |
WO (1) | WO2006022765A1 (ja) |
Families Citing this family (62)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5977579A (en) | 1998-12-03 | 1999-11-02 | Micron Technology, Inc. | Trench dram cell with vertical device and buried word lines |
US7019353B2 (en) * | 2002-07-26 | 2006-03-28 | Micron Technology, Inc. | Three dimensional flash cell |
US7071043B2 (en) * | 2002-08-15 | 2006-07-04 | Micron Technology, Inc. | Methods of forming a field effect transistor having source/drain material over insulative material |
US6844591B1 (en) * | 2003-09-17 | 2005-01-18 | Micron Technology, Inc. | Method of forming DRAM access transistors |
JP2005227719A (ja) * | 2004-02-16 | 2005-08-25 | Fuji Xerox Co Ltd | 画像形成装置 |
US7262089B2 (en) * | 2004-03-11 | 2007-08-28 | Micron Technology, Inc. | Methods of forming semiconductor structures |
US7518182B2 (en) * | 2004-07-20 | 2009-04-14 | Micron Technology, Inc. | DRAM layout with vertical FETs and method of formation |
US7547945B2 (en) * | 2004-09-01 | 2009-06-16 | Micron Technology, Inc. | Transistor devices, transistor structures and semiconductor constructions |
US7326611B2 (en) * | 2005-02-03 | 2008-02-05 | Micron Technology, Inc. | DRAM arrays, vertical transistor structures and methods of forming transistor structures and DRAM arrays |
US7244659B2 (en) * | 2005-03-10 | 2007-07-17 | Micron Technology, Inc. | Integrated circuits and methods of forming a field effect transistor |
US7384849B2 (en) | 2005-03-25 | 2008-06-10 | Micron Technology, Inc. | Methods of forming recessed access devices associated with semiconductor constructions |
US7120046B1 (en) | 2005-05-13 | 2006-10-10 | Micron Technology, Inc. | Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines |
US7371627B1 (en) | 2005-05-13 | 2008-05-13 | Micron Technology, Inc. | Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines |
US7888721B2 (en) | 2005-07-06 | 2011-02-15 | Micron Technology, Inc. | Surround gate access transistors with grown ultra-thin bodies |
US7282401B2 (en) | 2005-07-08 | 2007-10-16 | Micron Technology, Inc. | Method and apparatus for a self-aligned recessed access device (RAD) transistor gate |
US7768051B2 (en) | 2005-07-25 | 2010-08-03 | Micron Technology, Inc. | DRAM including a vertical surround gate transistor |
US7867851B2 (en) | 2005-08-30 | 2011-01-11 | Micron Technology, Inc. | Methods of forming field effect transistors on substrates |
US7696567B2 (en) | 2005-08-31 | 2010-04-13 | Micron Technology, Inc | Semiconductor memory device |
US7687342B2 (en) | 2005-09-01 | 2010-03-30 | Micron Technology, Inc. | Method of manufacturing a memory device |
US7867845B2 (en) * | 2005-09-01 | 2011-01-11 | Micron Technology, Inc. | Transistor gate forming methods and transistor structures |
US7416943B2 (en) | 2005-09-01 | 2008-08-26 | Micron Technology, Inc. | Peripheral gate stacks and recessed array gates |
US7557032B2 (en) | 2005-09-01 | 2009-07-07 | Micron Technology, Inc. | Silicided recessed silicon |
US7700441B2 (en) * | 2006-02-02 | 2010-04-20 | Micron Technology, Inc. | Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates |
KR100696764B1 (ko) * | 2006-03-23 | 2007-03-19 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조 방법 |
US8734583B2 (en) * | 2006-04-04 | 2014-05-27 | Micron Technology, Inc. | Grown nanofin transistors |
US7491995B2 (en) | 2006-04-04 | 2009-02-17 | Micron Technology, Inc. | DRAM with nanofin transistors |
US20070228491A1 (en) * | 2006-04-04 | 2007-10-04 | Micron Technology, Inc. | Tunneling transistor with sublithographic channel |
JP2009532905A (ja) * | 2006-04-04 | 2009-09-10 | マイクロン テクノロジー, インク. | ナノFinトンネリング・トランジスタ |
US7425491B2 (en) | 2006-04-04 | 2008-09-16 | Micron Technology, Inc. | Nanowire transistor with surrounding gate |
US8354311B2 (en) * | 2006-04-04 | 2013-01-15 | Micron Technology, Inc. | Method for forming nanofin transistors |
US8008144B2 (en) | 2006-05-11 | 2011-08-30 | Micron Technology, Inc. | Dual work function recessed access device and methods of forming |
US8860174B2 (en) * | 2006-05-11 | 2014-10-14 | Micron Technology, Inc. | Recessed antifuse structures and methods of making the same |
US20070262395A1 (en) | 2006-05-11 | 2007-11-15 | Gibbons Jasper S | Memory cell access devices and methods of making the same |
US7602001B2 (en) | 2006-07-17 | 2009-10-13 | Micron Technology, Inc. | Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells |
US7772632B2 (en) * | 2006-08-21 | 2010-08-10 | Micron Technology, Inc. | Memory arrays and methods of fabricating memory arrays |
US7745319B2 (en) | 2006-08-22 | 2010-06-29 | Micron Technology, Inc. | System and method for fabricating a fin field effect transistor |
US7589995B2 (en) * | 2006-09-07 | 2009-09-15 | Micron Technology, Inc. | One-transistor memory cell with bias gate |
US20080061363A1 (en) * | 2006-09-08 | 2008-03-13 | Rolf Weis | Integrated transistor device and corresponding manufacturing method |
US7642586B2 (en) * | 2006-09-08 | 2010-01-05 | Qimonda Ag | Integrated memory cell array |
US7808053B2 (en) * | 2006-12-29 | 2010-10-05 | Intel Corporation | Method, apparatus, and system for flash memory |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
KR101108711B1 (ko) * | 2007-08-23 | 2012-01-30 | 삼성전자주식회사 | 액티브 패턴 구조물 및 그 형성 방법, 비휘발성 메모리소자 및 그 제조 방법. |
KR100948093B1 (ko) * | 2007-12-21 | 2010-03-16 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
KR100912965B1 (ko) | 2007-12-24 | 2009-08-20 | 주식회사 하이닉스반도체 | 수직 채널 트랜지스터를 구비한 반도체 소자의 제조 방법 |
KR100956602B1 (ko) * | 2008-04-01 | 2010-05-11 | 주식회사 하이닉스반도체 | 반도체 소자 제조 방법 |
KR100971412B1 (ko) * | 2008-05-21 | 2010-07-21 | 주식회사 하이닉스반도체 | 반도체 장치의 수직 채널 트랜지스터 형성 방법 |
US7824986B2 (en) * | 2008-11-05 | 2010-11-02 | Micron Technology, Inc. | Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates having at least two different work functions |
US8158967B2 (en) * | 2009-11-23 | 2012-04-17 | Micron Technology, Inc. | Integrated memory arrays |
US8216939B2 (en) * | 2010-08-20 | 2012-07-10 | Micron Technology, Inc. | Methods of forming openings |
US9401363B2 (en) | 2011-08-23 | 2016-07-26 | Micron Technology, Inc. | Vertical transistor devices, memory arrays, and methods of forming vertical transistor devices |
KR20130053278A (ko) * | 2011-11-15 | 2013-05-23 | 에스케이하이닉스 주식회사 | 비트라인 접촉 면적 확보를 위한 반도체 소자, 그 반도체 소자를 갖는 모듈 및 시스템 |
EP3507831B1 (en) | 2016-08-31 | 2021-03-03 | Micron Technology, Inc. | Memory arrays |
US10355002B2 (en) | 2016-08-31 | 2019-07-16 | Micron Technology, Inc. | Memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry |
US10056386B2 (en) | 2016-08-31 | 2018-08-21 | Micron Technology, Inc. | Memory cells and memory arrays |
WO2018044479A1 (en) | 2016-08-31 | 2018-03-08 | Micron Technology, Inc. | Sense amplifier constructions |
KR102160178B1 (ko) | 2016-08-31 | 2020-09-28 | 마이크론 테크놀로지, 인크 | 메모리 어레이 |
EP3507830A4 (en) | 2016-08-31 | 2020-04-01 | Micron Technology, Inc. | STORAGE CELLS AND STORAGE ARRAYS |
KR102134532B1 (ko) | 2016-08-31 | 2020-07-20 | 마이크론 테크놀로지, 인크 | 메모리 셀들 및 메모리 어레이들 |
CN110192280A (zh) | 2017-01-12 | 2019-08-30 | 美光科技公司 | 存储器单元、双晶体管单电容器存储器单元阵列、形成双晶体管单电容器存储器单元阵列的方法及用于制造集成电路的方法 |
WO2019045882A1 (en) * | 2017-08-29 | 2019-03-07 | Micron Technology, Inc. | MEMORY CIRCUITS |
CN110581103B (zh) * | 2018-06-07 | 2022-04-12 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
US11557591B2 (en) | 2020-04-22 | 2023-01-17 | Micron Technology, Inc. | Transistors, memory arrays, and methods used in forming an array of memory cells individually comprising a transistor |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR920010461B1 (ko) | 1983-09-28 | 1992-11-28 | 가부시끼가이샤 히다찌세이사꾸쇼 | 반도체 메모리와 그 제조 방법 |
JPH02130873A (ja) * | 1988-11-10 | 1990-05-18 | Nec Corp | 半導体集積回路装置 |
JPH0834302B2 (ja) | 1990-04-21 | 1996-03-29 | 株式会社東芝 | 半導体記憶装置 |
DE19620625C1 (de) | 1996-05-22 | 1997-10-23 | Siemens Ag | DRAM-Zellenanordnung und Verfahren zu deren Herstellung |
US5792687A (en) * | 1996-08-01 | 1998-08-11 | Vanguard International Semiconductor Corporation | Method for fabricating high density integrated circuits using oxide and polysilicon spacers |
US5874760A (en) * | 1997-01-22 | 1999-02-23 | International Business Machines Corporation | 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation |
US5792690A (en) * | 1997-05-15 | 1998-08-11 | Vanguard International Semiconductor Corporation | Method of fabricating a DRAM cell with an area equal to four times the used minimum feature |
US6380026B2 (en) | 1997-08-22 | 2002-04-30 | Micron Technology, Inc. | Processing methods of forming integrated circuitry memory devices, methods of forming DRAM arrays, and related semiconductor masks |
US6093614A (en) * | 1998-03-04 | 2000-07-25 | Siemens Aktiengesellschaft | Memory cell structure and fabrication |
EP1003219B1 (en) | 1998-11-19 | 2011-12-28 | Qimonda AG | DRAM with stacked capacitor and buried word line |
JP2001102549A (ja) * | 2000-08-28 | 2001-04-13 | Toshiba Corp | 半導体記憶装置 |
US6482420B2 (en) | 2000-12-27 | 2002-11-19 | Noboru Huziwara | Composition having bactericidal action, cosmetics containing said composition and ultraviolet ray screening agent |
DE10111755C1 (de) * | 2001-03-12 | 2002-05-16 | Infineon Technologies Ag | Verfahren zur Herstellung einer Speicherzelle eines Halbleiterspeichers |
US6498062B2 (en) | 2001-04-27 | 2002-12-24 | Micron Technology, Inc. | DRAM access transistor |
US6853252B2 (en) | 2002-10-04 | 2005-02-08 | Intersil Corporation | Phase-lock loop having programmable bandwidth |
JP2004247656A (ja) * | 2003-02-17 | 2004-09-02 | Renesas Technology Corp | 半導体装置及びその製造方法 |
-
2004
- 2004-08-24 US US10/925,789 patent/US7122425B2/en not_active Expired - Lifetime
- 2004-10-19 EP EP11001773.8A patent/EP2330620B1/en not_active Expired - Lifetime
- 2004-10-19 EP EP04795714.7A patent/EP1782467B1/en not_active Expired - Lifetime
- 2004-10-19 SG SG200801563-8A patent/SG140608A1/en unknown
- 2004-10-19 CN CN2004800438631A patent/CN101010799B/zh not_active Expired - Lifetime
- 2004-10-19 WO PCT/US2004/034587 patent/WO2006022765A1/en active Search and Examination
- 2004-10-19 JP JP2007529802A patent/JP5071899B2/ja not_active Expired - Lifetime
- 2004-11-04 TW TW093133695A patent/TWI248197B/zh active
-
2005
- 2005-11-14 US US11/274,727 patent/US7271413B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP2330620A3 (en) | 2012-04-04 |
TW200608558A (en) | 2006-03-01 |
US7271413B2 (en) | 2007-09-18 |
US20060046424A1 (en) | 2006-03-02 |
CN101010799B (zh) | 2010-05-26 |
TWI248197B (en) | 2006-01-21 |
EP2330620B1 (en) | 2020-05-13 |
WO2006022765A1 (en) | 2006-03-02 |
US7122425B2 (en) | 2006-10-17 |
EP1782467A1 (en) | 2007-05-09 |
JP2008511165A (ja) | 2008-04-10 |
US20060063350A1 (en) | 2006-03-23 |
JP5071899B2 (ja) | 2012-11-14 |
EP2330620A2 (en) | 2011-06-08 |
CN101010799A (zh) | 2007-08-01 |
EP1782467B1 (en) | 2017-06-07 |
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