SG108920A1 - Semiconductor integrated circuit device, production and operation method thereof - Google Patents

Semiconductor integrated circuit device, production and operation method thereof

Info

Publication number
SG108920A1
SG108920A1 SG200302610A SG200302610A SG108920A1 SG 108920 A1 SG108920 A1 SG 108920A1 SG 200302610 A SG200302610 A SG 200302610A SG 200302610 A SG200302610 A SG 200302610A SG 108920 A1 SG108920 A1 SG 108920A1
Authority
SG
Singapore
Prior art keywords
production
integrated circuit
semiconductor integrated
circuit device
operation method
Prior art date
Application number
SG200302610A
Other languages
English (en)
Inventor
Kobayashi Takashi
Kurata Hideaki
Kobayashi Naoki
Kume Hitoshi
Kimura Katsutaka
Saeki Shunichi
Original Assignee
Hitachi Ltd
Hitachi Device Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Device Eng filed Critical Hitachi Ltd
Publication of SG108920A1 publication Critical patent/SG108920A1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
SG200302610A 1999-07-14 2000-07-13 Semiconductor integrated circuit device, production and operation method thereof SG108920A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20024299A JP4012341B2 (ja) 1999-07-14 1999-07-14 半導体集積回路装置

Publications (1)

Publication Number Publication Date
SG108920A1 true SG108920A1 (en) 2005-02-28

Family

ID=16421170

Family Applications (2)

Application Number Title Priority Date Filing Date
SG200003919A SG118065A1 (en) 1999-07-14 2000-07-13 Semiconductor integrated circuit device productionand operation method thereof
SG200302610A SG108920A1 (en) 1999-07-14 2000-07-13 Semiconductor integrated circuit device, production and operation method thereof

Family Applications Before (1)

Application Number Title Priority Date Filing Date
SG200003919A SG118065A1 (en) 1999-07-14 2000-07-13 Semiconductor integrated circuit device productionand operation method thereof

Country Status (7)

Country Link
US (2) US6438028B1 (ja)
EP (1) EP1069619A3 (ja)
JP (1) JP4012341B2 (ja)
KR (1) KR100650470B1 (ja)
CN (1) CN100369253C (ja)
SG (2) SG118065A1 (ja)
TW (1) TW454353B (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100650470B1 (ko) * 1999-07-14 2006-11-28 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치와 그 제조 방법 및 그 동작 방법

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Also Published As

Publication number Publication date
CN1281258A (zh) 2001-01-24
EP1069619A3 (en) 2003-05-14
SG118065A1 (en) 2006-01-27
US6687156B2 (en) 2004-02-03
TW454353B (en) 2001-09-11
EP1069619A2 (en) 2001-01-17
US20020191458A1 (en) 2002-12-19
CN100369253C (zh) 2008-02-13
KR20010029937A (ko) 2001-04-16
US6438028B1 (en) 2002-08-20
KR100650470B1 (ko) 2006-11-28
JP4012341B2 (ja) 2007-11-21
JP2001028428A (ja) 2001-01-30

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