SE534510C2 - Funktionell inkapsling - Google Patents

Funktionell inkapsling Download PDF

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Publication number
SE534510C2
SE534510C2 SE0850083A SE0850083A SE534510C2 SE 534510 C2 SE534510 C2 SE 534510C2 SE 0850083 A SE0850083 A SE 0850083A SE 0850083 A SE0850083 A SE 0850083A SE 534510 C2 SE534510 C2 SE 534510C2
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SE
Sweden
Prior art keywords
metal
substrate
core
holes
structures
Prior art date
Application number
SE0850083A
Other languages
English (en)
Other versions
SE0850083L (sv
SE0850083A1 (sv
Inventor
Thorbjoern Ebefors
Edvard Kaelvesten
Tomas Bauer
Original Assignee
Silex Microsystems Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silex Microsystems Ab filed Critical Silex Microsystems Ab
Priority to SE0850083A priority Critical patent/SE534510C2/sv
Priority to US13/130,264 priority patent/US9362139B2/en
Priority to EP09827830.2A priority patent/EP2365934B1/en
Priority to PCT/SE2009/051311 priority patent/WO2010059118A1/en
Publication of SE0850083L publication Critical patent/SE0850083L/sv
Publication of SE0850083A1 publication Critical patent/SE0850083A1/sv
Publication of SE534510C2 publication Critical patent/SE534510C2/sv
Priority to US14/993,714 priority patent/US9620390B2/en

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Abstract

:MEMS/CMOS-anordning och övertäckande struktur till en halvledaranordning,innefattande ett substrat och en koppling i form av en genomföring av metall (via) som sträcker sig genom substratet. (Fig. 1)

Description

534 510 Metoden omfattar användning av en SOI-skiva (Silicon On Insulator) för att tillverka de övertåckande strukturerna, varvid vioma tillverkas i komponentlagret, medan man bibehåller bärarlagret. Detta angreppssätt kommer att säkerställa stabilitet och robusthet i processen och väsentligen reducera, om inte fullständigt eliininera risken att skada skivorna under tillverkning.
Kort beskrivning av ritningarna Fig. 1 visar i perspektivvy en anordning som omfattar uppfinningsidéerna; Fig. 2 illustrerar detaljer i det funktionella locket.
Detaljerad beskrivning av uppfinningen Föreliggande uppfinning baseras på uppfinningstanken att man använder en metod för att tillverka ett metallviasubstrat, dvs. ett substrat som har impedansanpassade genomgående elektriska anslutningar av metall för RF-tilläinpningar, och i samma processekvens i metoden valfritt tillverkas en uppsättning passiva komponenter, t.ex. motstånd, kondensatorer och/eller induktanser, vilka passiva komponenter sträcker sig genom substratet. Ett sådant metallviasubstrat är lämpligt att använda vid hermetisk övertâckning av CMOS- eller MEMS-anordningar, t.ex. CMOS- strukturer innefattande Switchar.
Uppfinningen kan användas för att tillverka ett enskilt sändar-/mottagarchip integ- rerat med switchar och RCL-filter som filtrerar ut korrekt frekvens och som kopplar om till antennen i mobiltelefonen eller till det mottagande chipet. Tillhandahållande av sådan RF-omkoppling möjliggör val av vilket band (frekvens) man önskar använ- da; 900 MI-Iz (GSM), 1800 eller 1900 MHz (SG i Europa resp. i USA), 2800 MHz för Bluetooth och de olika WLAN-standardema.
Fig. l är ett tvärsnitt i perspektivvy av ett funktionellt övertåckande substrat, dvs. innan det har bondats till en CMS- och/ eller MEM S-anordningsskiva. 15 20 25 30 534 510 3 Det innefattar allmänt ett övertäckande substrat 1, dvs. en täckande struktur för att kapsla in, lämpligt hermetiskt försegla, CMOS- eller MEMS-strukturer 2 (antyd- da nedanför det övertäckande substratet).
Täcksubstratet l, lämpligtvis tillverkat av högresistivt kisel, även om andra material år möjliga, innefattar flera funktionella komponenter. Det finns också anordnat re- lativt vida fördjupningar R för att tillhandahålla utrymmen, i vilka CMOS-/ MEMS- komponenterna ska kunna drivas i en kontrollerad atmosfär när den övertäckande strukturen bondats på en komponentskiva.
Den primära funktionella detaljen är tillhandahållande av s.k. viastrukturer, all- mänt betecknade 3. l den mest allmänna formen är metallvian en enkel via, dvs. bara en metall-”pluggf” som sträcker sig genom substratet.
För RF-tillämpningar är dessa vior lämpligen tillverkade såsom koaxiala elektriska kopplingar som sträcker sig genom substratet och därigenom uppnår impedans- matchning.
I ytterligare en utföringsform innefattar sådana koaxiala vior en ”metal1-plugg”, som sträcker sig genom en skiva med ett tunt isolerande skikt av t.ex. oxid anordnat mellan metallen och skivmaterialet. På ett radiellt avstånd finns anordnad en ring- formig metallstruktur som sålunda innesluter den centrala ”metallpluggerfï Denna ringforrniga metallstruktur är också företrädesvis isolerad mot skivmaterialet med tunna, isolerande skikt vid både den inre och den yttre Omkretsen. Den ringformiga metallstrukturen bildar en skärm, och tillsammans bildar dessa strukturer en ko- axial genomgående anslutning, som tillhandahåller impedansmatchade egenskaper för RF-signaler.
I vissa utfóringsformer av de koaxiala anslutningarna (visade i lig. 1) innefattar den centrala ”pluggen” själv ett centralt parti 4 av ett material som år kompatibelt med materialet i skivan från vilket substratet tillverkas, t.ex. oxid (TEOS) eller polykisel 10 15 20 25 30 534 510 4 (eller något annat material som har en likartad utvidgningskoefficient som skivma- terialet från vilket substratet tillverkas). Detta centrala parti omges av metallen 4' i en ringforrnig struktur, genom vilken elektriska signaler kan överföras. I detta fall är sålunda ”pluggen” en sammansatt struktur.
För mycket små dimensioner kan den centrala pluggen tillverkas helt och hållet av metall, dvs. det ñnns inget tomrum skapat under tillverkning som sedan fylls, utan metallen kommer att fylla vian fullständigt under tillverkning.
Metall metall- och substratmaterial i respektive strukturer finns ett tunt oxidskikt (ej visat) för att elektriskt isolera från kislet i substratet 1.
Vidare ñnns en struktur 5, 5' arrangerad koncentriskt runtom och på ett radiellt avstånd från den isolerade metallvian 4. Mellan via 4 och denna struktur 5, 5' ñnns ett ringformigt kiselparti 4” som omger metallvian 4”. Den koncentriska strukturen antyds med brutna linjer vid 5”.
De koncentriska strukturerna 5, 5' innefattar två koncentriska, ringformiga metall- strukturer 5', mellan vilka (dvs. vid 5) det ñnns anordnat samma material som i det centrala partiet 4, dvs. oxi (tex. TEOS) eller polykisel (eller något annat material som har en liknande utvidgningskoefficient som skivmaterialet av vilket substratet tillverkas) .
Den ringformiga metallstrukturen 5' kommer att fungera som en skärm för den centralt belägna vian 4. Korrekt utformad kommer impedansen i en sådan struktur att bli 50 Ohm vilket tillåter att RF-signaler överförs i metallvian med minimal re- flexion och dämpning.
Totalstrukturen kommer att bli en koaxial koppling mellan de två sidorna av det övertäckande substratet 1, och därvid bilda en ohmsk koppling mellan MEMS/CMOS-anordningarna genom det övertåckande substratet till extema an- ordningarna. 10 20 25 30 534 510 Ett annat funktionellt särdrag hos det övertäckande substratet kan vara anordnan- det av en kondensatorstruktur 6 inuti substratet. En sådan kondensatorstruktur tillhandahålles genom att man anordnar en metall i tunna segment 7 (sex visas i ñg. 1), som sträcker sig företrädesvis hela vägen genom substratet och också sträcker sig tvärs över substratets plan). Om flera sådana segment arrangeras intill varandra och parallellt såsom visas i fig. 1, med endast ett mycket litet mellanrum mellan dem, kommer materialsegmenten 8 i substratet mellan dessa isolerande element att ha funktionen av kondensatorplattor.
Ytterligare en funktionell del som visas i fig. 1 allmänt vid 9, är anordnandet av en ”spiral”- struktur, som bildar en spole för att tillhandahålla en induktans. lnduktansen innefattar en metallkärna 10 exempelvis tillverkad av Ni eller företrä- desvis en Ni/ CO-legering, vilken kärna företrädesvis sträcker sig genom substratets tjocklek och har en långsträckt form, som sträcker sig väsentligen i substratets plan. Vidare finns anordnad en lindning runtom kärnan bestående av en kombina- tion av en uppsättning viastrukturer 1 1, arrangerade i tvådimensionella matriser (arrayer) längs metallkäman och som sträcker sig genom substratet, och anordnade på bägge sidor om kärnan 10, och metallremsor 12, som sammankopplar via struk- turerna ll parvis tvärs över kärnan 10. Genom att låda den första vian på en sida av kärnan och på substratets övre yta (sett i figuren) ansluta till en motstående via anordnad på andra sidan av kärnan och därefter koppla denna motstående via på bottensidan av substratet (sett i figuren) med en intilliggande via till den först nämnda vian, osv., dvs. tillhandahålla en väsentligen sicksackkoppling mellan vior, tillhandahälles en spirallindad ledare runtom metallkäman och på detta sätt ska- pas en induktans.
I fig. 1 visas en dubbelrad av vior arrangerade i en sicksackkonfiguration. Detta möjliggör att metallremsoma placeras närmare varandra, eftersom remsorna kan göras smalare än diametern på själva viorna. Det är möjligt att anordna tredubbla eller fyrdubbla rader av vior. På detta sätt kan antalet varv på lindningen ökas vä- sentligt och egenskaperna hos induktansen kan skräddarsys i högre utsträckning. l0 15 20 25 30 534 510 De monolitiskt integrerade kondensator- och induktansdelarna kan användas för att ersätta diskret monterade komponenter. Med användning av högeffektiva kon- densatorer, induktorer och motstånd kan olika avkopplings- eller filtreringsfunktio- ner integreras.
Nu kommer en föredragen process för tillverkning av ett övertäckande substrat så- som beskrivits ovan och innefattande valfria funktionaliteter att beskrivas.
Processen utnyttjar en s.k. SOI-skiva som ett startsubstrat. En SOI-skiva har ett relativt tunt s.k. komponentlager, i vilket processning utförs, och ett mycket tunna- re bärarlager, för att underlätta hantering av skivan. Detta bärarlager avlägsnas sedan.
Ett första steg i en allmän process enligt uppfinningen är att mönstra SGI-skivans komponentlager såsom krävs för att tillverka komponenterna. Exempelvis etsas pa- rallella ”diken” (trencher) (lämpligen med DRIE; Deep Reactive Ion Etching) i syfte att tillverka kondensatorer och för att tillverka induktansernas kärnor, och hål et- sas för att tillhandahålla viastrukturer. Trencherna och hålen etsas ned till det iso- lerande stopplagret. På detta sätt erhålles väldefinierade trencher och hål.
Därefter oxideras hela skivan för att tillhandahålla ett tunt (ung. 0,5 um] isolerande lager på skivan och i alla hål och trencher. Ett såddlager av ledande material, så- som metall, t.ex. Cu eller Au, anordnas exempelvis med sputtring, förångning eller plätering, eller plasmaförstärkt avsatt polykisel för att underlätta efterföljande me- tallisering, t.ex. genom elektroplätering eller strömlös metallutfällning.
Lämpligen är nästa steg att tillverka kärnan till induktansen, om en sådan är önsk- värd.
För detta ändamål maskeras hela skivan och mönstras för att exponera endast trencherna för tillverkning av kärnan. Maskeringen kan göras genom att hela ski- van täcks med en film eller genom att en resist spinns på skivan. Masken öppnas upp över de trencher som ska bilda induktanskärnan. Lämpligtvis används elektro- 10 20 25 30 534 510 7 plätering för att fylla trencherna med den önskade metallen. Företrädesvis används en Ni/ Co-legering för detta ändamål.
Därefter maskeras skivan och mönstras såsom beskrivits ovan för att exponera återstående strukturer, dvs. trencher för kondensatorplattor och för viastrukturer. Ånyo används plätering för att växa Au, CU eller Al till en tjocklek om åtminstone några fä um med låg resistivitet. Detta kommer i de flesta fall att kvarlärnna ett tomrum inuti hålen/trencherna.
Företrädesvis men valfritt fylls dessa romrum med ett material som är kompatibelt med substratskivans material i termer av utvidgningskoefficient, så att termisk på- verkan inte förorsakar att substratet spricker.
Lämpliga material för att fylla är oxíd (t.ex. TEOS) eller polykisel. l en särskilt föredragen utföringsform av uppfinningen tillverkas routing-strukturer, dvs. strukturelement för att sammankoppla komponenter på substratet, i samma processekvens som beskrivits ovan. Sådana routing-strukturer är smala remsor av metall.
Det finns två alternativa procedurer för att tillverka dessa routingstrukturer.
I en utföringsform är det initiala steget att mönstra och etsa trencherna och hålen uppdelat i två sub-steg. Först mönstras skivan för att definiera routing- I strukturerna och skivan utsätts för en ets till en djup av endast några få um. Där- vid tillhandahålls grunda spår eller urtagningar i ytan. Sedan mönstras skivan på nytt för att tillhandahålla trencherna och hålen, såsom beskrivits ovan.
Skälet till att använda denna sekvens är att det skulle vara svårare att spinna resist på den mer komplicerade topografin som tillhandahålls av de djupa trencherna och hålen, även om det senare är möjligt. 10 20 25 30 534 510 När metallen avsätts på substratet kommer spåren att fyllas helt med metall och bilda ledande remsor. På detta sätt kommer routingstrukturerna att tillhandahållas så att de är försänkta, dvs. de kommer att vara anordnade i substratets yta snarare än på den.
I en alternativ utföringsform tillhandahålles routingstrukturen efter att de andra strukturerna har tillverkats. Härvid mönstras hela skivan efter att slutsteget att fylla tomrummen (om detta utförs) för att defmiera routingstrukturerna. Metall av- sätts på skivan i öppningarna i mönstret. I detta alternativ tillhandahålles rou- tingstrukturerna på substratets yta.
Dessa metoder för tillverkning av routingstrukturer är lämpliga också. för att till- handahålla de metallremsor som bildar en integrerad del av lindningen (på den sida av substratet som utgör komponentlagret) till induktansen såsom beskrivits ovan.
Metallremsorna till induktansen på motsatta sidan av substratet tillverkas efter att det övertäckande substratet har bondats på CMOS /MEMS-skivan och kommer att beskrivas nedan.
För att möjliggöra en termokompressionsbondning av det övertäckande substratet på en CMOS /MEM S-anordning kan det krävas att man ätstadkommer en metallise- ring 20, som löper längs Omkretsen runt den yta som definierar den slutliga anord- ningen, motsvarande en hoppassande metallisering på CMOS/ MEMS-anordningen.
En sådan metallisering är företrädesvis Au eller Cu.
Det är också möjligt med olika eutektíska bondningssätt, tex. Au / polykisel, AuSN / AU eller många andra eutektiska legeringar som år välkända för fackman- Ilefl .
Ytterligare ett föredraget särdrag enligt uppfinningen är att faktiskt inte stoppa ets- ning vid etsstoppskiktet i SOI-skivan när hålen och trencherna tillverkas i proces- sens initiala stadium utan att faktiskt fortsätta etsa ytterligare ned in i stopplagret.
Det är också möjligt att helt etsa genom stopplagret. l0 15 20 25 30 534 510 Fördelen med detta är att när bârarlagret slutligen avlägsnas kommer den metall som avsatts i viahålen att exponeras och kan bilda kontaktytor utan något behov av ytterligare processning, såsom mönstring och etsning, för att exponera metallen.
Den exponerade metallen kan sedan pläteras direkt eller processas på andra sätt för att tillhandahålla paddar 22 för elektrisk koppling av CMOS/ MEMS-komponen- terna till vian.
När alla önskade funktioner och komponenter har tillverkas i komponentlagret på SGI-skivan, mönstras hela skivan igen för att definiera de vidare fördjupningarna R som ska tillhandahålla de hennetiskt förseglade utrymmena med en kontrollerad atmosfär. Lämplig etsning till ett önskat djup kommer att resultera i på lärnpligt sätt hermetiskt förseglade utrymmen.
På detta stadium år det övertäckande substratet fortfarande försett med SOI- skivans handle-lager. Nu skall den bondas mot CMOS/ MEMS-substratet 2. För det- ta ändamål matchas de längs Omkretsen löpande metalliseringarna och pressas mot varandra, varvid en hermetiskt tät försegling bildas, antingen genom terrno- kompression eller genom eutektisk smältbondning.
Efter att den övertåckande strukturen och CMOS/ MEMS-anordningen bondats samman avlägsnas handle-lagret på konventionellt sätt, t.ex. genom slipning eller etsning eller någon annan metod som är välkänd för fackmannen.
Såsom redan antytts, om hål- och trenchetsningen utfördes genom SOI-skivans isolatorskikt, kommer den metall som avsatts i hålen och trencherna att exponeras och bilda lämpliga kontaktpunkter för att tillhandahålla anslutningsytor fór ytterli- gare anslutning. Vid detta stadium tillverkas också routing på baksidan på ett lik- nande sätt som redan beskrivits ovan.
Det bör noteras att korskoppling av metallremsor tillhöriga induktansen nu tillver- kas, lämpligtvis samtidigt som de andra routingstrukturerna. Genom att tillverka 534 510 10 lödkulor 28 av lödbart material (t.ex. Ni/ Au), blir ytmontering möjlig, exempelvis montering av flip-chip-typ.
Den induktansfunktionalitet som beskrivits ovan kan också tillhandahållas på andra sätt. Exempelvis skulle sådana strukturer också kunna innefatta ett tunt, isolerande segment, dvs. en fylld trench, som sträcker sig genom substratet men som löper i ett spiralformat mönster till bildande av en induktansspole.
I ytterligare en föredragen utföringsform kan det tillhandahållas isolerande inne- slutningar 26 som omger valda element i det övertäckande substratet. Sådana iso- lerande inneslutningar förhindrar överhörning mellan komponenter och regioner och minimerar därigenom signalstyrkeförluster. Metoder för att tillverka sådana inneslutningar beskrivs i sökandens egen internationella patentansökning, WO 2008/ 09 1220.

Claims (9)

534 510 PATENTKRAV
1. En metod för att tillverka en CMOS- och/ eller MEMS-anordning med en kapsel som är försedd med elektriska genomföringar (vior), innefattande: att tillhandahålla en SOI-skiva; att mönstra och etsa SGI-skivans komponentlager ned till det isolerande stopplagret för att åstadkomma en struktur som innefattar en uppsättning hål och / eller spår med väldeñnierat djup; att avsätta metall i hålen och/ eller spåren; att göra fördjupningar (R) i komponentlagret av vilka åtminstone vissa är avpassade att bilda kaviteter med en kontrollerad atmosfär i den färdiga anordningen; att tillhandahålla en skiva (2) på vilken det finns anordnat CMOS- och/ eller MEMS- strukturer; att bonda samman SOI-skivan och CMOS/ MEMS-skivan (2) så att åtminstone några av fördjupningarna kommer att inrymma de aktiva komponenterna (7, 8, 9, 10, 1 1, 12) på CMOS/ MEMS-skivan; att avlägsna bärarlagret från SGI-skivan; och att skapa metallstrukturer för att leda elektriska signaler på den isolerande ytan som exponerats efter avlägsnandet av bärarlagret.
2. Metod enligt krav 1, där metallstrukturerna på den isolerande ytan som exponerats efter avlägsnandet av bärarlagret åstadkommes genom att mönstra ytan för att definiera strukturerna, och därefter antingen i) påföra metall i öppningarna i mönstret, eller ii) etsa ner i den isolerande ytan för att åstadkomma fördjupningar och därefter fylla fördjupningarna med metall.
3. Metod enligt krav 2, där steget ii) innefattar etsning till ett djup om några få pm.
4. Metod enligt krav l, där kaviteterna med kontrollerad atmosfär förseglas hermetiskt genom att bondningen innefattar anordnande av 534 510 låt matchande metalliseringar som löper runt om hela anordningen på bägge skivorna och som tillsammans bildar en tät fog då de sammanfogas.
5. Metod enligt krav 1, ytterligare innefattande att skapa anslutningspaddar (22) på den isolerande ytan som år lämpliga för ytmontering.
6. Metod enligt krav l, där metallstrukturerna bildar ytor för placering av lodbumpar (28).
7. Metod enligt krav l, där avsättningen av metall i hålen och / eller spåren sker medelst elektroplätering eller strömlös metallutfållning.
8. Metod enligt krav l, innefattande före steget att fylla hålen med metall i) att oxidera skivan för att tillhandahålla ett tunt oxidskikt på skivan; ii) att avsätta ett såddskikt av ledande material pà skivan och i alla hål och /eller spår.
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WO2010059118A1 (en) 2010-05-27
US9362139B2 (en) 2016-06-07
SE0850083A1 (sv) 2010-05-20
US9620390B2 (en) 2017-04-11
EP2365934B1 (en) 2019-03-27
EP2365934A4 (en) 2018-01-03

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