SE524255C2 - Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma - Google Patents

Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma

Info

Publication number
SE524255C2
SE524255C2 SE0301134A SE0301134A SE524255C2 SE 524255 C2 SE524255 C2 SE 524255C2 SE 0301134 A SE0301134 A SE 0301134A SE 0301134 A SE0301134 A SE 0301134A SE 524255 C2 SE524255 C2 SE 524255C2
Authority
SE
Sweden
Prior art keywords
ceramic
substrates
forming
holes
connecting rods
Prior art date
Application number
SE0301134A
Other languages
English (en)
Swedish (sv)
Other versions
SE0301134D0 (sv
SE0301134L (sv
Inventor
Ik Seo Choi
Seok Jun Taek
Young Keun Lee
Original Assignee
Samsung Electro Mech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mech filed Critical Samsung Electro Mech
Publication of SE0301134D0 publication Critical patent/SE0301134D0/xx
Publication of SE0301134L publication Critical patent/SE0301134L/xx
Publication of SE524255C2 publication Critical patent/SE524255C2/sv

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09181Notches in edge pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/0919Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09454Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Structure Of Printed Boards (AREA)
SE0301134A 2002-11-19 2003-04-16 Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma SE524255C2 (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2002-0072026A KR100489820B1 (ko) 2002-11-19 2002-11-19 세라믹 다층기판 및 그 제조방법

Publications (3)

Publication Number Publication Date
SE0301134D0 SE0301134D0 (sv) 2003-04-16
SE0301134L SE0301134L (sv) 2004-05-20
SE524255C2 true SE524255C2 (sv) 2004-07-20

Family

ID=19720688

Family Applications (1)

Application Number Title Priority Date Filing Date
SE0301134A SE524255C2 (sv) 2002-11-19 2003-04-16 Keramiskt flerskiktssubstrat och förfarande för tillverkning av detsamma

Country Status (9)

Country Link
US (2) US6965161B2 (fi)
JP (1) JP2004172561A (fi)
KR (1) KR100489820B1 (fi)
CN (1) CN1324698C (fi)
DE (1) DE10317675B4 (fi)
FI (1) FI20030580A (fi)
FR (1) FR2847385B1 (fi)
GB (1) GB2395604B (fi)
SE (1) SE524255C2 (fi)

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US7777321B2 (en) * 2002-04-22 2010-08-17 Gann Keith D Stacked microelectronic layer and module with three-axis channel T-connects
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KR100771862B1 (ko) * 2005-08-12 2007-11-01 삼성전자주식회사 메모리 모듈을 위한 인쇄회로기판, 그 제조 방법 및 메모리모듈-소켓 어셈블리
US20080047653A1 (en) * 2006-08-28 2008-02-28 Kan Shih-Wei Method for manufacturing multi-layer ceramic substrate
KR100875234B1 (ko) 2007-08-08 2008-12-19 삼성전기주식회사 세라믹 기판 및 그 제조방법, 그리고 카메라 모듈
US20090126857A1 (en) * 2007-11-15 2009-05-21 Shin Hyun-Ok Manufacturing method of low temperature co-fired ceramics substrate
US7843303B2 (en) * 2008-12-08 2010-11-30 Alpha And Omega Semiconductor Incorporated Multilayer inductor
US8747591B1 (en) * 2009-09-22 2014-06-10 Sandia Corporation Full tape thickness feature conductors for EMI structures
EP2609634B1 (en) * 2010-08-24 2015-06-24 Colorchip (Israel) Ltd. Light source mount
JP5567445B2 (ja) * 2010-10-08 2014-08-06 スタンレー電気株式会社 セラミック多層配線基板の製造方法
KR20150004118A (ko) * 2013-07-02 2015-01-12 삼성디스플레이 주식회사 표시 장치용 기판, 상기 표시 장치용 기판의 제조 방법, 및 상기 표시 장치용 기판을 포함하는 표시 장치
US9691694B2 (en) 2015-02-18 2017-06-27 Qualcomm Incorporated Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate
US10264664B1 (en) 2015-06-04 2019-04-16 Vlt, Inc. Method of electrically interconnecting circuit assemblies
JP6195085B2 (ja) * 2015-08-24 2017-09-13 株式会社村田製作所 積層電子部品
CN105305041B (zh) * 2015-09-27 2019-11-12 华东交通大学 集成寄生单元与开槽dr结构的宽频带天线
JP6781258B2 (ja) * 2016-07-21 2020-11-04 日本碍子株式会社 センサ素子の製造方法
CN109119400B (zh) * 2018-09-25 2024-04-09 中国电子科技集团公司第四十三研究所 高载流能力多层陶瓷基板及其制作方法
CN113624394A (zh) * 2020-05-08 2021-11-09 精量电子(深圳)有限公司 压力传感器
CN113690097A (zh) * 2020-05-18 2021-11-23 大日科技股份有限公司 感应开关
CN112038297B (zh) * 2020-08-14 2022-10-25 中国电子科技集团公司第十三研究所 氧化铝瓷件及其制作方法、陶瓷外壳的制作方法

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Also Published As

Publication number Publication date
US20040094834A1 (en) 2004-05-20
DE10317675A1 (de) 2004-06-17
CN1503354A (zh) 2004-06-09
CN1324698C (zh) 2007-07-04
FI20030580A (fi) 2004-05-20
GB2395604B (en) 2005-11-16
US6965161B2 (en) 2005-11-15
GB0308563D0 (en) 2003-05-21
FR2847385B1 (fr) 2006-01-13
KR100489820B1 (ko) 2005-05-16
FI20030580A0 (fi) 2003-04-16
SE0301134D0 (sv) 2003-04-16
JP2004172561A (ja) 2004-06-17
GB2395604A (en) 2004-05-26
KR20040043736A (ko) 2004-05-27
US20050098874A1 (en) 2005-05-12
SE0301134L (sv) 2004-05-20
FR2847385A1 (fr) 2004-05-21
DE10317675B4 (de) 2006-08-24

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