SE413826B - Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet - Google Patents

Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet

Info

Publication number
SE413826B
SE413826B SE7809934A SE7809934A SE413826B SE 413826 B SE413826 B SE 413826B SE 7809934 A SE7809934 A SE 7809934A SE 7809934 A SE7809934 A SE 7809934A SE 413826 B SE413826 B SE 413826B
Authority
SE
Sweden
Prior art keywords
signal
reference signal
delayed
controlled
circuit
Prior art date
Application number
SE7809934A
Other languages
English (en)
Swedish (sv)
Other versions
SE7809934L (sv
Inventor
K A I Andersson
S G Roos
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE7809934A priority Critical patent/SE413826B/sv
Priority to IN610/DEL/79A priority patent/IN153004B/en
Priority to FI792703A priority patent/FI70660C/sv
Priority to DD79215609A priority patent/DD146230A5/de
Priority to YU02283/79A priority patent/YU228379A/xx
Priority to CS796317A priority patent/CS216684B2/cs
Priority to EG559/79A priority patent/EG14080A/xx
Priority to IE1778/79A priority patent/IE48553B1/en
Priority to AR278117A priority patent/AR229083A1/es
Priority to CA000335989A priority patent/CA1142238A/en
Priority to NO793023A priority patent/NO150260C/no
Priority to PL1979218426A priority patent/PL128123B1/pl
Priority to HU79EI878A priority patent/HU178531B/hu
Priority to MX179346A priority patent/MX149453A/es
Priority to ES484315A priority patent/ES484315A1/es
Priority to AU50993/79A priority patent/AU525914B2/en
Priority to BR7908990A priority patent/BR7908990A/pt
Priority to DE7979850087T priority patent/DE2963616D1/de
Priority to PCT/SE1979/000194 priority patent/WO1980000901A1/en
Priority to US06/196,556 priority patent/US4380083A/en
Priority to JP50162179A priority patent/JPS55500724A/ja
Priority to EP79850087A priority patent/EP0010077B1/en
Publication of SE7809934L publication Critical patent/SE7809934L/
Priority to DK220080A priority patent/DK149292C/da
Publication of SE413826B publication Critical patent/SE413826B/sv

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Control Of Velocity Or Acceleration (AREA)
  • Synchronizing For Television (AREA)
  • Manipulation Of Pulses (AREA)
SE7809934A 1978-09-21 1978-09-21 Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet SE413826B (sv)

Priority Applications (23)

Application Number Priority Date Filing Date Title
SE7809934A SE413826B (sv) 1978-09-21 1978-09-21 Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet
IN610/DEL/79A IN153004B (xx) 1978-09-21 1979-08-29
FI792703A FI70660C (fi) 1978-09-21 1979-08-30 Saett och anordning foer att i ett telekommunikationssystem relera faslaeget hos en styrd signal i foerhaollande till e n eferenssignal
DD79215609A DD146230A5 (de) 1978-09-21 1979-09-18 Verfahren und anordnung zur phaseneinstellung von signalen im fernmeldenetz
YU02283/79A YU228379A (en) 1978-09-21 1979-09-19 Assembly in a telecommunication group defining the phase of the controlled signal in relation to the referent signal
CS796317A CS216684B2 (en) 1978-09-21 1979-09-19 Method of regulation of the phase position of controlled signal in respect of reference signal of the telecommunication system and device for executing the same
EG559/79A EG14080A (en) 1978-09-21 1979-09-19 A method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal
IE1778/79A IE48553B1 (en) 1978-09-21 1979-09-19 A method and an arrangement for regulating the phase position of a controlled signal in relation to a reference signal in a telecommunication system
AR278117A AR229083A1 (es) 1978-09-21 1979-09-19 Disposicion generadora de senales para regular la posicion de fase de una senal controlada con relacion a una senal de referencia en telecomunicacion
PL1979218426A PL128123B1 (en) 1978-09-21 1979-09-20 Method of control of position of phase of controlled signal with respect to reference signal and system therefor
NO793023A NO150260C (no) 1978-09-21 1979-09-20 Fremgangsmaate og anordning for i et telekommunikasjonssystem aa regulere fasestillingen hos et styrt signal i forhold til et referansesignal
CA000335989A CA1142238A (en) 1978-09-21 1979-09-20 Regulation of the phase of a controlled signal in relation to a reference signal
HU79EI878A HU178531B (en) 1978-09-21 1979-09-20 Method and apparatus for controlling phase situation of controlled signal in relation to reference signal in telecommunication system
MX179346A MX149453A (es) 1978-09-21 1979-09-20 Mejoras en sistema de telecomunicacion para regular la posicion de fase de una senal
ES484315A ES484315A1 (es) 1978-09-21 1979-09-20 Una disposicion en un sistema de telecomunicacion para regu-lar la posicion de fase de una senal controlada en relacion con una senal de referencia
AU50993/79A AU525914B2 (en) 1978-09-21 1979-09-20 Controlling phase of a signal
BR7908990A BR7908990A (pt) 1978-09-21 1979-09-21 Processo e arranjo,num sistema de telecomunicacoes,para regular a posicao de fase de um sinal controlado em relacao a um sinal de referencia
DE7979850087T DE2963616D1 (en) 1978-09-21 1979-09-21 A method of and an arrangement for regulating the phase position of a controlled signal in relation to a reference signal in a telecommunication system
PCT/SE1979/000194 WO1980000901A1 (en) 1978-09-21 1979-09-21 A method of and an arrangement for regulating the phase position of a controlled signal in relation to a reference signal in a telecommunication system
US06/196,556 US4380083A (en) 1978-09-21 1979-09-21 Method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal
JP50162179A JPS55500724A (xx) 1978-09-21 1979-09-21
EP79850087A EP0010077B1 (en) 1978-09-21 1979-09-21 A method of and an arrangement for regulating the phase position of a controlled signal in relation to a reference signal in a telecommunication system
DK220080A DK149292C (da) 1978-09-21 1980-05-20 Fremgangsmaade og indretning til regulering af fasen paa et styret signal i forhold til et referencesignal i et telekommunikationsanlaeg

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE7809934A SE413826B (sv) 1978-09-21 1978-09-21 Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet

Publications (2)

Publication Number Publication Date
SE7809934L SE7809934L (sv) 1980-03-22
SE413826B true SE413826B (sv) 1980-06-23

Family

ID=20335888

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7809934A SE413826B (sv) 1978-09-21 1978-09-21 Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet

Country Status (22)

Country Link
US (1) US4380083A (xx)
EP (1) EP0010077B1 (xx)
JP (1) JPS55500724A (xx)
AR (1) AR229083A1 (xx)
AU (1) AU525914B2 (xx)
CA (1) CA1142238A (xx)
CS (1) CS216684B2 (xx)
DD (1) DD146230A5 (xx)
DE (1) DE2963616D1 (xx)
DK (1) DK149292C (xx)
EG (1) EG14080A (xx)
ES (1) ES484315A1 (xx)
FI (1) FI70660C (xx)
HU (1) HU178531B (xx)
IE (1) IE48553B1 (xx)
IN (1) IN153004B (xx)
MX (1) MX149453A (xx)
NO (1) NO150260C (xx)
PL (1) PL128123B1 (xx)
SE (1) SE413826B (xx)
WO (1) WO1980000901A1 (xx)
YU (1) YU228379A (xx)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4400667A (en) * 1981-01-12 1983-08-23 Sangamo Weston, Inc. Phase tolerant bit synchronizer for digital signals
CA1180416A (en) * 1981-05-19 1985-01-02 Botaro Hirosaki Timing recovery circuit
US4518998A (en) * 1982-06-03 1985-05-21 Klimsch/Optronics, Inc. Method and apparatus for producing a time advanced output pulse train from an input pulse train
US4473760A (en) * 1982-12-13 1984-09-25 Western Digital Corporation Fast digital sample resolution circuit
US4648060A (en) * 1984-07-30 1987-03-03 Hewlett-Packard Company Dual channel frequency synthesizer system
DE3441501A1 (de) * 1984-11-14 1986-05-15 Standard Elektrik Lorenz Ag, 7000 Stuttgart Schaltungsanordnung zum regenerieren und synchronisieren eines digitalen signals
FR2608863B1 (fr) * 1986-12-19 1994-04-29 Nec Corp Circuit integre logique comportant des bascules electroniques d'entree et de sortie pour stabiliser les durees des impulsions
JPS63228206A (ja) * 1987-03-17 1988-09-22 Nec Corp クロツク分配方式
IL89120A (en) * 1988-02-17 1992-08-18 Mips Computer Systems Inc Circuit synchronization system
US5101117A (en) * 1988-02-17 1992-03-31 Mips Computer Systems Variable delay line phase-locked loop circuit synchronization system
WO1989009520A1 (en) * 1988-03-26 1989-10-05 Alcatel N.V. Synchronizing circuit
DE3917217A1 (de) * 1989-05-26 1990-11-29 Ant Nachrichtentech Regenerator fuer digitalsignale
US4975929A (en) * 1989-09-11 1990-12-04 Raynet Corp. Clock recovery apparatus
US4959846A (en) * 1989-09-11 1990-09-25 Raynet Corporation Clock recovery apparatus including a clock frequency adjuster
US5036230A (en) * 1990-03-01 1991-07-30 Intel Corporation CMOS clock-phase synthesizer
US5083049A (en) * 1991-05-10 1992-01-21 Ast Research, Inc. Asynchronous circuit with edge-triggered inputs
US5229752A (en) * 1991-09-20 1993-07-20 The United States Of America As Represented By The United States Department Of Energy Method and apparatus for detecting timing errors in a system oscillator
DE4139117C1 (xx) * 1991-11-28 1993-06-09 Texas Instruments Deutschland Gmbh, 8050 Freising, De
TW234796B (xx) * 1993-02-24 1994-11-21 Advanced Micro Devices Inc
WO1995034127A1 (en) * 1994-06-03 1995-12-14 Sierra Semiconductor Corporation A three-state phase-detector/charge pump circuit with no dead-band region
SE503069C2 (sv) * 1994-07-06 1996-03-18 Ericsson Telefon Ab L M Förfarande och anordning för att fasvrida en signal
GB9505350D0 (en) * 1995-03-16 1995-05-03 British Tech Group Electronic identification system
US5712580A (en) * 1996-02-14 1998-01-27 International Business Machines Corporation Linear phase detector for half-speed quadrature clocking architecture
US5818890A (en) * 1996-09-24 1998-10-06 Motorola, Inc. Method for synchronizing signals and structures therefor
KR100244466B1 (ko) * 1997-04-26 2000-02-01 김영환 클럭 위상 비교기
KR100215889B1 (ko) * 1997-05-06 1999-08-16 구본준 클럭 동기 회로
EP1057894B1 (en) * 1999-06-04 2010-04-28 Sumitomo Chemical Company, Limited Esterase genes and uses of the same
DE10020171A1 (de) 2000-04-25 2001-10-31 Ericsson Telefon Ab L M Pulsdetektor
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
DE10119624A1 (de) 2001-04-20 2002-11-21 Aloys Wobben Verfahren zum Betreiben einer Windenergieanlage
DK1384002T4 (da) * 2001-04-20 2021-10-11 Wobben Properties Gmbh Fremgangsmåde til drift af et vindenergianlæg
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7295049B1 (en) * 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
JP4751932B2 (ja) * 2006-07-28 2011-08-17 富士通株式会社 位相検出装置および位相同期装置
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8516025B2 (en) * 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US8970276B1 (en) * 2013-12-17 2015-03-03 Analog Devices, Inc. Clock signal synchronization

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL272023A (xx) * 1960-12-05
US3521172A (en) * 1965-11-26 1970-07-21 Martin Marietta Corp Binary phase comparator
US3495184A (en) * 1968-03-11 1970-02-10 Radiation Inc Phase-locked loop having improved acquisition range
US3701039A (en) * 1968-10-28 1972-10-24 Ibm Random binary data signal frequency and phase compensation circuit
US3660647A (en) * 1969-12-24 1972-05-02 Us Navy Automatic signal delay tracking system
US3614635A (en) * 1969-12-31 1971-10-19 Ibm Variable frequency control system and data standardizer
US3714463A (en) * 1971-01-04 1973-01-30 Motorola Inc Digital frequency and/or phase detector charge pump
BE786226A (fr) * 1971-07-16 1973-01-15 Siemens Ag Alimentation en courant rythme pour un systeme de circuits de commutation a deux canaux
US3839599A (en) * 1972-11-10 1974-10-01 Gte Automatic Electric Lab Inc Line variation compensation system for synchronized pcm digital switching
JPS5721064B2 (xx) * 1974-06-07 1982-05-04
US4001713A (en) * 1976-01-15 1977-01-04 Gte Sylvania Incorporated Phase lock loop circuit
JPS52124848A (en) * 1976-04-12 1977-10-20 Fujitsu Ltd Digital phase detection circuit
DE2735053C3 (de) * 1977-08-03 1980-05-22 Siemens Ag, 1000 Berlin Und 8000 Muenchen Digitaler Phasenregelkreis

Also Published As

Publication number Publication date
ES484315A1 (es) 1980-05-16
CS216684B2 (en) 1982-11-26
EP0010077A1 (en) 1980-04-16
DD146230A5 (de) 1981-01-28
YU228379A (en) 1982-10-31
EG14080A (en) 1983-03-31
AR229083A1 (es) 1983-06-15
DE2963616D1 (en) 1982-10-28
CA1142238A (en) 1983-03-01
WO1980000901A1 (en) 1980-05-01
DK149292C (da) 1987-01-19
MX149453A (es) 1983-11-08
SE7809934L (sv) 1980-03-22
FI792703A (fi) 1980-03-22
AU525914B2 (en) 1982-12-09
NO150260C (no) 1984-09-12
IN153004B (xx) 1984-05-19
DK220080A (da) 1980-05-20
PL218426A1 (xx) 1980-08-11
PL128123B1 (en) 1983-12-31
JPS55500724A (xx) 1980-10-02
IE791778L (en) 1980-03-21
AU5099379A (en) 1980-03-27
US4380083A (en) 1983-04-12
HU178531B (en) 1982-05-28
EP0010077B1 (en) 1982-09-01
DK149292B (da) 1986-04-21
NO150260B (no) 1984-06-04
NO793023L (no) 1980-03-24
FI70660B (fi) 1986-06-06
IE48553B1 (en) 1985-03-06
FI70660C (fi) 1986-09-24

Similar Documents

Publication Publication Date Title
SE413826B (sv) Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet
US4494021A (en) Self-calibrated clock and timing signal generator for MOS/VLSI circuitry
KR100807115B1 (ko) 반도체 메모리 장치 및 그의 구동방법
US6411142B1 (en) Common bias and differential structure based DLL with fast lockup circuit and current range calibration for process variation
US20070058768A1 (en) Low jitter clock recovery circuit
GB2209445A (en) Phase comparator for extending capture range
EP0397198A2 (en) Transfer strobe time delay selector and method
GB2386989A (en) Apparatus and method for adapting clock frequency in response to voltage droop
JPH10187274A (ja) タイミングスキュー減少回路及びタイミングスキュー減少方法
US7633313B2 (en) Differential line compensation apparatus, method and system
US20130154695A1 (en) Phase lock loop with adaptive loop bandwidth
US6646512B2 (en) Self-bias and differential structure based PLL with fast lockup circuit and current range calibration for process variation
EP0619052B1 (en) Shifting phase of a clock signal, in particular for clock recovery of a digital data signal
US6999547B2 (en) Delay-lock-loop with improved accuracy and range
US4048581A (en) Oscillator frequency control loop
SE500929C2 (sv) Signalbehandlingskrets och förfarande för fördröjning av en binär periodisk insignal
WO2018090650A1 (zh) 时钟补偿电路、时钟电路和微控制器
US10983587B2 (en) Dynamic voltage scaling in hierarchical multi-tier regulator supply
US20240056087A1 (en) Reduce dco frequency overlap-induced limit cycle in hybrid and digital plls
WO2020152390A1 (en) System with microelectronic circuit, and a method for controlling the operation of a microelectronic circuit
SU915061A1 (ru) Система автоматического регулирования с упреждающей коррекциейi
SU464889A1 (ru) Компаратор с автоматической коррекцией порога срабатывани
SU691853A1 (ru) Цифровой умножитель частоты
JPS62144A (ja) 位相比較回路
JPH06152342A (ja) 集積回路

Legal Events

Date Code Title Description
NAL Patent in force

Ref document number: 7809934-8

Format of ref document f/p: F

NUG Patent has lapsed

Ref document number: 7809934-8

Format of ref document f/p: F