EG14080A - A method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal - Google Patents

A method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal

Info

Publication number
EG14080A
EG14080A EG559/79A EG55979A EG14080A EG 14080 A EG14080 A EG 14080A EG 559/79 A EG559/79 A EG 559/79A EG 55979 A EG55979 A EG 55979A EG 14080 A EG14080 A EG 14080A
Authority
EG
Egypt
Prior art keywords
regulating
relation
arrangement
telecommunication system
phase position
Prior art date
Application number
EG559/79A
Other languages
English (en)
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Application granted granted Critical
Publication of EG14080A publication Critical patent/EG14080A/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
  • Control Of Velocity Or Acceleration (AREA)
  • Synchronizing For Television (AREA)
EG559/79A 1978-09-21 1979-09-19 A method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal EG14080A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE7809934A SE413826B (sv) 1978-09-21 1978-09-21 Sett att i ett telekommunikationssystem reglera fasleget hos en styrd signal i forhallande till en referenssignal samt anordning for genomforande av settet

Publications (1)

Publication Number Publication Date
EG14080A true EG14080A (en) 1983-03-31

Family

ID=20335888

Family Applications (1)

Application Number Title Priority Date Filing Date
EG559/79A EG14080A (en) 1978-09-21 1979-09-19 A method of and an arrangement in a telecommunication system for regulating the phase position of a controlled signal in relation to a reference signal

Country Status (22)

Country Link
US (1) US4380083A (xx)
EP (1) EP0010077B1 (xx)
JP (1) JPS55500724A (xx)
AR (1) AR229083A1 (xx)
AU (1) AU525914B2 (xx)
CA (1) CA1142238A (xx)
CS (1) CS216684B2 (xx)
DD (1) DD146230A5 (xx)
DE (1) DE2963616D1 (xx)
DK (1) DK149292C (xx)
EG (1) EG14080A (xx)
ES (1) ES484315A1 (xx)
FI (1) FI70660C (xx)
HU (1) HU178531B (xx)
IE (1) IE48553B1 (xx)
IN (1) IN153004B (xx)
MX (1) MX149453A (xx)
NO (1) NO150260C (xx)
PL (1) PL128123B1 (xx)
SE (1) SE413826B (xx)
WO (1) WO1980000901A1 (xx)
YU (1) YU228379A (xx)

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KR100244466B1 (ko) * 1997-04-26 2000-02-01 김영환 클럭 위상 비교기
KR100215889B1 (ko) * 1997-05-06 1999-08-16 구본준 클럭 동기 회로
EP1057894B1 (en) * 1999-06-04 2010-04-28 Sumitomo Chemical Company, Limited Esterase genes and uses of the same
DE10020171A1 (de) 2000-04-25 2001-10-31 Ericsson Telefon Ab L M Pulsdetektor
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US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
CN100353055C (zh) * 2001-04-20 2007-12-05 阿洛伊斯·沃本 风力涡轮机及其工作方法
DE10119624A1 (de) 2001-04-20 2002-11-21 Aloys Wobben Verfahren zum Betreiben einer Windenergieanlage
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
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US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
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US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
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US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US8516025B2 (en) * 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
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DE2735053C3 (de) * 1977-08-03 1980-05-22 Siemens Ag, 1000 Berlin Und 8000 Muenchen Digitaler Phasenregelkreis

Also Published As

Publication number Publication date
PL218426A1 (xx) 1980-08-11
AR229083A1 (es) 1983-06-15
JPS55500724A (xx) 1980-10-02
AU5099379A (en) 1980-03-27
AU525914B2 (en) 1982-12-09
PL128123B1 (en) 1983-12-31
MX149453A (es) 1983-11-08
FI792703A (fi) 1980-03-22
ES484315A1 (es) 1980-05-16
IE48553B1 (en) 1985-03-06
IN153004B (xx) 1984-05-19
SE7809934L (sv) 1980-03-22
DD146230A5 (de) 1981-01-28
CA1142238A (en) 1983-03-01
NO150260B (no) 1984-06-04
DK149292B (da) 1986-04-21
HU178531B (en) 1982-05-28
FI70660C (fi) 1986-09-24
EP0010077A1 (en) 1980-04-16
DE2963616D1 (en) 1982-10-28
US4380083A (en) 1983-04-12
SE413826B (sv) 1980-06-23
NO793023L (no) 1980-03-24
YU228379A (en) 1982-10-31
WO1980000901A1 (en) 1980-05-01
CS216684B2 (en) 1982-11-26
DK149292C (da) 1987-01-19
IE791778L (en) 1980-03-21
EP0010077B1 (en) 1982-09-01
DK220080A (da) 1980-05-20
FI70660B (fi) 1986-06-06
NO150260C (no) 1984-09-12

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