RU2006114833A - Способ изготовления полевого транзистора моп-структуры с барьером шотки с использованием процесса изотропного травления - Google Patents

Способ изготовления полевого транзистора моп-структуры с барьером шотки с использованием процесса изотропного травления Download PDF

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Publication number
RU2006114833A
RU2006114833A RU2006114833/28A RU2006114833A RU2006114833A RU 2006114833 A RU2006114833 A RU 2006114833A RU 2006114833/28 A RU2006114833/28 A RU 2006114833/28A RU 2006114833 A RU2006114833 A RU 2006114833A RU 2006114833 A RU2006114833 A RU 2006114833A
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RU
Russia
Prior art keywords
semiconductor substrate
etching rate
horizontal
vertical
barrier
Prior art date
Application number
RU2006114833/28A
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English (en)
Russian (ru)
Inventor
Джон П. СНАЙДЕР (US)
Джон П. СНАЙДЕР
Джон М. ЛАРСОН (US)
Джон М. ЛАРСОН
Original Assignee
Спиннэйкер Семикондактор, Инк. (Us)
Спиннэйкер Семикондактор, Инк.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Спиннэйкер Семикондактор, Инк. (Us), Спиннэйкер Семикондактор, Инк. filed Critical Спиннэйкер Семикондактор, Инк. (Us)
Publication of RU2006114833A publication Critical patent/RU2006114833A/ru

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0277Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/256Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/64Electrodes comprising a Schottky barrier to a semiconductor
    • H10D64/647Schottky drain or source electrodes for IGFETs

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
RU2006114833/28A 2003-10-03 2004-10-04 Способ изготовления полевого транзистора моп-структуры с барьером шотки с использованием процесса изотропного травления RU2006114833A (ru)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50914203P 2003-10-03 2003-10-03
US60/509,142 2003-10-03

Publications (1)

Publication Number Publication Date
RU2006114833A true RU2006114833A (ru) 2007-11-10

Family

ID=34434946

Family Applications (1)

Application Number Title Priority Date Filing Date
RU2006114833/28A RU2006114833A (ru) 2003-10-03 2004-10-04 Способ изготовления полевого транзистора моп-структуры с барьером шотки с использованием процесса изотропного травления

Country Status (6)

Country Link
US (1) US7291524B2 (https=)
EP (1) EP1676305A1 (https=)
JP (1) JP2007507905A (https=)
CN (1) CN1868045A (https=)
RU (1) RU2006114833A (https=)
WO (1) WO2005036631A1 (https=)

Cited By (1)

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RU2688861C1 (ru) * 2018-03-12 2019-05-22 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводникового прибора

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US6303479B1 (en) * 1999-12-16 2001-10-16 Spinnaker Semiconductor, Inc. Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts
US7393733B2 (en) 2004-12-01 2008-07-01 Amberwave Systems Corporation Methods of forming hybrid fin field-effect transistor structures
KR100560432B1 (ko) * 2004-12-21 2006-03-13 한국전자통신연구원 N형 쇼트키 장벽 관통 트랜지스터 소자 및 제조 방법
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
CN101199043B (zh) * 2005-06-24 2010-05-19 三菱瓦斯化学株式会社 腐蚀剂组合物及使用该组合物的半导体装置的制备方法
WO2007101120A1 (en) * 2006-02-23 2007-09-07 Acorn Technologies, Inc. Method for making semiconductor insulated-gate field-effect transistor having multilayer deposited metal source (s) and/or drain (s)
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
US8173551B2 (en) 2006-09-07 2012-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Defect reduction using aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US7799592B2 (en) 2006-09-27 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-gate field-effect transistors formed by aspect ratio trapping
US20080187018A1 (en) 2006-10-19 2008-08-07 Amberwave Systems Corporation Distributed feedback lasers formed via aspect ratio trapping
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US9508890B2 (en) 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US7553717B2 (en) * 2007-05-11 2009-06-30 Texas Instruments Incorporated Recess etch for epitaxial SiGe
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
WO2009035746A2 (en) 2007-09-07 2009-03-19 Amberwave Systems Corporation Multi-junction solar cells
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
WO2010033813A2 (en) 2008-09-19 2010-03-25 Amberwave System Corporation Formation of devices by epitaxial layer overgrowth
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
SG171987A1 (en) 2009-04-02 2011-07-28 Taiwan Semiconductor Mfg Devices formed from a non-polar plane of a crystalline material and method of making the same
US8513765B2 (en) 2010-07-19 2013-08-20 International Business Machines Corporation Formation method and structure for a well-controlled metallic source/drain semiconductor device
US9691898B2 (en) * 2013-12-19 2017-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Germanium profile for channel strain
CN103745929A (zh) * 2013-12-24 2014-04-23 上海新傲科技股份有限公司 肖特基势垒mosfet的制备方法
JP6697909B2 (ja) * 2016-03-15 2020-05-27 エイブリック株式会社 半導体装置とその製造方法
US10249542B2 (en) * 2017-01-12 2019-04-02 International Business Machines Corporation Self-aligned doping in source/drain regions for low contact resistance

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JPS61237470A (ja) * 1985-04-15 1986-10-22 Hitachi Ltd 半導体装置
US5834793A (en) * 1985-12-27 1998-11-10 Kabushiki Kaisha Toshiba Semiconductor devices
JP3761918B2 (ja) * 1994-09-13 2006-03-29 株式会社東芝 半導体装置の製造方法
US6303479B1 (en) * 1999-12-16 2001-10-16 Spinnaker Semiconductor, Inc. Method of manufacturing a short-channel FET with Schottky-barrier source and drain contacts
US6949787B2 (en) 2001-08-10 2005-09-27 Spinnaker Semiconductor, Inc. Transistor having high dielectric constant gate insulating layer and source and drain forming Schottky contact with substrate
JP3833903B2 (ja) * 2000-07-11 2006-10-18 株式会社東芝 半導体装置の製造方法
CN100401528C (zh) 2002-01-23 2008-07-09 斯平内克半导体股份有限公司 具有与应变半导体基片形成肖特基或肖特基类接触的源极和/或漏极的场效应晶体管
US6974737B2 (en) 2002-05-16 2005-12-13 Spinnaker Semiconductor, Inc. Schottky barrier CMOS fabrication method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2688861C1 (ru) * 2018-03-12 2019-05-22 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводникового прибора

Also Published As

Publication number Publication date
EP1676305A1 (en) 2006-07-05
US20050118793A1 (en) 2005-06-02
WO2005036631A1 (en) 2005-04-21
CN1868045A (zh) 2006-11-22
JP2007507905A (ja) 2007-03-29
US7291524B2 (en) 2007-11-06

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Effective date: 20090111