NO20024196D0 - Fremgangsmåte for å lage en integrert kretspakke på en silikonskive - Google Patents

Fremgangsmåte for å lage en integrert kretspakke på en silikonskive

Info

Publication number
NO20024196D0
NO20024196D0 NO20024196A NO20024196A NO20024196D0 NO 20024196 D0 NO20024196 D0 NO 20024196D0 NO 20024196 A NO20024196 A NO 20024196A NO 20024196 A NO20024196 A NO 20024196A NO 20024196 D0 NO20024196 D0 NO 20024196D0
Authority
NO
Norway
Prior art keywords
wafer
integrated circuit
circuit package
circuitry
solder bumps
Prior art date
Application number
NO20024196A
Other languages
English (en)
Other versions
NO20024196L (no
Inventor
Ken M Lam
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of NO20024196D0 publication Critical patent/NO20024196D0/no
Publication of NO20024196L publication Critical patent/NO20024196L/no

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    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
NO20024196A 2000-04-25 2002-09-03 Fremgangsmåte for å lage en integrert kretspakke på en silikonskive NO20024196L (no)

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US09/558,396 US6281046B1 (en) 2000-04-25 2000-04-25 Method of forming an integrated circuit package at a wafer level
PCT/US2001/011035 WO2001082361A2 (en) 2000-04-25 2001-04-04 Method of forming an integrated circuit package at a wafer level

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AU2001249879A1 (en) 2001-11-07
CN1426599A (zh) 2003-06-25
CA2402082A1 (en) 2001-11-01
EP1279193A2 (en) 2003-01-29
NO20024196L (no) 2002-09-03
JP2003532294A (ja) 2003-10-28
US6281046B1 (en) 2001-08-28
KR20040004761A (ko) 2004-01-14
MY134243A (en) 2007-11-30
TW503486B (en) 2002-09-21
WO2001082361A3 (en) 2002-05-16
WO2001082361A2 (en) 2001-11-01
HK1053746A1 (en) 2003-10-31

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