CN1181524C - 在圆片面上形成集成电路封装的方法 - Google Patents

在圆片面上形成集成电路封装的方法 Download PDF

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CN1181524C
CN1181524C CNB018084257A CN01808425A CN1181524C CN 1181524 C CN1181524 C CN 1181524C CN B018084257 A CNB018084257 A CN B018084257A CN 01808425 A CN01808425 A CN 01808425A CN 1181524 C CN1181524 C CN 1181524C
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pad
wafer
disk
inserter
substrate
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CN1426599A (zh
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K��M����ķ
K·M·拉姆
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Atmel Corp
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Atmel Corp
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Abstract

一种在圆片面上形成一集成电路封装的方法。该集成电路封装在一最终使用的印刷电路板上占最少量的空间。焊料凸块(30)或导电粘合剂设置在一硅圆片(21)上表面的金属化引线连接焊盘(23)上。一未充满焊剂材料(27)沉积在圆片(21)和焊料凸块(30)上。一预制的插入器衬底(31)由一金属电路(34)和一介质基座(32)组成，并具有多个与所述焊料凸块(30)对齐的金属化通孔(38)。将圆片/插入器组件反流或固化以在插入器件层上的电路(34)和圆片上的电路之间形成电连接。焊球(50)然后被置于插入器衬底上的金属焊盘开孔上并将之反流以形成一圆片面BGA衬底。所述圆片面BGA衬底然后被切割为单个BGA芯片封装。

Description

在圆片面上形成集成电路封装的方法
技术领域
本发明涉及集成电路封装，更具体地说涉及一种在一圆片面或圆片级上形成一球栅阵列集成封装的方法。
背景技术
在一电路板上的一集成电路封装的占用面积是封装所占用该电路板的面积。一般期望使占用面积减至最小并使封装紧靠在一起。最近几年，球栅阵列(BGA)封装已作为较通用封装类型之一出现，因为它具有高密度、最小占用面积以及较短的电的路径，也就是说它的性能比先前类型的半导体封装要好。
在图10中示出了一种具代表性的BGA封装。在该BGA封装110中，一集成电路芯片122通过一接合层安装在一由衬底材料制成的基座112的一上表面上。金属连接线或引线接合导线120使在芯片122上表面形成的多个金属芯片焊盘126与在基座112上表面形成的引线接合焊盘128电连接。基座112包括金属化通孔118以及将电路由基座112上表面连接到下表面的金属布线114。多个焊球116置于基座112的底面并与基座的金属布线114电连接。焊球116可布置成在整个底面上完全均匀的矩阵阵列，布置成一完全交错阵列，或围绕底表面的周边成为多列式。焊球然后被用于将芯片封装以机械或电子方式固定到一最终使用的印刷电路板上。
虽然现有技术的BGA封装比起早先类型的封装来在高密度和高I/O性能方面有了很大改进，但人们一直期望能使IC封装成为更小的，以进一步减小在印刷电路板上适合封装所需的空间尺寸。因为引线连接导线是预定长度的，这就需要使相邻连接部位之间间隔最小以为接合工具提供足够的空间，因此衬底基座只得比芯片大，也就不可能建造一更紧密的封装。理想地说，希望制作一种封装，其中衬底基座不需要比芯片的尺寸大。
在以上所述的现有技术中，一种通常的做法是给每一单个芯片制作一封装。有些人已经认识到能在芯片面上形成IC封装将成为有利的，也就是说，所述封装是在单个芯片形成在圆片面上后，但在圆片被切割成单个芯片之前形成的。这为大规模生产芯片封装以及为数种芯片封装创造条件，因此可在芯片上布置成矩阵形式，并可在同一时间制造和测试。这可减少在封装以及测试IC芯片的过程中所花费的时间和成本。
在现有技术中，在圆片面(级)上进行的封装方法的实施例包括：Warfield的美国专利号5,604,160，它揭示了使用一盖圆片来封装装置圆片上的半导体器件；Salatino等人的美国专利号5,798,557，该专利描述了密封封装集成电路的一圆片面具有一焊接到一半导体器件衬底圆片上的保护性盖圆片；以及Wood等人的美国专利号5,851,845，它揭示了一种形成一半导体封装的方法，该方法步骤如下：提供一含有多个芯片的圆片，用抛光或蚀刻方法削薄圆片后部，将经削薄的圆片固定于一衬底上，然后切割该圆片。
本发明的一个目的是提供一种具有最小尺寸的球栅阵列IC封装，以使该IC封装占有空间和IC芯片的面积差不多。
本发明的另一个目的是提供一种在圆片面形成这样一种IC封装的方法，使得在大批量生产中有较高效率并有能力进行IC封装的并行测试。
发明内容
上述这些目的是通过这样一种方法达到的：使用具有一单圆片的封装芯片设计，在芯片面上形成一集成电路封装。集成电路封装是这样形成的：首先提供一制品硅圆片，该硅圆片具有多个制作在其上的微型电路以及具有多个外露的标准铝接合焊盘。铝焊盘被再金属化成可焊接的。然后，将多个焊料凸块沉积在焊盘结合部位上。接着，将一层未充满焊剂材料沉积在圆片表面上，以及焊料凸块的上面。一预制的具有再金属化的通孔的插入器衬底与圆片对齐，然后，将此组件反流或固化，以便把插入器衬底固定到一未充满焊剂材料层上并在衬底上的电路和硅圆片上的焊盘之间形成电连接。然后将焊球置于插入器衬底的金属焊盘开孔上并将之反流而形成一BGA衬底。随后，将圆片切开成芯片或小片，这样就形成了单个BGA封装。该BGA封装为下一阶段组装作好准备。
本发明的集成电路封装比现有技术的BGA封装要小，在这方面，不再需要因使用引线连接导线而需要的额外空间。整个圆片可在同一时间被封装，比单独封装每一个芯片更有效且可为仍旧在圆片形式下封装芯片的并行测试创造条件。另外，本发明的方法易于施行，由于焊料凸块是首先形成的，因此不需要牵涉到在加入粘合剂(未充满焊剂材料)层的步骤过程中因后面添加焊料而使焊盘保持清洁。还有，因焊料凸块已准备在位，这使得焊料凸块易于与插入器衬底的金属化通孔对准。
附图说明
图1为一硅圆片的立体图，该硅圆片具有多个形成在其上表面上的芯片；
图2为图1中所示的带有再金属化焊盘的硅圆片沿2-2线剖开的剖视图；
图3-7为图1中所示的硅圆片的剖视图，表示用于形成本发明的IC封装的各加工工艺步骤；
图8为图1中所示硅圆片的剖视图，表示作为本发明的IC封装制成的圆片组件；
图9所示为本发明制成的IC封装的剖视图；
图10所示为已知现有技术的球栅阵列封装的剖视图。
较佳实施例的描述
请参阅图1，一硅圆片21，其上设置有许多微型电路。诸微型电路排列成一矩阵的各个芯片或小片24，25。多个铝焊盘23设置在每块芯片的周边周围。在现有技术的封装作业中，圆片21通常在此时被切割成单个芯片，然后将每一单个芯片封装。在本发明中，诸芯片形成在圆片上直到圆片的封装作业完成后才被切割，因此芯片的封装是在圆片级或圆片面上进行的。
请参阅图2，图中示出了圆片21沿2-2线的剖面，铝焊盘23暴露在圆片21的一上表面上。封装过程的第一步骤是将铝焊盘23再金属化处理以使该焊盘23成为可焊接的。铝通常用于集成电路(IC)中的导线连接盘，它用于焊接连接(件)则不是很理想的金属，因铝往往引起氧化而产生焊料变湿的问题。在本发明的IC封装形式中，铝焊盘用焊料必需是可湿的或应用的导电粘合剂具有低欧姆的接触电阻。因此，焊盘必须再金属化。一种使焊盘再金属化的既不贵又适于实行的方法是采用无电镀镍金。首先，将一层锌17沉积在铝焊盘23上，然后将一层无电(化学)镀镍16沉积在该锌层上。所述锌层17作为镀镍层16和铝焊盘23之间的一粘合层。然后，再将一层无电镀金15沉积在无电镀镍层16上形成一镍-金镀层，而使铝焊盘23在焊接时成为导电性的。另外，其它薄膜金属化方法也可用来对焊盘进行再金属化。
接下来请参阅图3，多个焊料凸块30沉积在引线连接盘(焊接)部位23上。这可以通过网板印刷或模板印刷来进行。圆片21的表面用网屏隔开并通过一气动刮板将焊膏沉积在焊盘23上，以使焊膏同时沉积在整块圆片上。焊膏也可通过使用自动配给设备或通过焊料预制件配置而沉积在焊盘上。另外，焊料可电解镀敷或蒸发在圆片上。圆片通过诸如一焊料反流炉的焊接反流设备处理来形成焊料凸块30。另一可选择的方法是使用导电粘合剂来代替焊膏。
请接着参阅图4，一层粘合剂27沉积在圆片21的上表面。该粘合剂可由未充满焊剂材料制成。所述未充满焊剂材料具有两种功能。首先，它起焊剂作用以从焊料和焊接表面清除金属氧化物。其次，未充满焊剂材料起粘合剂或密封剂的作用。粘合层27是可通过网板印刷方法加上去的，其中，未充满焊剂材料通过模板或筛网的开孔挤入。所述筛网能安装在一网板印刷机上并准确地相对于圆片安置或定位。沿着筛网边缘分配一定量的未充满焊剂材料并用一汽动刮板向下压在网上以使上述材料通过网孔，因而可在恒压下剪切材料。材料在一定剪应力下可获得较好流动性，这可使材料通过筛网并填补由筛网的丝网所留下的空隙。焊盘23上面的区域不需封住，因焊料凸块已被限定以及因未充满焊剂材料也用作为焊剂。将筛网移走后一层均匀材料形成在圆片的上面。另外，一B级未充满焊剂预制件可用于将圆片21粘合于一插入器衬底层的后部。所述未充满焊剂层固化后起密封剂的作用，提供圆片的周边保护。未充满焊剂还作为对圆片21来自外应力，例如在圆片和用于固定IC封装安装的封装焊球之间的热膨胀失配系数或在圆片和其上装配IC封装的最终使用印刷电路板之间的失配的一缓冲层。
请参阅图5，一具有金属化通孔的插入器衬底层31与在未充满焊剂层27上的焊料凸块30对齐并固定至未充满焊剂层27和焊料凸块30上以形成一圆片/插入器组件39。插入器衬底31为一预制衬底，它由金属电路34和一介质基底32组成。金属电路34一般由遍布基层上形成的铜迹线或布线组成。为有助于在铜金属电路上形成可湿焊料区，插入器衬底31还可包括焊接保护涂层。金属电路34可在插入器衬底31的一单层或多层上形成。所述铜金属电路可以为镀镍金的或用于保护铜免受氧化的有机材料涂覆的镍金。所述介质基材32通常由聚酰胺底物制成。此外，BT-树脂和其它环氧玻璃衬底物也可用作为介质基材32。插入器衬底31的一主要特点是在金属电路34上有多个开孔38。金属电路34一般作为互连电路，因为布线可在整个衬底中定线而把若干电路从各个焊盘23连接至输入/输出(I/O)互连，所述输入/输出(I/O)互连将通过多个所述开孔38加到圆片/插入器组件39，这将在下面参照图8作描述。
插入器衬底31和圆片21可以是大致相同的尺寸并与圆片21对齐，从而使通孔36与焊盘23中心对准。在通孔36中必须存在足够数量的铜，以为焊料或一导电粘合剂提供合乎要求的连接。为简化上述要求，也可采用一环绕通孔的圆形铜圈或一穿过通孔36的铜条。
请参阅图6，插入器衬底31通过未充满焊剂材料27粘结至圆片21，然后使圆片/插入器组件39固化。因此，插入器件与圆片对齐并粘结在一起。
请参阅图7，可选择地使用一环氧涂层材料42以保护焊接部。环氧涂层材料42还是应用前述的网板印刷或模板印刷的方法，然后使保护涂层固化。
下一个步骤是在圆片/插入器组件上放置封装焊球。封装焊球用作对最后IC封装的I/O互连并将用于把完成后的IC封装固定到一最终使用的印刷电路板上。请参阅图8，若干焊球50通过预制或预形成焊球的机器输送装置配置于多个开孔38上，然后反流到金属化的开孔上。另外，诸焊球50可通过网板印刷或模板印刷焊膏所形成。焊料被反流形成封装焊球。在诸焊球50和插入器衬底的金属电路34之间构成一电连接和机械连接，而因此在诸焊球50和圆片21的焊盘23之间形成一电连接和机械连接。这些焊球50可以任何想要的模式，例如在整个表面上的一完全均匀矩阵模式施加上去。
此时，可以在圆片/插入器组件39上进行电测试，因圆片组件39包含矩阵模式布置制成的芯片或小片。这便于并行测试，测试可在圆片面进行并可达到测试时间和费用上的节省。接着，将圆片/插入器组件39切成小片，或切成单个，诸如沿线60切割，使之形成单个芯片尺寸BGA封装70，72。通用的切成单个芯片的技术是使用金刚石圆片锯或香树脂锯片。请参阅图9，制成的BGA封装70可如现有技术BGA封装同样方式安装在最终使用的印刷电路板上。本发明BGA封装70具有与单个硅圆片相同的占用面积，不需要额外的空间容纳引线接合导线或较大的衬底基座。以此方式，本发明的集成电路封装的优点是：封装尺寸小且在圆片面上封装方便。

Claims (11)

1.一种在圆片面上形成集成电路芯片封装的方法，其特征在于，所述方法包括以下步骤：
提供一在其第一表面上设置有多个焊盘的硅圆片；
将导电材料沉积在所述多个焊盘上；
将未充满焊剂材料沉积在圆片的第一表面；
将一插入器衬底固定至未充满焊剂材料层上以形成一圆片/插入器组件，所述插入器衬底由一介质材料和多个金属迹线或布线组成，所述插入器衬底包括多个与所述多个焊盘中心对准的金属化通孔以及还包括在所述金属布线上面的插入器衬底的表面上的多个开孔；
在多个通孔和所述多个焊盘之间形成电连接；
通过多个开孔把输入/输出(I/O)互连件连接到插入器衬底的金属化布线上；以及
将圆片/插入器组件切割成多个单个集成电路芯片封装。
2.如权利要求1所述的方法，其特征在于，所述导电材料包括形成在所述多个焊盘上的多个焊料凸块。
3.如权利要求2所述的方法，其特征在于，在所述多个通孔和多个焊盘之间形成电连接的步骤包括：将焊料凸块反流或逆流到插入器衬底。
4.如权利要求1所述的方法，其特征在于，所述导电材料是加于所述多个焊盘上的导电粘合剂。
5.如权利要求4所述的方法，其特征在于，在所述多个通孔和多个焊盘之间形成电连接的步骤进一步包括：使导电粘合剂凝固于所述插入器衬底的金属化开孔。
6.如权利要求1所述的方法，其特征在于，将所述插入器衬底固定至所述未充满焊剂材料上的步骤包括：使未充满焊剂材料固化。
7.如权利要求1所述的方法，其特征在于，所述多个输入/输出(I/O)互连件是多个焊球。
8.如权利要求7所述的方法，其特征在于，将所述多个输入/输出(I/O)互连件通过所述多个开孔固定到金属化布线的步骤包括：
将所述多个焊球配置于所述多个开孔上；以及
使所述多个焊球反流以形成多个互连接部分。
9.如权利要求1所述的方法，其特征在于，所述方法还包括：在所述多个通孔和所述多个焊盘之间形成电连接的步骤后，在所述通孔上敷加一环氧涂料层。
10.如权利要求1所述的方法，其特征在于，所述方法还包括：在提供一硅圆片的步骤之后，再金属化所述多个焊盘。
11.如权利要求10所述的方法，其特征在于，将所述多个焊盘再金属化的步骤包括：
将一层锌沉积在每一所述焊盘上；
将一层无电镀镍沉积在每一所述焊盘的锌层上面；以及
将一层无电镀金沉积在每一所述焊盘的无电镀镍层上。
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JP2003532294A (ja) 2003-10-28
AU2001249879A1 (en) 2001-11-07
NO20024196L (no) 2002-09-03
KR20040004761A (ko) 2004-01-14
HK1053746A1 (en) 2003-10-31
CA2402082A1 (en) 2001-11-01
US6281046B1 (en) 2001-08-28
MY134243A (en) 2007-11-30
EP1279193A2 (en) 2003-01-29
NO20024196D0 (no) 2002-09-03
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TW503486B (en) 2002-09-21
WO2001082361A3 (en) 2002-05-16

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