MY176667A - Method for mounting semiconductors provided with bumps on substrate locations of a substrate - Google Patents
Method for mounting semiconductors provided with bumps on substrate locations of a substrateInfo
- Publication number
- MY176667A MY176667A MYPI2016702921A MYPI2016702921A MY176667A MY 176667 A MY176667 A MY 176667A MY PI2016702921 A MYPI2016702921 A MY PI2016702921A MY PI2016702921 A MYPI2016702921 A MY PI2016702921A MY 176667 A MY176667 A MY 176667A
- Authority
- MY
- Malaysia
- Prior art keywords
- substrate
- bumps
- locations
- mounting
- mounting semiconductors
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title abstract 4
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 239000003795 chemical substances by application Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67282—Marking devices
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
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- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75702—Means for aligning in the upper part of the bonding apparatus, e.g. in the bonding head
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75753—Means for optical alignment, e.g. sensors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/758—Means for moving parts
- H01L2224/75821—Upper part of the bonding apparatus, i.e. bonding head
- H01L2224/75824—Translational mechanism
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/81132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH12482015 | 2015-08-31 | ||
CH01404/15A CH711536B1 (de) | 2015-08-31 | 2015-09-28 | Verfahren für die Montage von mit Bumps versehenen Halbleiterchips auf Substratplätzen eines Substrats. |
Publications (1)
Publication Number | Publication Date |
---|---|
MY176667A true MY176667A (en) | 2020-08-19 |
Family
ID=58264157
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI2016702921A MY176667A (en) | 2015-08-31 | 2016-08-11 | Method for mounting semiconductors provided with bumps on substrate locations of a substrate |
Country Status (7)
Country | Link |
---|---|
JP (1) | JP6868982B2 (enrdf_load_stackoverflow) |
KR (1) | KR102597252B1 (enrdf_load_stackoverflow) |
CN (1) | CN106486400B (enrdf_load_stackoverflow) |
CH (1) | CH711536B1 (enrdf_load_stackoverflow) |
MY (1) | MY176667A (enrdf_load_stackoverflow) |
SG (1) | SG10201606167WA (enrdf_load_stackoverflow) |
TW (1) | TWI700767B (enrdf_load_stackoverflow) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7164314B2 (ja) * | 2017-04-28 | 2022-11-01 | ベシ スウィッツァーランド エージー | 部品を基板上に搭載する装置及び方法 |
CN109079367B (zh) * | 2018-07-23 | 2020-07-24 | 中电科技(合肥)博微信息发展有限责任公司 | 一种芯片智能焊接方法 |
JP7582928B2 (ja) * | 2021-11-25 | 2024-11-13 | キヤノン株式会社 | 接合装置および接合方法 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5372294A (en) * | 1994-01-27 | 1994-12-13 | Motorola, Inc. | Method of preparing a component for automated placement |
JP2833996B2 (ja) * | 1994-05-25 | 1998-12-09 | 日本電気株式会社 | フレキシブルフィルム及びこれを有する半導体装置 |
JPH10209208A (ja) * | 1997-01-23 | 1998-08-07 | Hitachi Ltd | 半導体製造方法および装置 |
US7842599B2 (en) * | 1997-05-27 | 2010-11-30 | Wstp, Llc | Bumping electronic components using transfer substrates |
JP2001060795A (ja) * | 1999-08-20 | 2001-03-06 | Matsushita Electric Ind Co Ltd | 電子部品実装装置 |
US7033842B2 (en) * | 2002-03-25 | 2006-04-25 | Matsushita Electric Industrial Co., Ltd. | Electronic component mounting apparatus and electronic component mounting method |
JP4334892B2 (ja) * | 2003-03-20 | 2009-09-30 | パナソニック株式会社 | 部品実装方法 |
JP4516354B2 (ja) * | 2004-05-17 | 2010-08-04 | パナソニック株式会社 | 部品供給方法 |
JP2007173801A (ja) * | 2005-12-22 | 2007-07-05 | Unaxis Internatl Trading Ltd | フリップチップを基板に取り付ける方法 |
JP2008168225A (ja) * | 2007-01-12 | 2008-07-24 | Fujifilm Corp | スリット塗布方法及び装置、並びにカラーフィルタの製造方法 |
CH698718B1 (de) * | 2007-01-31 | 2009-10-15 | Oerlikon Assembly Equipment Ag | Vorrichtung für die Montage eines Flipchips auf einem Substrat. |
CH698720B1 (de) * | 2007-02-14 | 2009-10-15 | Oerlikon Assembly Equipment Ag | Verfahren und Montageautomat für die Montage von Halbleiterchips als Flipchip auf einem Substrat. |
CH698334B1 (de) * | 2007-10-09 | 2011-07-29 | Esec Ag | Verfahren für die Entnahme und Montage von auf einem Wafertisch bereitgestellten Halbleiterchips auf einem Substrat. |
JP5030843B2 (ja) * | 2008-04-14 | 2012-09-19 | 芝浦メカトロニクス株式会社 | 電子部品の実装装置及び実装方法 |
JP4983737B2 (ja) * | 2008-06-30 | 2012-07-25 | 株式会社日立プラントテクノロジー | ハンダボール検査リペア装置およびハンダボール検査リペア方法 |
JP4766144B2 (ja) * | 2009-04-08 | 2011-09-07 | パナソニック株式会社 | 電子部品実装装置 |
KR101120129B1 (ko) * | 2009-08-31 | 2012-03-23 | (주) 에스에스피 | 기준값을 응용한 작업위치 자동 조정방법 및 이를 위한 자동화 장비 |
JP2011181675A (ja) * | 2010-03-01 | 2011-09-15 | Nec Corp | 回路部品の実装装置 |
CH705802B1 (de) * | 2011-11-25 | 2016-04-15 | Esec Ag | Einrichtung für die Montage von Halbleiterchips. |
JP6000626B2 (ja) * | 2012-05-01 | 2016-10-05 | 新光電気工業株式会社 | 電子装置の製造方法及び電子部品搭載装置 |
JP6391225B2 (ja) | 2013-09-13 | 2018-09-19 | ファスフォードテクノロジ株式会社 | フリップチップボンダ及びフリップチップボンディング方法 |
JP6200737B2 (ja) * | 2013-09-17 | 2017-09-20 | ファスフォードテクノロジ株式会社 | ダイボンダ用ディッピング機構及びフリップチップボンダ |
JP2015076411A (ja) * | 2013-10-04 | 2015-04-20 | 株式会社日立ハイテクインスツルメンツ | ダイボンダ |
JP6324772B2 (ja) * | 2014-03-14 | 2018-05-16 | ファスフォードテクノロジ株式会社 | ダイボンダ用ディッピング機構及びフリップチップボンダ |
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2015
- 2015-09-28 CH CH01404/15A patent/CH711536B1/de not_active IP Right Cessation
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2016
- 2016-07-26 SG SG10201606167WA patent/SG10201606167WA/en unknown
- 2016-08-09 JP JP2016156305A patent/JP6868982B2/ja active Active
- 2016-08-11 MY MYPI2016702921A patent/MY176667A/en unknown
- 2016-08-12 KR KR1020160103073A patent/KR102597252B1/ko active Active
- 2016-08-18 CN CN201610754833.6A patent/CN106486400B/zh active Active
- 2016-08-30 TW TW105127781A patent/TWI700767B/zh active
Also Published As
Publication number | Publication date |
---|---|
JP2017050533A (ja) | 2017-03-09 |
TW201735227A (zh) | 2017-10-01 |
CH711536B1 (de) | 2019-02-15 |
CN106486400A (zh) | 2017-03-08 |
TWI700767B (zh) | 2020-08-01 |
KR102597252B1 (ko) | 2023-11-01 |
CN106486400B (zh) | 2021-10-29 |
CH711536A1 (de) | 2017-03-15 |
JP6868982B2 (ja) | 2021-05-12 |
SG10201606167WA (en) | 2017-03-30 |
KR20170026136A (ko) | 2017-03-08 |
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