KR970704246A - 반도체 기판의 준비방법 및 그 방법에 따른 반도체 디바이스 - Google Patents

반도체 기판의 준비방법 및 그 방법에 따른 반도체 디바이스 Download PDF

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Publication number
KR970704246A
KR970704246A KR1019960707298A KR19960707298A KR970704246A KR 970704246 A KR970704246 A KR 970704246A KR 1019960707298 A KR1019960707298 A KR 1019960707298A KR 19960707298 A KR19960707298 A KR 19960707298A KR 970704246 A KR970704246 A KR 970704246A
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KR
South Korea
Prior art keywords
substrate
buffer layer
iron
doped
semiconductor
Prior art date
Application number
KR1019960707298A
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English (en)
Korean (ko)
Inventor
폴 찰스 스퍼던스
마크 앤드류 솔터
마이클 존 할로
데이비드 존 뉴슨
Original Assignee
로버츠 사이먼 크리스토퍼
브리티쉬 텔리커뮤니케이션즈 퍼블릭 리미티드 캄파니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 로버츠 사이먼 크리스토퍼, 브리티쉬 텔리커뮤니케이션즈 퍼블릭 리미티드 캄파니 filed Critical 로버츠 사이먼 크리스토퍼
Publication of KR970704246A publication Critical patent/KR970704246A/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02387Group 13/15 materials
    • H01L21/02392Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02461Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02581Transition metal or rare earth elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Recrystallisation Techniques (AREA)
KR1019960707298A 1994-06-29 1995-06-29 반도체 기판의 준비방법 및 그 방법에 따른 반도체 디바이스 KR970704246A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP94304754.8 1994-06-29
EP94304754 1994-06-29
PCT/GB1995/001541 WO1996000979A1 (en) 1994-06-29 1995-06-29 Preparation of semiconductor substrates

Publications (1)

Publication Number Publication Date
KR970704246A true KR970704246A (ko) 1997-08-09

Family

ID=8217756

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960707298A KR970704246A (ko) 1994-06-29 1995-06-29 반도체 기판의 준비방법 및 그 방법에 따른 반도체 디바이스

Country Status (6)

Country Link
EP (1) EP0767969A1 (zh)
JP (1) JPH10504685A (zh)
KR (1) KR970704246A (zh)
CN (1) CN1092839C (zh)
CA (1) CA2193098C (zh)
WO (1) WO1996000979A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462361B1 (en) 1995-12-27 2002-10-08 Showa Denko K.K. GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure
TW522574B (en) * 1999-09-28 2003-03-01 Showa Denko Kk GaInP epitaxial stacking structure, a GaInP epitaxial stacking structure for FETs and a fabrication method thereof
US6956237B2 (en) 2002-12-28 2005-10-18 Lg.Philips Lcd Co., Ltd. Thin film transistor array substrate and method for manufacturing the same
CN100364063C (zh) * 2004-06-21 2008-01-23 中国科学院半导体研究所 电化学腐蚀制备多孔磷化铟半导体材料的方法
CN106972058B (zh) * 2016-12-15 2020-02-11 苏州能讯高能半导体有限公司 一种半导体器件及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01226796A (ja) * 1988-03-04 1989-09-11 Sumitomo Electric Ind Ltd インジウムリン基板の処理方法
CN1040401A (zh) * 1989-04-14 1990-03-14 吉林大学 砷化镓/磷化铟异质气相外延技术
JPH03161922A (ja) * 1989-11-20 1991-07-11 Nec Corp 異種基板上への3―5族化合物半導体のヘテロエピタキシャル成長法
CN1053146A (zh) * 1991-02-04 1991-07-17 中国科学院西安光学精密机械研究所 砷化镓衬底上的混合并质外延

Also Published As

Publication number Publication date
EP0767969A1 (en) 1997-04-16
CA2193098C (en) 2001-02-20
WO1996000979A1 (en) 1996-01-11
CN1092839C (zh) 2002-10-16
CA2193098A1 (en) 1996-01-11
CN1155353A (zh) 1997-07-23
JPH10504685A (ja) 1998-05-06

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