KR970073243A - 전자 부품 탑재 기판 및 이의 제조 방법(electronic component mounting base board and method of producing the same) - Google Patents
전자 부품 탑재 기판 및 이의 제조 방법(electronic component mounting base board and method of producing the same) Download PDFInfo
- Publication number
- KR970073243A KR970073243A KR1019970016213A KR19970016213A KR970073243A KR 970073243 A KR970073243 A KR 970073243A KR 1019970016213 A KR1019970016213 A KR 1019970016213A KR 19970016213 A KR19970016213 A KR 19970016213A KR 970073243 A KR970073243 A KR 970073243A
- Authority
- KR
- South Korea
- Prior art keywords
- electronic component
- ground hole
- heat sink
- ground
- component mounting
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
- H05K9/002—Casings with localised screening
- H05K9/0039—Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15156—Side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15157—Top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/066—Heatsink mounted on the surface of the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09554—Via connected to metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10666—Plated through-hole for surface mounting on PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/041—Solder preforms in the shape of solder balls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structure Of Printed Boards (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
전자 부품을 탑재하기 위한 탑재부를 구비하는 절연 기판 및 상기 절연 기판의 저면상에 배치된 히트싱크판을 포함하는 전자 부품 탑재 기판에 있어서, 상기 절연 기판이 신호 또는 파우워용 배선 패턴, 접지 패턴 및 접지공을 구비하며, 상기 접지 패턴의 전기적 연결을 위해 상기 접지공은 그 내벽 상에 금속 도금막이 구비되어 있고, 상기 히트싱크판과의 전기적 연결을 위해 상기 접지공의 내부에는 땜납이 채워져 있는 전자 부품 탑재 기판이 개시되어 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도 1은 본 발명의 제1 실시예의 따른 전자 부품 탑재 기판의 평면도, 도 2는 도 1에서 Ⅱ-Ⅱ 선을 따라 자른 개략적인 단면도이다.
Claims (14)
- 전자 부품을 탑재하기 위한 탑재부를 구비하는 절연 기판 및 상기 절연 기판의 저면상에 배치된 히트싱크판을 포함하는 전자 부품 탑재 기판에 있어서, 상기 절연 기판이 신호 또는 파우워용 배선 패턴, 접지 패턴 및 접지공을 구비하며, 상기 접지 패텬과의 전기적 연결을 위해 상기 접지공은 그 내벽 상에 금속 도금막이 구비되어 있고, 상기 히트싱크판과의 전기적 연결을 위해 상기 접지공의 내부에는 땜납이 채워져 있는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제1항에 있어서, 상기 히트싱크판의 단면으로부터 연장되어 이로부터 접힌 돌출부가 상기 접지공의 내부로 삽입되어 땜납을 통하여 이에 고정되는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제2항에 있어서, 상기 히트싱크판의 단면에 짝수 개의 돌출부가 형성되어 있는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제3항에 있어서, 상기 돌출부가 상기 히트싱크판의 중심에 대하여 대칭으로 배열된 것을 특징으로 하는 전자 부품 탑재 기판.
- 제4항에 있어서, 상기 돌출부가 상기 히트싱크판의 중심부로부터 가장 멀리 떨어진 위치에 배열되어 있는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제2항에 있어서, 상기 접지공의 내부로 삽입되는 상기 돌출부의 길이가 상기 접지공 깊이의 50 내지 100% 범위에 있는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제2항에 있어서, 상기 돌출부의 상기 접지공의 내부로 삽입되는 부분이 상기 삽입부의 전면적의 50 내지 100%에 걸쳐서 상기 접지공의 내부에 충전된 땜납에 결합되는 것을 특징으로 하는 전자 부품 탑재 기판.
- 제2항에 있어서, 상기 돌출부의 두께가 0.1 내지 0.5㎜인 것을 특징으로 하는 전자 부품 탑재 기판.
- 제1항에 있어서, 상기 히트싱크판의 두께가 0.1 내지 1.0㎜인 것을 특징으로 하는 전자 부품 탑재 기판.
- 전자 부품을 탑재하기 위한 탑재부, 신호 또는 파우워용 배선 패턴, 접지 패턴 및 내벽이 금속 도금막으로 덮인 접지공을 절연 기판 상에 제조하는 단계, 상기 접지공에 대응하는 위치에 개구부를 갖는 접착층을 통하여 상기 절연 기판의 저면에 히트싱크판을 부착하는 단계, 상기 접지공의 내부에 땜납을 공급하는 단계, 및 상기 땜납을 가열, 용융하여 상기 접지공의 내벽에 형성된 금속 도금막을 상기 히트싱크판에 결합하는 단계를 포함하는 접지 패턴을 갖는 전자 부품 탑재 기판의 제조 방법.
- 제10항에 있어서, 상기 접지공의 내부에 대한 땜납 공급과 상기 신호 또는 파우워용 배선 패턴에 대한 땜납 공급이 동시에 이루어지는 것을 특징으로 하는 방법.
- 제10항에 있어서, 상기 접지공의 제조후, 상기 히트싱크판을 상기 절연 기판의 저면상에 부착하기 전에, 상기 히트싱크판의 단면으로부터 연장되고 이로부터 접힌 돌출부가 상기 접지공의 내부로 삽입되는 것을 특징으로 하는 방법.
- 제10항에 있어서, 상기 접지공의 내부에 상기 땜납을 공급할 때, 상기 접지공의 내부에 땜납볼이 적하되는 것을 특징으로 하는 방법.
- 제10항에 있어서, 상기 접지공의 내부에 상기 땜납을 공급할 때, 땜납 페이스트가 인쇄되는 것을 특징으로 하는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13275196 | 1996-04-29 | ||
JP96-132751 | 1996-04-29 | ||
JP96-132,751 | 1996-04-29 | ||
JP9067408A JPH1022589A (ja) | 1996-04-29 | 1997-03-04 | 電子部品搭載用基板及びその製造方法 |
JP97-067408 | 1997-03-04 | ||
JP97-067,408 | 1997-03-04 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970073243A true KR970073243A (ko) | 1997-11-07 |
KR100368773B1 KR100368773B1 (ko) | 2003-04-10 |
Family
ID=26408621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970016213A KR100368773B1 (ko) | 1996-04-29 | 1997-04-29 | 전자부품탑재기판및이의제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5914859A (ko) |
JP (1) | JPH1022589A (ko) |
KR (1) | KR100368773B1 (ko) |
DE (1) | DE19718093A1 (ko) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0869704A1 (en) * | 1997-03-31 | 1998-10-07 | Ford Motor Company | Method of mounting components on a printed circuit board |
JP3081168B2 (ja) | 1997-04-30 | 2000-08-28 | イビデン株式会社 | 電子部品搭載用基板 |
US6162661A (en) * | 1997-05-30 | 2000-12-19 | Tessera, Inc. | Spacer plate solder ball placement fixture and methods therefor |
DE19902950A1 (de) * | 1998-06-24 | 1999-12-30 | Wuerth Elektronik Gmbh & Co Kg | Verfahren zum Herstellen einer Leiterplatte und Leiterplatte |
KR20010048362A (ko) * | 1999-11-26 | 2001-06-15 | 박종섭 | 그라운드패턴을 이용한 피씨비 방열장치 |
US6501031B1 (en) * | 2000-09-06 | 2002-12-31 | Visteon Global Tech., Inc. | Electrical circuit board and a method for making the same |
US6515861B1 (en) * | 2001-04-02 | 2003-02-04 | Advanced Micro Devices, Inc. | Method and apparatus for shielding electromagnetic emissions from an integrated circuit |
US6537857B2 (en) * | 2001-05-07 | 2003-03-25 | St Assembly Test Service Ltd. | Enhanced BGA grounded heatsink |
KR100486427B1 (ko) * | 2002-06-24 | 2005-05-03 | 주식회사 인텍웨이브 | 고주파증폭용 인쇄회로기판 제조방법 |
JP3908671B2 (ja) * | 2003-01-29 | 2007-04-25 | 松下電器産業株式会社 | 半導体装置およびそれを用いたディスプレイ装置 |
US6842341B1 (en) * | 2003-10-02 | 2005-01-11 | Motorola, Inc. | Electrical circuit apparatus and method for assembling same |
US7195145B2 (en) | 2005-07-13 | 2007-03-27 | Motorola, Inc. | Electrical circuit apparatus and method for assembling same |
KR101633398B1 (ko) * | 2010-02-16 | 2016-06-24 | 삼성전자주식회사 | 랜드와 솔더 레지스트의 단차를 감소할 수 있는 랜드 그리드 어레이 패키지. |
US8766313B2 (en) * | 2010-02-24 | 2014-07-01 | Citizen Electronics Co., Ltd. | Mounting board and structure of the same |
KR101519187B1 (ko) * | 2012-09-07 | 2015-05-11 | 엘지이노텍 주식회사 | 방열부재, 방열회로기판 및 발열소자 패키지 |
EP2736308A1 (de) * | 2012-11-22 | 2014-05-28 | Siemens Aktiengesellschaft | Kühlkörperanordnung |
JP5681824B1 (ja) | 2013-10-01 | 2015-03-11 | 株式会社フジクラ | 配線板組立体及びその製造方法 |
US9974174B1 (en) | 2016-10-26 | 2018-05-15 | Nxp Usa, Inc. | Package to board interconnect structure with built-in reference plane structure |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4535385A (en) * | 1983-04-22 | 1985-08-13 | Cray Research, Inc. | Circuit module with enhanced heat transfer and distribution |
US4598308A (en) * | 1984-04-02 | 1986-07-01 | Burroughs Corporation | Easily repairable, low cost, high speed electromechanical assembly of integrated circuit die |
JPS61271898A (ja) * | 1985-05-27 | 1986-12-02 | ロ−ム株式会社 | スル−ホ−ルの半田付け方法 |
US5088639A (en) * | 1991-01-25 | 1992-02-18 | Motorola, Inc. | Soldering process |
US5285352A (en) * | 1992-07-15 | 1994-02-08 | Motorola, Inc. | Pad array semiconductor device with thermal conductor and process for making the same |
US5306670A (en) * | 1993-02-09 | 1994-04-26 | Texas Instruments Incorporated | Multi-chip integrated circuit module and method for fabrication thereof |
JPH06283650A (ja) * | 1993-03-26 | 1994-10-07 | Ibiden Co Ltd | 半導体装置 |
US5410451A (en) * | 1993-12-20 | 1995-04-25 | Lsi Logic Corporation | Location and standoff pins for chip on tape |
US5431332A (en) * | 1994-02-07 | 1995-07-11 | Motorola, Inc. | Method and apparatus for solder sphere placement using an air knife |
JP2587582B2 (ja) * | 1994-03-22 | 1997-03-05 | 株式会社日本アルミ | ヒートシンク及びその製造方法 |
US5459640A (en) * | 1994-09-23 | 1995-10-17 | Motorola, Inc. | Electrical module mounting apparatus and method thereof |
-
1997
- 1997-03-04 JP JP9067408A patent/JPH1022589A/ja active Pending
- 1997-04-22 US US08/837,793 patent/US5914859A/en not_active Expired - Lifetime
- 1997-04-29 KR KR1019970016213A patent/KR100368773B1/ko not_active IP Right Cessation
- 1997-04-29 DE DE19718093A patent/DE19718093A1/de not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
US5914859A (en) | 1999-06-22 |
KR100368773B1 (ko) | 2003-04-10 |
JPH1022589A (ja) | 1998-01-23 |
DE19718093A1 (de) | 1997-11-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR970073243A (ko) | 전자 부품 탑재 기판 및 이의 제조 방법(electronic component mounting base board and method of producing the same) | |
JP5142119B2 (ja) | 放熱構造を備えたプリント基板の製造方法および該方法で製造されたプリント基板の放熱構造 | |
EP1703555A3 (en) | Printed wiring board and method for manufacturing the same | |
WO1990013990A3 (en) | Circuit boards with recessed traces | |
KR970050001A (ko) | 고밀도 인쇄 회로 기판에 패드를 부착하는 방법, 다중층 인쇄 회로 기판의 형성 방법 및 다중층 회로 기판 | |
KR100510383B1 (ko) | 제어기 | |
KR910011105A (ko) | 전자부품 탑재용 기판 및 그 제조 방법 | |
AU6036800A (en) | A printed circuit board | |
JP2926902B2 (ja) | プリント配線基板 | |
EP0949855A3 (en) | Multilayer circuit board | |
JP2000196215A (ja) | プリント配線板 | |
JPH0342693Y2 (ko) | ||
JP3324114B2 (ja) | プリント基板 | |
JP4073579B2 (ja) | フレキシブルプリント配線板の製造方法 | |
JPS622787Y2 (ko) | ||
TW200505317A (en) | Wiring board member for forming multilayer printed circuit board, method for producing the same, and multilayer printed circuit board | |
JP3700922B2 (ja) | 金属ベース配線板及びその製造方法 | |
JP2004006454A (ja) | 回路基板のランド構造 | |
JPH11312849A (ja) | 絶縁基板と回路基板 | |
JP2667682B2 (ja) | 電子部品の実装構造および実装方法 | |
JPH05347466A (ja) | 印刷配線板 | |
JPH045280B2 (ko) | ||
JP2504017Y2 (ja) | プリント基板 | |
JP2715957B2 (ja) | 混成集積回路装置 | |
JPH04109690A (ja) | 電子部品搭載用基板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20111216 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20121227 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |