KR970067836A - 반도체장치의 제조방법 - Google Patents
반도체장치의 제조방법Info
- Publication number
- KR970067836A KR970067836A KR1019970009504A KR19970009504A KR970067836A KR 970067836 A KR970067836 A KR 970067836A KR 1019970009504 A KR1019970009504 A KR 1019970009504A KR 19970009504 A KR19970009504 A KR 19970009504A KR 970067836 A KR970067836 A KR 970067836A
- Authority
- KR
- South Korea
- Prior art keywords
- groove
- semiconductor
- manufacturing
- semiconductor substrate
- wall surface
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract 12
- 239000000463 material Substances 0.000 claims abstract 4
- 239000004020 conductor Substances 0.000 claims abstract 3
- 230000003647 oxidation Effects 0.000 claims 3
- 238000007254 oxidation reaction Methods 0.000 claims 3
- 238000009792 diffusion process Methods 0.000 claims 2
- 238000010438 heat treatment Methods 0.000 claims 2
- 238000000151 deposition Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 239000011261 inert gas Substances 0.000 claims 1
- 239000011810 insulating material Substances 0.000 claims 1
- 239000000969 carrier Substances 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1037—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure and non-planar channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Element Separation (AREA)
Abstract
게이트절연막의 내압이 높고, 채널부에 있어서, 캐리어의 이동도가 큰 반도체 장치의 제조방법을 제공한다. 반도체기판(1)을 에칭하여 홈(4)을 형성하고, 반도체기판(1)표면상에 홈(4) 영역을 개구하도록 형성되어 있는 마스크재층(3)을 마스크로서 홈(4)의 내벽면에 노출하는 반도체기판(1)에 선택적으로 반도체층(10)을 형성하고, 마스크재층(3)을 제거하고, 홈(4)의 내벽면에 형성된 반도체층(10)상 및 반도체기판(1)의 표면상에 절연막(5)을 형성하며, 이 절연막(5)상의 적어도 홈(4)의 내부에 도전체(6)를 매립한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 제1실시예에 의한 반도체장치의 제조방법을 나타낸 단면도.
Claims (8)
- 반도체기판을 에칭하여 홈을 형성하는 공정과, 상기 반도체기판 표면상에 상기 홈 영역을 개구하도록 형성되어 있는 마스크재층을 마스크로서 상기 홈의 내벽면에 노출하는 상기 반도체기판에 선택적으로 반도체층을 형성하는 공정, 상기 마스크재층을 제거하는 공정, 상기 홈의 내벽면에 형성된 반도체층 및 상기 반도체기판의 표면에 절연막을 형성하는 공정 및, 이 절연막 상의 적어도 상기 홈의 내부에 도전체를 매립하는 공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
- 제1항에 있어서, 상기 반도체기판은 제1도전형을 갖추고, 그 표면에 상기 홈 보다 얕은 제2도전형의 확산층을 갖추며, 상기 홈의 내부에 상기 도전체를 매립한 후에, 더욱이 상기 홈에 인접하여 제1도전형을 갖춘 확산층 영역을 형성하는 공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
- 제1항 또는 제2항에 있어서, 상기 홈의 내벽면에 노출하는 상기 반도체기판에 선택적으로 반도체층을 형성한 후에 열처리를 행하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제3항에 있어서, 상기 열처리는 800℃ 이상의 불활성가스를 이용하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제1항 또는 제4항에 있어서, 상기 절연막은 상기 홈의 내벽면에 형성된 반도체층의 열산화에 의해 형성된 것을 특징으로 하는 반도체장치의 제조방법.
- 제5항에 있어서, 상기 열산화에 의해 내벽면에 형성된 반도체층은 거의 산화된 것을 특징으로 하는 반도체장치의 제조방법.
- 제5항에 있어서, 상기 열산화에 의해 내벽면에 형성된 반도체층의 표면부분만이 산화된 것을 특징으로 하는 반도체장치의 제조방법.
- 제4항에 있어서, 상기 절연막은 상기 홈의 내벽면에 형성된 반도체층 상에 절연재료층을 피착함으로써, 형성된 것을 특징으로 하는 반도체장치의 제조방법.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP06649596A JP3217690B2 (ja) | 1996-03-22 | 1996-03-22 | 半導体装置の製造方法 |
JP96066495 | 1996-03-22 | ||
JP96-066495 | 1996-03-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970067836A true KR970067836A (ko) | 1997-10-13 |
KR100222184B1 KR100222184B1 (ko) | 1999-10-01 |
Family
ID=13317457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970009504A KR100222184B1 (ko) | 1996-03-22 | 1997-03-20 | 반도체장치의 제조방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5733810A (ko) |
EP (1) | EP0797245B1 (ko) |
JP (1) | JP3217690B2 (ko) |
KR (1) | KR100222184B1 (ko) |
DE (1) | DE69727413T2 (ko) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3426928B2 (ja) * | 1996-09-18 | 2003-07-14 | 株式会社東芝 | 電力用半導体装置 |
JP3496509B2 (ja) * | 1998-03-18 | 2004-02-16 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
US6277707B1 (en) * | 1998-12-16 | 2001-08-21 | Lsi Logic Corporation | Method of manufacturing semiconductor device having a recessed gate structure |
US6077744A (en) * | 1999-02-22 | 2000-06-20 | Intersil Corporation | Semiconductor trench MOS devices |
US6706604B2 (en) * | 1999-03-25 | 2004-03-16 | Hitachi, Ltd. | Method of manufacturing a trench MOS gate device |
JP4860022B2 (ja) * | 2000-01-25 | 2012-01-25 | エルピーダメモリ株式会社 | 半導体集積回路装置の製造方法 |
US6406982B2 (en) * | 2000-06-05 | 2002-06-18 | Denso Corporation | Method of improving epitaxially-filled trench by smoothing trench prior to filling |
JP4792645B2 (ja) * | 2001-03-12 | 2011-10-12 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
US7078296B2 (en) * | 2002-01-16 | 2006-07-18 | Fairchild Semiconductor Corporation | Self-aligned trench MOSFETs and methods for making the same |
US20050106794A1 (en) * | 2002-03-26 | 2005-05-19 | Fuji Electric Holdings Co., Ltd. | Method of manufacturing a semiconductor device |
JP4123961B2 (ja) * | 2002-03-26 | 2008-07-23 | 富士電機デバイステクノロジー株式会社 | 半導体装置の製造方法 |
US6828211B2 (en) * | 2002-10-01 | 2004-12-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Shallow trench filled with two or more dielectrics for isolation and coupling or for stress control |
KR100574317B1 (ko) * | 2004-02-19 | 2006-04-26 | 삼성전자주식회사 | 게이트 구조물, 이를 갖는 반도체 장치 및 그 형성 방법 |
JP4830285B2 (ja) * | 2004-11-08 | 2011-12-07 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
JP5033316B2 (ja) * | 2005-07-05 | 2012-09-26 | 日産自動車株式会社 | 半導体装置の製造方法 |
JP4867333B2 (ja) * | 2005-12-27 | 2012-02-01 | 三菱電機株式会社 | 炭化珪素半導体装置、及び炭化珪素半導体装置の製造方法 |
US7592230B2 (en) * | 2006-08-25 | 2009-09-22 | Freescale Semiconductor, Inc. | Trench power device and method |
US7875919B2 (en) * | 2008-03-31 | 2011-01-25 | International Business Machines Corporation | Shallow trench capacitor compatible with high-K / metal gate |
JP2010287743A (ja) * | 2009-06-11 | 2010-12-24 | Sony Corp | 半導体装置及びその製造方法、固体撮像素子 |
US8878288B2 (en) | 2011-04-22 | 2014-11-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US8932913B2 (en) | 2011-04-22 | 2015-01-13 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US8809854B2 (en) | 2011-04-22 | 2014-08-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US8916868B2 (en) * | 2011-04-22 | 2014-12-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
US8847233B2 (en) | 2011-05-12 | 2014-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having a trenched insulating layer coated with an oxide semiconductor film |
JP2015159138A (ja) * | 2014-02-21 | 2015-09-03 | 豊田合成株式会社 | 半導体装置およびその製造方法 |
JP6613610B2 (ja) * | 2015-05-14 | 2019-12-04 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
DE102019204100A1 (de) * | 2019-03-26 | 2020-10-01 | Robert Bosch Gmbh | Leistungstransistorzelle für Batteriesysteme |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63102351A (ja) * | 1986-10-20 | 1988-05-07 | Matsushita Electronics Corp | トレンチ・キヤパシタ |
JPH0291976A (ja) * | 1988-09-29 | 1990-03-30 | Oki Electric Ind Co Ltd | 縦型溝型mos fetの製造方法 |
US5108938A (en) * | 1989-03-21 | 1992-04-28 | Grumman Aerospace Corporation | Method of making a trench gate complimentary metal oxide semiconductor transistor |
US5910669A (en) * | 1992-07-24 | 1999-06-08 | Siliconix Incorporated | Field effect Trench transistor having lightly doped epitaxial region on the surface portion thereof |
US5316959A (en) * | 1992-08-12 | 1994-05-31 | Siliconix, Incorporated | Trenched DMOS transistor fabrication using six masks |
US5349224A (en) * | 1993-06-30 | 1994-09-20 | Purdue Research Foundation | Integrable MOS and IGBT devices having trench gate structure |
-
1996
- 1996-03-22 JP JP06649596A patent/JP3217690B2/ja not_active Expired - Fee Related
-
1997
- 1997-03-19 US US08/820,530 patent/US5733810A/en not_active Expired - Fee Related
- 1997-03-20 KR KR1019970009504A patent/KR100222184B1/ko not_active IP Right Cessation
- 1997-03-21 DE DE69727413T patent/DE69727413T2/de not_active Expired - Fee Related
- 1997-03-21 EP EP97104869A patent/EP0797245B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH09260653A (ja) | 1997-10-03 |
DE69727413T2 (de) | 2004-12-16 |
EP0797245A2 (en) | 1997-09-24 |
EP0797245A3 (en) | 1998-05-13 |
EP0797245B1 (en) | 2004-02-04 |
KR100222184B1 (ko) | 1999-10-01 |
US5733810A (en) | 1998-03-31 |
DE69727413D1 (de) | 2004-03-11 |
JP3217690B2 (ja) | 2001-10-09 |
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