KR970053214A - 다중 레벨 스택 집적된 회러칩 어셈블리 - Google Patents

다중 레벨 스택 집적된 회러칩 어셈블리 Download PDF

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Publication number
KR970053214A
KR970053214A KR1019960082426A KR19960082426A KR970053214A KR 970053214 A KR970053214 A KR 970053214A KR 1019960082426 A KR1019960082426 A KR 1019960082426A KR 19960082426 A KR19960082426 A KR 19960082426A KR 970053214 A KR970053214 A KR 970053214A
Authority
KR
South Korea
Prior art keywords
integrated circuit
major surface
wiring pad
circuit chip
chip assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019960082426A
Other languages
English (en)
Korean (ko)
Inventor
데가니 이논
딕슨 머더러 토마스
한영준
Original Assignee
엘리 와이스
루센트 테크놀로지스 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘리 와이스, 루센트 테크놀로지스 인코포레이티드 filed Critical 엘리 와이스
Publication of KR970053214A publication Critical patent/KR970053214A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H10W72/071—
    • H10W90/00—
    • H10W90/20—
    • H10W90/291—
    • H10W90/722—
    • H10W90/724—
    • H10W90/732—
    • H10W90/752—
    • H10W90/754—

Landscapes

  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)
KR1019960082426A 1995-12-28 1996-12-28 다중 레벨 스택 집적된 회러칩 어셈블리 Ceased KR970053214A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58022095A 1995-12-28 1995-12-28
US580,220 1995-12-28

Publications (1)

Publication Number Publication Date
KR970053214A true KR970053214A (ko) 1997-07-29

Family

ID=24320199

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960082426A Ceased KR970053214A (ko) 1995-12-28 1996-12-28 다중 레벨 스택 집적된 회러칩 어셈블리

Country Status (4)

Country Link
EP (1) EP0782191A2 (enExample)
JP (1) JPH09186289A (enExample)
KR (1) KR970053214A (enExample)
TW (1) TW315515B (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100379608B1 (ko) * 1999-02-17 2003-04-10 샤프 가부시키가이샤 반도체장치 및 그의 제조방법
KR100386995B1 (ko) * 2000-01-17 2003-06-12 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 배선 방법
KR100464561B1 (ko) * 2000-04-11 2004-12-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 이것의 제조방법
US8907383B2 (en) 2012-12-20 2014-12-09 SK Hynix Inc. Stack packages having token ring loops

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0890989A4 (en) 1997-01-24 2006-11-02 Rohm Co Ltd SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
DE19743264C2 (de) * 1997-09-30 2002-01-17 Infineon Technologies Ag Verfahren zur Herstellung einer Emulationsschaltkreisanordnung sowie Emulationsschaltkreisanordnung mit zwei integrierten Schaltkreisen
US6413797B2 (en) 1997-10-09 2002-07-02 Rohm Co., Ltd. Semiconductor device and method for making the same
CA2218307C (en) * 1997-10-10 2006-01-03 Gennum Corporation Three dimensional packaging configuration for multi-chip module assembly
JP2000164796A (ja) * 1998-11-27 2000-06-16 Nec Corp マルチチップモジュール
JP3512657B2 (ja) * 1998-12-22 2004-03-31 シャープ株式会社 半導体装置
JP2001044358A (ja) * 1999-07-28 2001-02-16 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6605875B2 (en) * 1999-12-30 2003-08-12 Intel Corporation Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
US6344401B1 (en) * 2000-03-09 2002-02-05 Atmel Corporation Method of forming a stacked-die integrated circuit chip package on a water level
JP2002176137A (ja) 2000-09-28 2002-06-21 Toshiba Corp 積層型半導体デバイス
KR100537835B1 (ko) * 2000-10-19 2005-12-19 앰코 테크놀로지 코리아 주식회사 반도체 패키지 제조방법
EP1332654B1 (en) 2000-11-10 2005-01-12 Unitive Electronics, Inc. Methods of positioning components using liquid prime movers and related structures
US6863209B2 (en) 2000-12-15 2005-03-08 Unitivie International Limited Low temperature methods of bonding components
JP3558595B2 (ja) * 2000-12-22 2004-08-25 松下電器産業株式会社 半導体チップ，半導体チップ群及びマルチチップモジュール
US6762122B2 (en) 2001-09-27 2004-07-13 Unitivie International Limited Methods of forming metallurgy structures for wire and solder bonding
EP1367646A1 (fr) * 2002-05-23 2003-12-03 Valtronic S.A. Module électronique
US7547623B2 (en) 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
AU2003256360A1 (en) 2002-06-25 2004-01-06 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US7531898B2 (en) 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
TWI225899B (en) 2003-02-18 2005-01-01 Unitive Semiconductor Taiwan C Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer
JP4406300B2 (ja) * 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
US7427557B2 (en) 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
JP4061551B2 (ja) * 2004-03-24 2008-03-19 サンケン電気株式会社 半導体装置
TW200603698A (en) 2004-04-13 2006-01-16 Unitive International Ltd Methods of forming solder bumps on exposed metal pads and related structures
US7700409B2 (en) 2004-05-24 2010-04-20 Honeywell International Inc. Method and system for stacking integrated circuits
US7863720B2 (en) 2004-05-24 2011-01-04 Honeywell International Inc. Method and system for stacking integrated circuits
FR2873853B1 (fr) * 2004-07-27 2006-12-15 St Microelectronics Sa Dispositif electronique comprenant plusieurs plaquettes de circuits empilees et procede de realisation d'un tel dispositif
JP4509052B2 (ja) 2005-03-29 2010-07-21 三洋電機株式会社 回路装置
SG130055A1 (en) 2005-08-19 2007-03-20 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
US7932615B2 (en) 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
JP5559452B2 (ja) 2006-12-20 2014-07-23 富士通セミコンダクター株式会社 半導体装置及びその製造方法
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
TWI799312B (zh) * 2022-07-05 2023-04-11 瑞昱半導體股份有限公司 輸出入埠電路及其晶片

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100379608B1 (ko) * 1999-02-17 2003-04-10 샤프 가부시키가이샤 반도체장치 및 그의 제조방법
US7276437B2 (en) 1999-02-17 2007-10-02 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof
US7528011B2 (en) 1999-02-17 2009-05-05 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof
KR100386995B1 (ko) * 2000-01-17 2003-06-12 미쓰비시덴키 가부시키가이샤 반도체 장치 및 그 배선 방법
US7071574B1 (en) 2000-01-17 2006-07-04 Renesas Technology Corp. Semiconductor device and its wiring method
US7288837B2 (en) 2000-01-17 2007-10-30 Renesas Technology Corp. Semiconductor device and its writing method
US7547963B2 (en) 2000-01-17 2009-06-16 Renesas Technology Corp. Semiconductor device and its wiring method
KR100464561B1 (ko) * 2000-04-11 2004-12-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 이것의 제조방법
US8907383B2 (en) 2012-12-20 2014-12-09 SK Hynix Inc. Stack packages having token ring loops

Also Published As

Publication number Publication date
TW315515B (enExample) 1997-09-11
JPH09186289A (ja) 1997-07-15
EP0782191A2 (en) 1997-07-02

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