KR970030385A - 반도체 장치의 콘택홀 형성방법 - Google Patents

반도체 장치의 콘택홀 형성방법 Download PDF

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Publication number
KR970030385A
KR970030385A KR1019950042471A KR19950042471A KR970030385A KR 970030385 A KR970030385 A KR 970030385A KR 1019950042471 A KR1019950042471 A KR 1019950042471A KR 19950042471 A KR19950042471 A KR 19950042471A KR 970030385 A KR970030385 A KR 970030385A
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KR
South Korea
Prior art keywords
forming
contact hole
film
semiconductor device
mask
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Application number
KR1019950042471A
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English (en)
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KR100192974B1 (ko
Inventor
차승준
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김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950042471A priority Critical patent/KR100192974B1/ko
Publication of KR970030385A publication Critical patent/KR970030385A/ko
Application granted granted Critical
Publication of KR100192974B1 publication Critical patent/KR100192974B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 반도체 장치의 콘택홀 또는 비아(VIA)를 형성시 식각 마스크의 접착력 약화로 인한 수평 방향의 식각률 상승을 방지토록 한 반도체 장치의 콘택홀 형성 방법에 관한 것으로서, 반도체 장치의 절연막에 콘택홀을 형성함에 있어서, 상기 절연막의 표면을 과산화수소로 처리하는 단계; 상기 절연막의 상부에 콘택홀 형성을 위한 감광막 패턴을 형성하는 단계; 상기 감광막을 마스크로 절연막을 부분적으로 건식식각하는 단계; 상기 건식 식각시 발생한 반응성 생성물과 상기 감광막을 마스크로하여 절연막을 부분적으로 습식 식각하는 단계; 및 상기 습식 식각된 절연막을 통하여 절연막의 하부층이 노출될 때까지 건식 식각하는 단계로 구성된 것이다.

Description

반도체 장치의 콘택홀 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 반도체 장치의 콘택홀 형성 공정도.

Claims (1)

  1. 반도체 장치의 절연막에 콘택홀을 형성함에 있어서, 상기 절연막의 표면을 과산화수소로 처리하는 단계; 상기 절연막의 상부에 콘택홀 형성을 위한 감광막 패턴을 형성하는 단계; 상기 감광막을 마스크로 절연막을 부분적으로 건식 식각하는 단계; 상기 건식 식각시 발생한 반응성 생성물과 상기 강광막을 마스크로하여 절연막을 부분적으로 습식 식각하는 단계; 및 상기 습식 식각된 절연막을 통하여 절연막의 하부층이 노출될 때까지 건식 식각하는 단계로 구성된 것을 특징으로 하는 반도체 장치의 콘택홀 형성 방법.
KR1019950042471A 1995-11-21 1995-11-21 반도체장치의 콘택홀 형성방법 KR100192974B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950042471A KR100192974B1 (ko) 1995-11-21 1995-11-21 반도체장치의 콘택홀 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950042471A KR100192974B1 (ko) 1995-11-21 1995-11-21 반도체장치의 콘택홀 형성방법

Publications (2)

Publication Number Publication Date
KR970030385A true KR970030385A (ko) 1997-06-26
KR100192974B1 KR100192974B1 (ko) 1999-06-15

Family

ID=19434893

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950042471A KR100192974B1 (ko) 1995-11-21 1995-11-21 반도체장치의 콘택홀 형성방법

Country Status (1)

Country Link
KR (1) KR100192974B1 (ko)

Also Published As

Publication number Publication date
KR100192974B1 (ko) 1999-06-15

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