KR970013051A - 반도체 소자의 콘택홀 형성 방법 - Google Patents

반도체 소자의 콘택홀 형성 방법 Download PDF

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Publication number
KR970013051A
KR970013051A KR1019950026990A KR19950026990A KR970013051A KR 970013051 A KR970013051 A KR 970013051A KR 1019950026990 A KR1019950026990 A KR 1019950026990A KR 19950026990 A KR19950026990 A KR 19950026990A KR 970013051 A KR970013051 A KR 970013051A
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South Korea
Prior art keywords
contact hole
forming
spacer
conductive layer
insulating layer
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KR1019950026990A
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English (en)
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KR0171733B1 (ko
Inventor
김상욱
이해정
Original Assignee
김주용
현대전자산업주식회사
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Application filed by 김주용, 현대전자산업주식회사 filed Critical 김주용
Priority to KR1019950026990A priority Critical patent/KR0171733B1/ko
Priority to TW085110470A priority patent/TW374203B/zh
Priority to CN96113323A priority patent/CN1077725C/zh
Priority to US08/697,834 priority patent/US5767019A/en
Publication of KR970013051A publication Critical patent/KR970013051A/ko
Application granted granted Critical
Publication of KR0171733B1 publication Critical patent/KR0171733B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/30—Reducing waste in manufacturing processes; Calculations of released waste quantities

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 콘택홀 형성 방법에 있어서; 전도층 상에 층간절연용 제1절연막을 형성하는 제1단계 ; 콘택홀 마스크를 사용하여 상기 전도층의 일부가 노출되도록 상기 제1절연막을 건식식각하는 제2단계; 전체구조 상부에 스페이서용 제2절연막을 형성하는 제3단계; 및 전체구조 상부를 마스크 사용없이 전면식각하여 건식식각된 부위의 상기 제1절연막 측벽에 제2절연막 스페이서를 형성하는 제4단계를 포함하여, 콘택홀의 개구부가 넓어지도록 하는 것을 특징으로 하는 반도체 소자의 콘택홀 형성 방법에 관한 것으로, SOSCON 식각 공정을 통하여 통상적인 I-LINE 노광기술로도 0.2㎛ 이하의 미세 콘택홀을 형성할 수 있으며, 콘택홀 입구 부위를 경사지게 하여 넓혀 줌으로써 후속 증착 공정의 불량한 층 덮힘(Step Coverage) 특성을 보완할 수 있다. 또한 동일한 두께의 스페이서 산화막을 식각하므로 하부전도층의 손실도 안정적으로 조절할 수 있고, 스페이서에 의해 콘택홀 측벽에 요철생성을 방지하므로써, 결국 소자의 신뢰성 및 수율을 향상시키는 효과가 있다.

Description

반도체 소자의 콘택홀 형성 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4A도 내지 제4C도는 본 발명의 일실시예에 따른 콘택홀 형성 공정도.

Claims (2)

  1. 반도체 소자의 콘택홀 형성 방법에 있어서; 전도층 상에 층간절연용 제1절연막을 형성하는 제1단계; 콘택홀 마스크를 사용하여 상기 전도층의 일부가 노출되도록 상기 제1절연막을 건식식각하는 제2단계 ; 전체구조 상에 스페이서용 제2절연막을 형성하는 제3단계 ; 및 전체구조 상부를 마스크 사용없이 전면식각하여 건식식각된 부위의 상기 제1절연막 측벽에 제2절연막 스페이서를 형성하는 제4단계를 포함하여, 콘택홀의 개구부가 넓어지도록 하는 것을 특징으로 하는 반도체 소자의 콘택홀 형성 방법.
  2. 제1항에 있어서, 상기 제4단계는, 가열 실리콘 루프(Roof)가 장착된 ICP(Inductively Couplerd Plasma) 방식의 공정 챔버에서 이루어지는 것을 특징으로 하는 반도체 소자의 콘택홀 형성 방법.
KR1019950026990A 1995-08-28 1995-08-28 반도체 소자의 콘택홀 형성 방법 KR0171733B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019950026990A KR0171733B1 (ko) 1995-08-28 1995-08-28 반도체 소자의 콘택홀 형성 방법
TW085110470A TW374203B (en) 1995-08-28 1996-08-28 A method for forming a fine contact hole in a semiconductor device
CN96113323A CN1077725C (zh) 1995-08-28 1996-08-28 一种在半导体器件中形成精细接触孔的方法
US08/697,834 US5767019A (en) 1995-08-28 1996-08-28 Method for forming a fine contact hole in a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950026990A KR0171733B1 (ko) 1995-08-28 1995-08-28 반도체 소자의 콘택홀 형성 방법

Publications (2)

Publication Number Publication Date
KR970013051A true KR970013051A (ko) 1997-03-29
KR0171733B1 KR0171733B1 (ko) 1999-03-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950026990A KR0171733B1 (ko) 1995-08-28 1995-08-28 반도체 소자의 콘택홀 형성 방법

Country Status (4)

Country Link
US (1) US5767019A (ko)
KR (1) KR0171733B1 (ko)
CN (1) CN1077725C (ko)
TW (1) TW374203B (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6159862A (en) * 1997-12-27 2000-12-12 Tokyo Electron Ltd. Semiconductor processing method and system using C5 F8
US6228279B1 (en) * 1998-09-17 2001-05-08 International Business Machines Corporation High-density plasma, organic anti-reflective coating etch system compatible with sensitive photoresist materials
US7687407B2 (en) * 2004-12-02 2010-03-30 Texas Instruments Incorporated Method for reducing line edge roughness for conductive features
CN102087963B (zh) * 2009-12-04 2013-08-14 无锡华润上华半导体有限公司 多晶硅层的蚀刻方法
CN103219304A (zh) * 2013-04-19 2013-07-24 昆山西钛微电子科技有限公司 半导体晶圆级封装结构及其制备方法
CN104979274B (zh) * 2014-04-04 2018-08-10 中芯国际集成电路制造(上海)有限公司 硅通孔形成方法
CN105789111B (zh) * 2014-12-18 2019-03-12 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
CN107390391A (zh) * 2017-06-20 2017-11-24 武汉华星光电技术有限公司 一种过孔的制作方法
CN113130382B (zh) * 2020-01-16 2022-03-08 长鑫存储技术有限公司 半导体器件及其制备方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59181614A (ja) * 1983-03-31 1984-10-16 Toshiba Corp 半導体装置の製造方法
IT1225636B (it) * 1988-12-15 1990-11-22 Sgs Thomson Microelectronics Metodo di scavo con profilo di fondo arrotondato per strutture di isolamento incassate nel silicio
US5556501A (en) * 1989-10-03 1996-09-17 Applied Materials, Inc. Silicon scavenger in an inductively coupled RF plasma reactor
KR920015542A (ko) * 1991-01-14 1992-08-27 김광호 반도체장치의 다층배선형성법
US5477975A (en) * 1993-10-15 1995-12-26 Applied Materials Inc Plasma etch apparatus with heated scavenging surfaces
JPH0832053A (ja) * 1994-07-12 1996-02-02 Fujitsu Ltd 半導体装置の製造方法
JP3049228B2 (ja) * 1998-04-27 2000-06-05 株式会社アイエス フラッシュバルブ開閉装置

Also Published As

Publication number Publication date
KR0171733B1 (ko) 1999-03-30
CN1077725C (zh) 2002-01-09
TW374203B (en) 1999-11-11
US5767019A (en) 1998-06-16
CN1149759A (zh) 1997-05-14

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