KR970008662A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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KR970008662A
KR970008662A KR1019950019935A KR19950019935A KR970008662A KR 970008662 A KR970008662 A KR 970008662A KR 1019950019935 A KR1019950019935 A KR 1019950019935A KR 19950019935 A KR19950019935 A KR 19950019935A KR 970008662 A KR970008662 A KR 970008662A
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South Korea
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forming
insulating film
film
semiconductor
gate
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KR1019950019935A
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KR100360873B1 (ko
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김근호
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구자홍
Lg 전자 주식회사
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

본 발명은 박막트랜지스터(이하, TFT라 한다) 제조방법에 관한 것으로, 반도체기판 상에 반도체 섬을 형성하는 공정과; 상기 반도체 섬을 포함한 기판 전면에 게이트 절연막을 형성하는 공정과; 상기 게이트 절연막 상에 T형 게이트를 형성하는 공정과; 상기 T형 게이트를 마스크로 반도체 섬 내에 이온주입영역을 형성하는 공정과; 상기 T형 게이트가 형성된 패턴 전면에 층간절연막을 형성한 후, 이를 선택식각하여 상기 이온주입영역의 소정부분 드러나도록 콘택 홀을 형성하는 공정 및; 상기 콘택 홀에 소오스/드레인 전극을 형성하는 공정을 구비하여 소자 제조를 완료하므로써, 감광막 패턴 형성 공정 없이도 자기정렬에 의해 오프-셋(off-set)구조의 박막트랜지스터를 제조할 수 있게 되어 소자 제조에 있어서의 정밀도를 향상시킬 수 있을 뿐 아니라 동시에 종래 오프-셋 구조에서 정렬(align)불량으로 인해 야기되던 소오스/드레인 비대칭 구조를 방지할 수 있으며, 또한 상기 공정을 액정표시장치의 픽셀(pixed) 구동용 TFT에도 적용할 수 있는 잇점을 가진다.

Description

박막트랜지스터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2(가)도 내지 제2(바)도는 본 발명에 따른 박막트랜지스터 제조방법을 도시한 공정수순도.

Claims (5)

  1. 반도체기판 상에 반도체 섬을 형성하는 공정과; 상기 반도체 섬을 포함한기판 전면에 게이트 절연막을 형성하는 공정과; 상기 게이트 절연막 상에 T형 게이트를 형성하는 공정과; 상기 T형 게이트를 마스크로 반도체 섬 내에 이온주입영역을 형성하는 공정과; 상기 T형 게이트가 형성된 패턴 전면에 층간절연막을 형성한 후, 이를 선택식각하여 상기 이온주입영역의 소정부분 드러나도록 콘택 홀을 형성하는 공정 및; 상기 콘택홀에 소오스/드레인 전극을 형성하는 공정을 구비하여 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  2. 제1항에 있어서, 상기 T형 게이트 상기 게이트 절연막 상에 화학 기상증착법으로 도프드-Si막을 중착하는 공정과; 상기 도프드-Si막 상에 스퍼터법으로 WSi2.2막을 증착하는 공정 및; SF6및 Cl2가스를 이용하여 상기 도프트-Si막 및 WSi2.2막을 건식식각하는 공정을 더 포함하여 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  3. 제2항에 있어서, 상기 도프드-Si막은 2500Å 두께로 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  4. 제2항에 있어서, 상기 WSi2.2막은 1500Å 두께로 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
  5. 제2항에 있어서, 상기 도프드-Si은 n+다결정 Si로 형성되는 것을 특징으로 하는 박막트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950019935A 1995-07-07 1995-07-07 박막트랜지스터제조방법 KR100360873B1 (ko)

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KR1019950019935A KR100360873B1 (ko) 1995-07-07 1995-07-07 박막트랜지스터제조방법

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KR1019950019935A KR100360873B1 (ko) 1995-07-07 1995-07-07 박막트랜지스터제조방법

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6337284B1 (en) 1999-05-27 2002-01-08 Lg. Philips Lcd Co., Ltd. Liquid crystal display device and method of manufacturing the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4876548B2 (ja) 2005-11-22 2012-02-15 セイコーエプソン株式会社 電気光学装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180870A (ja) * 1984-09-27 1986-04-24 Nec Corp 半導体トランジスタおよびその製造方法
JP3230351B2 (ja) * 1993-09-14 2001-11-19 ソニー株式会社 積み上げ拡散層型mos半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100333274B1 (ko) * 1998-11-24 2002-04-24 구본준, 론 위라하디락사 액정표시장치 및 그 제조방법
US6337284B1 (en) 1999-05-27 2002-01-08 Lg. Philips Lcd Co., Ltd. Liquid crystal display device and method of manufacturing the same

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