KR970008360A - 집적회로 제조 방법 - Google Patents

집적회로 제조 방법 Download PDF

Info

Publication number
KR970008360A
KR970008360A KR1019960027223A KR19960027223A KR970008360A KR 970008360 A KR970008360 A KR 970008360A KR 1019960027223 A KR1019960027223 A KR 1019960027223A KR 19960027223 A KR19960027223 A KR 19960027223A KR 970008360 A KR970008360 A KR 970008360A
Authority
KR
South Korea
Prior art keywords
layer
conductive layer
conductive
substrate
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019960027223A
Other languages
English (en)
Korean (ko)
Inventor
치티페디 사일리쉬
만신 머천트 사일리쉬
Original Assignee
제이. 티. 레버그
에이티앤드티 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 제이. 티. 레버그, 에이티앤드티 코포레이션 filed Critical 제이. 티. 레버그
Publication of KR970008360A publication Critical patent/KR970008360A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
KR1019960027223A 1995-07-07 1996-07-05 집적회로 제조 방법 Ceased KR970008360A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49950995A 1995-07-07 1995-07-07
US08/499,509 1995-07-07

Publications (1)

Publication Number Publication Date
KR970008360A true KR970008360A (ko) 1997-02-24

Family

ID=23985538

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960027223A Ceased KR970008360A (ko) 1995-07-07 1996-07-05 집적회로 제조 방법

Country Status (5)

Country Link
US (1) US5798300A (enExample)
EP (1) EP0752718A3 (enExample)
JP (1) JPH0936063A (enExample)
KR (1) KR970008360A (enExample)
TW (1) TW298674B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69736717T2 (de) * 1996-12-12 2007-09-13 Asahi Kasei Kabushiki Kaisha Verfahren zur herstellung einer halbleitervorrichtung
US6365514B1 (en) * 1997-12-23 2002-04-02 Intel Corporation Two chamber metal reflow process
US6440082B1 (en) * 1999-09-30 2002-08-27 Medtronic Physio-Control Manufacturing Corp. Method and apparatus for using heart sounds to determine the presence of a pulse
US6747445B2 (en) 2001-10-31 2004-06-08 Agere Systems Inc. Stress migration test structure and method therefor
US20030207558A1 (en) * 2002-05-06 2003-11-06 Taiwan Semiconductor Manufacturing Co., Ltd. Method forming copper containing semiconductor features to prevent thermally induced defects

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5219788A (en) * 1991-02-25 1993-06-15 Ibm Corporation Bilayer metallization cap for photolithography
DE4200809C2 (de) * 1991-03-20 1996-12-12 Samsung Electronics Co Ltd Verfahren zur Bildung einer metallischen Verdrahtungsschicht in einem Halbleiterbauelement
CA2061119C (en) * 1991-04-19 1998-02-03 Pei-Ing P. Lee Method of depositing conductors in high aspect ratio apertures
US5171412A (en) * 1991-08-23 1992-12-15 Applied Materials, Inc. Material deposition method for integrated circuit manufacturing
US5300813A (en) * 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US5358616A (en) * 1993-02-17 1994-10-25 Ward Michael G Filling of vias and contacts employing an aluminum-germanium alloy
JP2928057B2 (ja) * 1993-07-01 1999-07-28 日本電気株式会社 半導体装置の製造方法
US5356836A (en) * 1993-08-19 1994-10-18 Industrial Technology Research Institute Aluminum plug process
US5427666A (en) * 1993-09-09 1995-06-27 Applied Materials, Inc. Method for in-situ cleaning a Ti target in a Ti + TiN coating process
US5360995A (en) * 1993-09-14 1994-11-01 Texas Instruments Incorporated Buffered capped interconnect for a semiconductor device
US5470790A (en) * 1994-10-17 1995-11-28 Intel Corporation Via hole profile and method of fabrication
US5604157A (en) * 1995-05-25 1997-02-18 Industrial Technology Research Institute Reduced notching of polycide gates using silicon anti reflection layer

Also Published As

Publication number Publication date
TW298674B (enExample) 1997-02-21
US5798300A (en) 1998-08-25
EP0752718A2 (en) 1997-01-08
JPH0936063A (ja) 1997-02-07
EP0752718A3 (en) 1997-03-05

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PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

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PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E601 Decision to refuse application
PE0601 Decision on rejection of patent

St.27 status event code: N-2-6-B10-B15-exm-PE0601

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000