KR970004334A - 타이밍 신호 발생 회로 - Google Patents

타이밍 신호 발생 회로 Download PDF

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Publication number
KR970004334A
KR970004334A KR1019960022227A KR19960022227A KR970004334A KR 970004334 A KR970004334 A KR 970004334A KR 1019960022227 A KR1019960022227 A KR 1019960022227A KR 19960022227 A KR19960022227 A KR 19960022227A KR 970004334 A KR970004334 A KR 970004334A
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KR
South Korea
Prior art keywords
circuit
timing signal
delay
variable delay
track
Prior art date
Application number
KR1019960022227A
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English (en)
Other versions
KR100201709B1 (ko
Inventor
신이치 요코타
도시유키 오카야스
Original Assignee
오우라 히로시
가부시키가이샤 아드반테스트
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Application filed by 오우라 히로시, 가부시키가이샤 아드반테스트 filed Critical 오우라 히로시
Publication of KR970004334A publication Critical patent/KR970004334A/ko
Application granted granted Critical
Publication of KR100201709B1 publication Critical patent/KR100201709B1/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191—Calibration
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution
    • G—PHYSICS
    • G04—HOROLOGY
    • G04F—TIME-INTERVAL MEASURING
    • G04F10/00—Apparatus for measuring unknown time intervals by electric means
    • G04F10/06—Apparatus for measuring unknown time intervals by electric means by measuring phase
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

복수의 미소 가변 지연 회로로 이루어지는 가변 지연 회로를 위상 비교기에 따른 귀환 제어에 의해 안정화한 타이밍 신호 발생 회로의 지연 시간 측정을 루프 발진법으로 행하고, 고정밀도의 데이타를 단시간에 얻는다. 이 때문에, 타이밍 신호 발생 회로의 귀환 제어루프에 트랙/홀드 회로(170)를 설치하여, 통상의 타이밍 신호 발생 동작시는 트랙/홀드 회로(170)의 트랙 동작에 의해 귀환 제어 기능을 작동시켜서 가변 지연 회로(120)의 지연 시간을 안정화하는 지연 시간 측정을 위한 루프 발진 동작시에는 트랙/홀드 회로(170)의 홀드 동작에 의해 귀환 제어 기능을 정지하고, 가변 지연 회로(120)의 지연 시간을 고정하여 루프 발진법에 의해 지연 시간의 측정을 행한다.

Description

타이밍 신호 발생 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 타이밍 신호 발생 회로의 일실시예를 도시하는 블록도.

Claims (2)

  1. 전자기기에 사용하는 클록 신호를 기준으로 하여, 위상 동기 루프 회로에 의한 귀환 제어에 의해 안정화된 가변 지연 회로를 사용하여 타이밍 신호를 발생하는 타이밍 신호 발생 회로에 있어서, 위상 동기 루프 회로내에, 귀환 회로(150)의 출력을 받으며 트랙·홀드 제어 신호에 의해 제어되며 가변 지연 회로(120)로 지연 제어 신호를 출력하는 트랙·홀드 회로(170)를 구비한 것을 특징으로 하는 타이밍 신호 발생 회로.
  2. 클록 신호를 기준으로 하여 위상 동기 루프 회로(100)에 의한 귀환 제어(150)에 의해 안정화된 가변 지연 회로(120)를 사용하여 타이밍 신호를 발생하는 동시에, 상기 가변 지연 회로(120)와 펄스 주입 귀환 회로(300)를 포함시켜서 루프 회로를 형성하여 지연 시간을 측정하는 타이밍 신호 발생 회로에 있어서, 위상 동기 루프 회로(100)내에, 귀환 회로(150)의 출력을 받으며 트랙·홀드 제어 신호에 의해 홀드 제어되며 가변 지연 회로(120)로 지연 제어 신호를 출력하는 트랙·홀드 회로(170)를 구비하며, 가변 지연 회로의 지연량을 고정하여 루프 회로의 지연 시간을 측정할 수 있는 것을 특징으로 하는 타이밍 신호 발생 회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960022227A 1995-06-22 1996-06-19 타이밍 신호 발생 회로 KR100201709B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP17946295A JP3499051B2 (ja) 1995-06-22 1995-06-22 タイミング信号発生回路
JP95-179462 1995-06-22

Publications (2)

Publication Number Publication Date
KR970004334A true KR970004334A (ko) 1997-01-29
KR100201709B1 KR100201709B1 (ko) 1999-06-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960022227A KR100201709B1 (ko) 1995-06-22 1996-06-19 타이밍 신호 발생 회로

Country Status (5)

Country Link
US (1) US5712582A (ko)
JP (1) JP3499051B2 (ko)
KR (1) KR100201709B1 (ko)
DE (1) DE19625225C2 (ko)
TW (2) TW350956B (ko)

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Also Published As

Publication number Publication date
DE19625225A1 (de) 1997-01-02
JPH095408A (ja) 1997-01-10
TW350956B (en) 1999-01-21
JP3499051B2 (ja) 2004-02-23
TW319925B (ko) 1997-11-11
US5712582A (en) 1998-01-27
KR100201709B1 (ko) 1999-06-15
DE19625225C2 (de) 1999-10-14

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