KR960039241A - 반도체 디바이스 제조방법 - Google Patents

반도체 디바이스 제조방법 Download PDF

Info

Publication number
KR960039241A
KR960039241A KR1019960012765A KR19960012765A KR960039241A KR 960039241 A KR960039241 A KR 960039241A KR 1019960012765 A KR1019960012765 A KR 1019960012765A KR 19960012765 A KR19960012765 A KR 19960012765A KR 960039241 A KR960039241 A KR 960039241A
Authority
KR
South Korea
Prior art keywords
electrode
bonding
carrier tape
film carrier
semiconductor device
Prior art date
Application number
KR1019960012765A
Other languages
English (en)
Other versions
KR100198682B1 (ko
Inventor
찌카라 야마시타
Original Assignee
가네꼬 히사시
닛폰 덴키 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가네꼬 히사시, 닛폰 덴키 주식회사 filed Critical 가네꼬 히사시
Publication of KR960039241A publication Critical patent/KR960039241A/ko
Application granted granted Critical
Publication of KR100198682B1 publication Critical patent/KR100198682B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/86Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79Apparatus for Tape Automated Bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

필름 캐리어 테이프에 구비된 내부 리드, 혹은 랜드와 IC 칩 상에 구비된 전극 패드를 낮은 온도의 갱 본딩 방법에 의해 동시에 임시 접합시키고, 그후 상기의 임시 접합 부분이 포인트 본딩 방법에 의해 연속적으로 접합되는 단계를 포함하는 반도체 디바이스 생산 방법을 제시하였다. 이 방법은, 갱 본딩 지그의 정확성 결여와, 포인트 본딩이 수행되는 동안 가해진 열 때문에 생긴 필름의 변형에 따른 영향으로 국소적으로만 가해지는 하중과 열에 의한 나쁜 효과를 감소시켜 줌으로써, 반도체 디바이스의 생산성을 향상시키는데 기여할 수 있다.

Description

반도체 디바이스 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도는 본 발명에 따른 제1실시예에 관한 일련의 절차를 도시한 평면도, 제1B도는 제1C도는 본 발명에 따른 제1실시예에 관한 일련의 절차를 도시한 단면도.

Claims (6)

  1. 필름 캐리어 테이프에 형성된 내부 리드를 IC칩상에 형성된 전극과 정렬시키며, 상기 전극 위로 상기 내부 리드를 올려놓는 단계와, 상기 내부 리드와 상기 전극을 낮은 온도의 갱 본딩지그로서 임시로 접합시키는 단계와, 상기 내부 리드와 상기 전극의 임시로 접합된 부분을 포인트 본딩 지그로서 연속적으로 접합시키는 단계로 구성되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
  2. 제1항에 있어서, 상기 전극과 상기 내부 리드가 서로 접합되는 위치와 일치되는 위치에 돌기가 형성된 갱 본딩 지그를 사용하는 것을 특징으로 하는 반도체 디바이스 제조 방법.
  3. 제1항에 있어서, 상기 갱 본딩 지그와 상기 포인트 본딩 지그증 적어도 한쪽에 고주파 진동을 인가하는 단계를 추가로 구비하는 것을 특징으로 하는 반도체 디바이스 제조 방법.
  4. 제1항에 있어서, 상기 갱 본딩 지그는 380℃ 내지 420℃ 사이의 온도로 가열되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
  5. 필름 캐리어 테이프에 형성된 관통홀을 IC칩에 형성된 전극과 정렬시키며 전극에 관통홀을 올려놓는 단계와, 접착 필름을 유입시켜, 상기 필름 캐리어 테이프와 상기 IC칩을 접착시키기 위해 상기 필름 캐리어 테이프에 구비된 열 가소성 접착제를 가열하는 동안, 상기 전극과, 상기 관통홀을 채우는 금속층을 임시로 접합시키는 단계와, 상기 전극과 상기 금속층의 임시로 접합된 부분을 포인트 본딩 지그로서 연속적으로 접합시키는 단계로 구성되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
  6. 제5항에 있어서, 상기 포인트 본딩 지그에 고주파 진동을 인가시키는 단계를 추가로 구비하는 것을 특징으로 하는 반도체 디바이스 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960012765A 1995-04-21 1996-04-19 반도체 디바이스 제조방법 KR100198682B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-96465 1995-04-21
JP7096465A JP2626621B2 (ja) 1995-04-21 1995-04-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR960039241A true KR960039241A (ko) 1996-11-21
KR100198682B1 KR100198682B1 (ko) 1999-06-15

Family

ID=14165788

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960012765A KR100198682B1 (ko) 1995-04-21 1996-04-19 반도체 디바이스 제조방법

Country Status (3)

Country Link
US (1) US5643802A (ko)
JP (1) JP2626621B2 (ko)
KR (1) KR100198682B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351038B1 (ko) * 1999-10-11 2002-08-30 밍-퉁 쉔 반도체 장치 및 그 제조 방법

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100186333B1 (ko) * 1996-06-20 1999-03-20 문정환 칩 사이즈 반도체 패키지 및 그 제조방법
EP1109214A1 (de) * 1999-12-16 2001-06-20 Infineon Technologies AG Anordnung und Verfahren zur Kontaktierung von Schaltkreisen
JP3980386B2 (ja) 2002-03-18 2007-09-26 富士通株式会社 重ね合わせ部品の加熱方法および加熱装置
JP4264388B2 (ja) * 2004-07-01 2009-05-13 富士通株式会社 半導体チップの接合方法および接合装置
JP4663609B2 (ja) * 2006-09-25 2011-04-06 富士通株式会社 重ね合わせ部品の加熱方法および加熱装置
JP5076163B2 (ja) * 2007-07-24 2012-11-21 株式会社アドウェルズ 超音波振動接合方法および超音波振動接合装置
US20090279275A1 (en) * 2008-05-09 2009-11-12 Stephen Peter Ayotte Method of attaching an integrated circuit chip to a module
KR20130055220A (ko) * 2011-11-18 2013-05-28 삼성전자주식회사 동박적층판 및 이를 사용한 금속코어기판의 제조방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3650454A (en) * 1967-07-06 1972-03-21 Western Electric Co Device for bonding with a compliant medium
US3697828A (en) * 1970-12-03 1972-10-10 Gen Motors Corp Geometry for a pnp silicon transistor with overlay contacts
US4295912A (en) * 1978-07-03 1981-10-20 National Semiconductor Corporation Apparatus and process for laminating composite tape
US4209355A (en) * 1978-07-26 1980-06-24 National Semiconductor Corporation Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices
GB8624513D0 (en) * 1986-10-13 1986-11-19 Microelectronics & Computer Single point bonding method
US5569956A (en) * 1995-08-31 1996-10-29 National Semiconductor Corporation Interposer connecting leadframe and integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100351038B1 (ko) * 1999-10-11 2002-08-30 밍-퉁 쉔 반도체 장치 및 그 제조 방법

Also Published As

Publication number Publication date
JPH08293530A (ja) 1996-11-05
KR100198682B1 (ko) 1999-06-15
JP2626621B2 (ja) 1997-07-02
US5643802A (en) 1997-07-01

Similar Documents

Publication Publication Date Title
KR960012397A (ko) 칩 사이즈 패키지형 반도체 장치의 제조 방법
EP0860871A3 (en) Method of manufacturing semiconductor device
KR960039241A (ko) 반도체 디바이스 제조방법
KR890011039A (ko) 전극의 접속방법
SG77704A1 (en) Semiconductor device and method of fabricating the same
MY123941A (en) Semiconductor device, tab tape for semiconductor device, method of manufacturing the tab tape and method of manufacturing the semiconductor device
KR930024140A (ko) 반도체장치 및 그 제조방법
JPH11145336A (ja) バンプ付電子部品の実装構造および実装方法
JPS62202548A (ja) 半導体装置
JPH0831967A (ja) 半導体装置のパッケージ構造
JPS6419737A (en) Multilayer interconnection tape carrier
KR940027134A (ko) 반도체집적회로장치의 제조방법
US5075254A (en) Method and apparatus for reducing die stress
KR970072337A (ko) 폴리이미드의 불완전 경화 상태를 이용한 리드 온 칩형 반도체 칩 패키지의 리드와 반도체 칩 부착 방법
KR940016700A (ko) 플라스틱-몰드형 중공 반도체장치 및 그 제조공정
KR910007119A (ko) 리드프레임 및 그 제조방법
JPS6386530A (ja) 半導体装置の製造方法
JP2617638B2 (ja) 半導体装置用リードフレーム
JPH01309336A (ja) 半導体容器
JP3381564B2 (ja) バンプ付チップの実装方法
JPS6459843A (en) Semiconductor device
JP3059408B2 (ja) 半導体チップ部品の実装方法及び半導体チップ部品の実装体
KR900017134A (ko) 태브테이프에의 반도체소자 접합방법
JPS5821360A (ja) 半導体装置の製造方法
JPS5852855A (ja) キヤツプ接着方法

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030224

Year of fee payment: 5

LAPS Lapse due to unpaid annual fee