KR960039241A - 반도체 디바이스 제조방법 - Google Patents
반도체 디바이스 제조방법 Download PDFInfo
- Publication number
- KR960039241A KR960039241A KR1019960012765A KR19960012765A KR960039241A KR 960039241 A KR960039241 A KR 960039241A KR 1019960012765 A KR1019960012765 A KR 1019960012765A KR 19960012765 A KR19960012765 A KR 19960012765A KR 960039241 A KR960039241 A KR 960039241A
- Authority
- KR
- South Korea
- Prior art keywords
- electrode
- bonding
- carrier tape
- film carrier
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract 5
- 238000004519 manufacturing process Methods 0.000 title claims abstract 3
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims 2
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 229920001169 thermoplastic Polymers 0.000 claims 1
- 239000004416 thermosoftening plastic Substances 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/79—Apparatus for Tape Automated Bonding [TAB]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
필름 캐리어 테이프에 구비된 내부 리드, 혹은 랜드와 IC 칩 상에 구비된 전극 패드를 낮은 온도의 갱 본딩 방법에 의해 동시에 임시 접합시키고, 그후 상기의 임시 접합 부분이 포인트 본딩 방법에 의해 연속적으로 접합되는 단계를 포함하는 반도체 디바이스 생산 방법을 제시하였다. 이 방법은, 갱 본딩 지그의 정확성 결여와, 포인트 본딩이 수행되는 동안 가해진 열 때문에 생긴 필름의 변형에 따른 영향으로 국소적으로만 가해지는 하중과 열에 의한 나쁜 효과를 감소시켜 줌으로써, 반도체 디바이스의 생산성을 향상시키는데 기여할 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도는 본 발명에 따른 제1실시예에 관한 일련의 절차를 도시한 평면도, 제1B도는 제1C도는 본 발명에 따른 제1실시예에 관한 일련의 절차를 도시한 단면도.
Claims (6)
- 필름 캐리어 테이프에 형성된 내부 리드를 IC칩상에 형성된 전극과 정렬시키며, 상기 전극 위로 상기 내부 리드를 올려놓는 단계와, 상기 내부 리드와 상기 전극을 낮은 온도의 갱 본딩지그로서 임시로 접합시키는 단계와, 상기 내부 리드와 상기 전극의 임시로 접합된 부분을 포인트 본딩 지그로서 연속적으로 접합시키는 단계로 구성되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
- 제1항에 있어서, 상기 전극과 상기 내부 리드가 서로 접합되는 위치와 일치되는 위치에 돌기가 형성된 갱 본딩 지그를 사용하는 것을 특징으로 하는 반도체 디바이스 제조 방법.
- 제1항에 있어서, 상기 갱 본딩 지그와 상기 포인트 본딩 지그증 적어도 한쪽에 고주파 진동을 인가하는 단계를 추가로 구비하는 것을 특징으로 하는 반도체 디바이스 제조 방법.
- 제1항에 있어서, 상기 갱 본딩 지그는 380℃ 내지 420℃ 사이의 온도로 가열되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
- 필름 캐리어 테이프에 형성된 관통홀을 IC칩에 형성된 전극과 정렬시키며 전극에 관통홀을 올려놓는 단계와, 접착 필름을 유입시켜, 상기 필름 캐리어 테이프와 상기 IC칩을 접착시키기 위해 상기 필름 캐리어 테이프에 구비된 열 가소성 접착제를 가열하는 동안, 상기 전극과, 상기 관통홀을 채우는 금속층을 임시로 접합시키는 단계와, 상기 전극과 상기 금속층의 임시로 접합된 부분을 포인트 본딩 지그로서 연속적으로 접합시키는 단계로 구성되는 것을 특징으로 하는 반도체 디바이스 제조 방법.
- 제5항에 있어서, 상기 포인트 본딩 지그에 고주파 진동을 인가시키는 단계를 추가로 구비하는 것을 특징으로 하는 반도체 디바이스 제조 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP95-96465 | 1995-04-21 | ||
JP7096465A JP2626621B2 (ja) | 1995-04-21 | 1995-04-21 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960039241A true KR960039241A (ko) | 1996-11-21 |
KR100198682B1 KR100198682B1 (ko) | 1999-06-15 |
Family
ID=14165788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960012765A KR100198682B1 (ko) | 1995-04-21 | 1996-04-19 | 반도체 디바이스 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5643802A (ko) |
JP (1) | JP2626621B2 (ko) |
KR (1) | KR100198682B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100351038B1 (ko) * | 1999-10-11 | 2002-08-30 | 밍-퉁 쉔 | 반도체 장치 및 그 제조 방법 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100186333B1 (ko) * | 1996-06-20 | 1999-03-20 | 문정환 | 칩 사이즈 반도체 패키지 및 그 제조방법 |
EP1109214A1 (de) * | 1999-12-16 | 2001-06-20 | Infineon Technologies AG | Anordnung und Verfahren zur Kontaktierung von Schaltkreisen |
JP3980386B2 (ja) | 2002-03-18 | 2007-09-26 | 富士通株式会社 | 重ね合わせ部品の加熱方法および加熱装置 |
JP4264388B2 (ja) * | 2004-07-01 | 2009-05-13 | 富士通株式会社 | 半導体チップの接合方法および接合装置 |
JP4663609B2 (ja) * | 2006-09-25 | 2011-04-06 | 富士通株式会社 | 重ね合わせ部品の加熱方法および加熱装置 |
JP5076163B2 (ja) * | 2007-07-24 | 2012-11-21 | 株式会社アドウェルズ | 超音波振動接合方法および超音波振動接合装置 |
US20090279275A1 (en) * | 2008-05-09 | 2009-11-12 | Stephen Peter Ayotte | Method of attaching an integrated circuit chip to a module |
KR20130055220A (ko) * | 2011-11-18 | 2013-05-28 | 삼성전자주식회사 | 동박적층판 및 이를 사용한 금속코어기판의 제조방법 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3650454A (en) * | 1967-07-06 | 1972-03-21 | Western Electric Co | Device for bonding with a compliant medium |
US3697828A (en) * | 1970-12-03 | 1972-10-10 | Gen Motors Corp | Geometry for a pnp silicon transistor with overlay contacts |
US4295912A (en) * | 1978-07-03 | 1981-10-20 | National Semiconductor Corporation | Apparatus and process for laminating composite tape |
US4209355A (en) * | 1978-07-26 | 1980-06-24 | National Semiconductor Corporation | Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices |
GB8624513D0 (en) * | 1986-10-13 | 1986-11-19 | Microelectronics & Computer | Single point bonding method |
US5569956A (en) * | 1995-08-31 | 1996-10-29 | National Semiconductor Corporation | Interposer connecting leadframe and integrated circuit |
-
1995
- 1995-04-21 JP JP7096465A patent/JP2626621B2/ja not_active Expired - Fee Related
-
1996
- 1996-04-18 US US08/634,443 patent/US5643802A/en not_active Expired - Fee Related
- 1996-04-19 KR KR1019960012765A patent/KR100198682B1/ko not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100351038B1 (ko) * | 1999-10-11 | 2002-08-30 | 밍-퉁 쉔 | 반도체 장치 및 그 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
JPH08293530A (ja) | 1996-11-05 |
KR100198682B1 (ko) | 1999-06-15 |
JP2626621B2 (ja) | 1997-07-02 |
US5643802A (en) | 1997-07-01 |
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