KR960035987A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR960035987A
KR960035987A KR1019960006516A KR19960006516A KR960035987A KR 960035987 A KR960035987 A KR 960035987A KR 1019960006516 A KR1019960006516 A KR 1019960006516A KR 19960006516 A KR19960006516 A KR 19960006516A KR 960035987 A KR960035987 A KR 960035987A
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South Korea
Prior art keywords
anisotropic conductive
conductive sheet
external connection
wiring pattern
semiconductor device
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KR1019960006516A
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English (en)
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KR100218996B1 (ko
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미찌오 호리우찌
요이찌 하라야마
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모기 쥰이찌
신꼬오 덴기 고오교오 가부시끼가이샤
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Publication of KR960035987A publication Critical patent/KR960035987A/ko
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Publication of KR100218996B1 publication Critical patent/KR100218996B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/5328Conductive materials containing conductive organic materials or pastes, e.g. conductive adhesives, inks
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13164Palladium [Pd] as principal constituent
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content

Abstract

본 발명은 간단한 구성으로 제조가 용이하고, 저가로 제조할 수 있는 반도체장치에 관한 것으로, 본 발명은 반도체칩(32)의 비활성화막(34) 상에 이방성도전시트(38)가 배치되고, 상기 이방성 도전시트(38)상에 배선패턴(40)이 형성되고, 상기 배선패턴(40)과 상기 반도체칩(32)의 전극(36)이 상기 이방성도전시트(38)가 가압됨으로서 전기적도통이 되고, 상기 이방성도전시트(38) 및 전기배성패턴(40)상에 배선패턴(40)의 외부접속단자접합부(40a)를 노출하여 전기적절연피막(42)이 형성되고, 상기 노출된 외부 접속 단자접합부(40a)에 외부접속단자(46)가 형성되어 있는 것을 특징으로 한다.

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제1실시예를 나타낸 단면도.

Claims (6)

  1. 비활성화막이 형성도니 반도체칩면상에 한쪽 면에 배선패턴이 형성된 이방성도전시트의 다른쪽 면이 고착되고, 상기 배선패턴과 상기 반도체칩의 전극이 상기 이방성도전시트를 거쳐서 전기적으로 접속되어 있고, 상기 배선패턴의 외부접속단접합부를 노출하여 전기적절연피막이 형성되고, 또 상기 외부접속자접합부에 외부접속단자가 형성된 것을 특징으로 하는 반도체장치.
  2. 제1항에 있어서, 상기 배선패턴에 의해서 상기 이방성도전시트가 밀어눌림으로서 전기적으로 접속된 것을 특징으로 하는 반도체장치.
  3. 제1항에 있어서, 상기 반도체칩의 전극에 상기 비활성막보다도 밖깥쪽으로 돌출하는 범프가 형성되고, 상기 범프에 의해 상기 이방성도전 시트가 밀어눌림으로서 전기적으로 접속된 것을 특징으로 하는 반도체장치.
  4. 제1항 내지 제3항중 어느 한항에 있어서, 상기 전기적절연피막이 감광성 솔더레지스트막으로 형성된 것을 특징으로 하는 반도체장치.
  5. 제1항 내지 제4항중 어느 한항에 있어서, 상기 외부접속단자접합부에 형성되는 외부접속단자가 범프인 것을 특징으로 하는 반도체장치.
  6. 제1항 내지 제5항중 어느 한항에 있어서, 상기 반도체칩을 복수개 구비하고, 상기 복수의 반도체칩상에 공통의 상기 이방성도전시트가 고착되고, 상기 복수의 반도체칩의 소요의 전극끼리 상기 배선패턴에 의해 접속되고, 상기 배선패턴상에 공통의 상기 전기적절연피막이 형성된 것을 특징으로 하는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960006516A 1995-03-24 1996-03-12 반도체장치 KR100218996B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6560995 1995-03-24
JP95-065609 1995-03-24

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KR960035987A true KR960035987A (ko) 1996-10-28
KR100218996B1 KR100218996B1 (ko) 1999-09-01

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US (1) US5677576A (ko)
EP (1) EP0734065B1 (ko)
KR (1) KR100218996B1 (ko)
DE (1) DE69621863T2 (ko)

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DE69621863D1 (de) 2002-07-25
EP0734065A3 (en) 1997-03-05
DE69621863T2 (de) 2002-11-21
EP0734065B1 (en) 2002-06-19
EP0734065A2 (en) 1996-09-25
KR100218996B1 (ko) 1999-09-01

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