KR960015153A - 반도체 장치, 및 그 반도체 장치를 이용한 장치, 신호 변환기 및 신호 처리 시스템 - Google Patents

반도체 장치, 및 그 반도체 장치를 이용한 장치, 신호 변환기 및 신호 처리 시스템

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Publication number
KR960015153A
KR960015153A KR1019950037886A KR19950037886A KR960015153A KR 960015153 A KR960015153 A KR 960015153A KR 1019950037886 A KR1019950037886 A KR 1019950037886A KR 19950037886 A KR19950037886 A KR 19950037886A KR 960015153 A KR960015153 A KR 960015153A
Authority
KR
South Korea
Prior art keywords
semiconductor device
processing system
signal processing
signal
signal converter
Prior art date
Application number
KR1019950037886A
Other languages
English (en)
Other versions
KR100485301B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP6265042A external-priority patent/JPH08125136A/ja
Priority claimed from JP01409795A external-priority patent/JP3412943B2/ja
Application filed filed Critical
Publication of KR960015153A publication Critical patent/KR960015153A/ko
Application granted granted Critical
Publication of KR100485301B1 publication Critical patent/KR100485301B1/ko

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/15—Correlation function computation including computation of convolution operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06J—HYBRID COMPUTING ARRANGEMENTS
    • G06J1/00—Hybrid computing arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/20—Analysis of motion
    • G06T7/223—Analysis of motion using block-matching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/23—Majority or minority circuits, i.e. giving output having the state of the majority or the minority of the inputs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/249—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/42—Sequential comparisons in series-connected stages with no change in value of analogue signal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/02—Indexing scheme relating to groups G06F7/02 - G06F7/026
    • G06F2207/025—String search, i.e. pattern matching, e.g. find identical word or best match in a string
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/10—Image acquisition modality
    • G06T2207/10016—Video; Image sequence
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Nonlinear Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Data Mining & Analysis (AREA)
  • Databases & Information Systems (AREA)
  • Fuzzy Systems (AREA)
  • Algebra (AREA)
  • Evolutionary Computation (AREA)
  • Automation & Control Theory (AREA)
  • Multimedia (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Amplifiers (AREA)
  • Analogue/Digital Conversion (AREA)
KR1019950037886A 1994-10-28 1995-10-28 반도체장치, 및 그 반도체장치를 이용한 연산장치, 신호변환기 및 신호처리시스템 KR100485301B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP94-265042 1994-10-28
JP6265042A JPH08125136A (ja) 1994-10-28 1994-10-28 半導体装置とこれを用いた半導体回路、相関演算装置、ａ／ｄ変換器、ｄ／ａ変換器、及び演算処理システム
JP95-14097 1995-01-31
JP01409795A JP3412943B2 (ja) 1995-01-31 1995-01-31 半導体装置及びその駆動方法

Publications (2)

Publication Number Publication Date
KR960015153A true KR960015153A (ko) 1996-05-22
KR100485301B1 KR100485301B1 (ko) 2005-11-22

Family

ID=26349999

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950037886A KR100485301B1 (ko) 1994-10-28 1995-10-28 반도체장치, 및 그 반도체장치를 이용한 연산장치, 신호변환기 및 신호처리시스템

Country Status (5)

Country Link
US (1) US5835045A (ko)
EP (1) EP0709794B1 (ko)
KR (1) KR100485301B1 (ko)
CN (1) CN1132371A (ko)
DE (1) DE69529388T2 (ko)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100420466B1 (ko) * 2001-11-28 2004-03-02 씨제이 주식회사 고농축 광촉매 분말 표백세제의 제조방법
KR100448993B1 (ko) * 1997-09-09 2004-11-26 씨제이 주식회사 입상고밀도비이온성세제조성물및그제조방법
KR100456508B1 (ko) * 1996-12-28 2005-02-02 주식회사 엘지생활건강 흡수체를이용한분말세제조성물및그의제조방법

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2170666A1 (en) * 1995-03-17 1996-09-18 Taewon Jung Complementary multiplexer with low disabled-output capacitance, and method
JPH09129864A (ja) 1995-10-30 1997-05-16 Canon Inc 半導体装置及びそれを用いた半導体回路、相関演算装置、信号処理システム
JP3456099B2 (ja) * 1996-08-16 2003-10-14 ソニー株式会社 チョッパーコンパレータおよびａ／ｄコンバータ
KR100209224B1 (ko) * 1996-12-27 1999-07-15 김영환 고속 다중화기
US6127857A (en) * 1997-07-02 2000-10-03 Canon Kabushiki Kaisha Output buffer or voltage hold for analog of multilevel processing
JPH1125201A (ja) * 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路
JPH1125200A (ja) * 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路
JPH1127116A (ja) 1997-07-02 1999-01-29 Tadahiro Omi 半導体集積回路、電圧コントロールディレイライン、ディレイロックドループ、自己同期パイプライン式デジタルシステム、電圧制御発振器、およびフェーズロックドループ
JP3478760B2 (ja) * 1999-05-19 2003-12-15 キヤノン株式会社 信号処理回路及びそれの駆動方法並びに放射線撮像システム
US6486812B1 (en) * 1999-08-16 2002-11-26 Semiconductor Energy Laboratory Co., Ltd. D/A conversion circuit having n switches, n capacitors and a coupling capacitor
US7324144B1 (en) * 1999-10-05 2008-01-29 Canon Kabushiki Kaisha Solid image pickup device, image pickup system and method of driving solid image pickup device
US6717151B2 (en) * 2000-07-10 2004-04-06 Canon Kabushiki Kaisha Image pickup apparatus
US6800836B2 (en) 2000-07-10 2004-10-05 Canon Kabushiki Kaisha Image pickup device, radiation image pickup device and image processing system
US6456123B1 (en) * 2000-08-08 2002-09-24 National Semiconductor Corporation Method and apparatus for transferring a differential voltage to a ground referenced voltage using a sample/hold capacitor
JP3479506B2 (ja) * 2000-10-18 2003-12-15 有限会社リニアセル・デザイン 加重平均値演算回路
JP4013572B2 (ja) * 2002-02-06 2007-11-28 セイコーエプソン株式会社 出力回路、入力回路、電子回路、マルチプレクサ、デマルチプレクサ、ワイヤードｏｒ回路、ワイヤードａｎｄ回路、パルス処理回路、多相クロック処理回路およびクロック逓倍回路
JP2004153444A (ja) * 2002-10-29 2004-05-27 Renesas Technology Corp チョッパ型コンパレータ
US6946894B2 (en) * 2003-06-12 2005-09-20 Winbond Electronics Corporation Current-mode synapse multiplier circuit
US7046071B1 (en) * 2003-08-04 2006-05-16 Xilinx, Inc. Series capacitor coupling multiplexer for programmable logic devices
JP2005286477A (ja) * 2004-03-29 2005-10-13 Renesas Technology Corp データスライサ
US7131092B2 (en) * 2004-12-21 2006-10-31 Via Technologies, Inc. Clock gating circuit
JP5843527B2 (ja) 2011-09-05 2016-01-13 キヤノン株式会社 光電変換装置
JP5529214B2 (ja) * 2012-06-28 2014-06-25 株式会社アドバンテスト 試験装置用の電源装置およびそれを用いた試験装置
US11283453B2 (en) * 2019-12-27 2022-03-22 Kepler Computing Inc. Low power ferroelectric based majority logic gate carry propagate and serial adder
US11018672B1 (en) 2019-12-27 2021-05-25 Kepler Computing Inc. Linear input and non-linear output majority logic gate
US11374574B2 (en) 2019-12-27 2022-06-28 Kepler Computing Inc. Linear input and non-linear output threshold logic gate
US10944404B1 (en) 2019-12-27 2021-03-09 Kepler Computing, Inc. Low power ferroelectric based majority logic gate adder
US11681776B2 (en) * 2020-10-08 2023-06-20 Applied Materials, Inc. Adaptive settling time control for binary-weighted charge redistribution circuits
US12019702B2 (en) 2020-10-08 2024-06-25 Applied Materials, Inc. Throughput and precision-programmable multiplier-accumulator architecture
US11922131B2 (en) 2020-10-08 2024-03-05 Applied Materials, Inc. Scalable, multi-precision, self-calibrated multiplier-accumulator architecture
TWI750841B (zh) * 2020-10-12 2021-12-21 茂達電子股份有限公司 高線性度數位調控的光感測器和方法
US11165430B1 (en) 2020-12-21 2021-11-02 Kepler Computing Inc. Majority logic gate based sequential circuit
US11381244B1 (en) 2020-12-21 2022-07-05 Kepler Computing Inc. Low power ferroelectric based majority logic gate multiplier
US11705906B1 (en) * 2021-05-21 2023-07-18 Kepler Computing Inc. Majority logic gate having ferroelectric input capacitors and a pulsing scheme coupled to a conditioning logic
US11290111B1 (en) 2021-05-21 2022-03-29 Kepler Computing Inc. Majority logic gate based and-or-invert logic gate with non-linear input capacitors
CN113687332A (zh) * 2021-07-08 2021-11-23 西安电子科技大学 激光雷达中基于电容阵列电压合成技术的模拟前端电路
US11303280B1 (en) 2021-08-19 2022-04-12 Kepler Computing Inc. Ferroelectric or paraelectric based sequential circuit
US11664370B1 (en) 2021-12-14 2023-05-30 Kepler Corpating inc. Multi-function paraelectric threshold gate with input based adaptive threshold
US11705905B1 (en) 2021-12-14 2023-07-18 Kepler Computing, Inc. Multi-function ferroelectric threshold gate with input based adaptive threshold
US11652482B1 (en) 2021-12-23 2023-05-16 Kepler Computing Inc. Parallel pull-up and pull-down networks controlled asynchronously by threshold logic gate
US11855627B1 (en) 2022-01-13 2023-12-26 Kepler Computing Inc. Asynchronous consensus circuit using multi-function threshold gate with input based adaptive threshold
US11757452B1 (en) 2022-04-20 2023-09-12 Kepler Computing Inc. OR-and-invert logic based on a mix of majority or minority logic gate with non-linear input capacitors and other logic gates
US11765908B1 (en) 2023-02-10 2023-09-19 Kepler Computing Inc. Memory device fabrication through wafer bonding

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2536922A1 (fr) * 1982-11-26 1984-06-01 Efcis Comparateur logique a plusieurs fonctions
FR2599526A1 (fr) * 1986-05-29 1987-12-04 Centre Nat Rech Scient Additionneur mos et multiplicateur binaire mos comprenant au moins un tel additionneur
US4760346A (en) * 1986-09-30 1988-07-26 Motorola, Inc. Switched capacitor summing amplifier
JPS6481082A (en) * 1987-09-24 1989-03-27 Fuji Photo Film Co Ltd Arithmetic circuit
JPH01106517A (ja) * 1987-10-19 1989-04-24 Mitsubishi Electric Corp 比較回路
US5466961A (en) * 1991-04-23 1995-11-14 Canon Kabushiki Kaisha Semiconductor device and method of manufacturing the same
DE69213539T2 (de) * 1991-04-26 1997-02-20 Canon Kk Halbleitervorrichtung mit verbessertem isoliertem Gate-Transistor
JPH05196659A (ja) * 1991-11-08 1993-08-06 Yamaha Corp チョッパ型比較器
US5341050A (en) * 1992-03-20 1994-08-23 Hughes Aircraft Company Switched capacitor amplifier circuit operating without serially coupled amplifiers
JPH0629850A (ja) * 1992-05-11 1994-02-04 Takayama:Kk Ａ／ｄコンバータ
JP3055739B2 (ja) * 1993-01-13 2000-06-26 シャープ株式会社 乗算回路
US5461381A (en) * 1993-12-13 1995-10-24 Motorola, Inc. Sigma-delta analog-to-digital converter (ADC) with feedback compensation and method therefor
DE4402952A1 (de) * 1994-02-01 1994-06-23 Tobias Sander Verfahren zur Analog - Digital - Wandlung

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100456508B1 (ko) * 1996-12-28 2005-02-02 주식회사 엘지생활건강 흡수체를이용한분말세제조성물및그의제조방법
KR100448993B1 (ko) * 1997-09-09 2004-11-26 씨제이 주식회사 입상고밀도비이온성세제조성물및그제조방법
KR100420466B1 (ko) * 2001-11-28 2004-03-02 씨제이 주식회사 고농축 광촉매 분말 표백세제의 제조방법

Also Published As

Publication number Publication date
US5835045A (en) 1998-11-10
EP0709794B1 (en) 2003-01-15
CN1132371A (zh) 1996-10-02
DE69529388T2 (de) 2003-06-12
KR100485301B1 (ko) 2005-11-22
EP0709794A3 (en) 1997-07-23
EP0709794A2 (en) 1996-05-01
DE69529388D1 (de) 2003-02-20

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