DE69501381D1 - Halbleitergerät - Google Patents

Halbleitergerät

Info

Publication number
DE69501381D1
DE69501381D1 DE69501381T DE69501381T DE69501381D1 DE 69501381 D1 DE69501381 D1 DE 69501381D1 DE 69501381 T DE69501381 T DE 69501381T DE 69501381 T DE69501381 T DE 69501381T DE 69501381 D1 DE69501381 D1 DE 69501381D1
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69501381T
Other languages
English (en)
Other versions
DE69501381T2 (de
Inventor
Franciscus Widdershoven
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Application granted granted Critical
Publication of DE69501381D1 publication Critical patent/DE69501381D1/de
Publication of DE69501381T2 publication Critical patent/DE69501381T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/80—Simultaneous conversion using weighted impedances
    • H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
DE69501381T 1994-05-06 1995-05-03 Halbleitergerät Expired - Fee Related DE69501381T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP94201263 1994-05-06
PCT/IB1995/000316 WO1995031043A2 (en) 1994-05-06 1995-05-03 Semiconductor device for the summation of a number of weighted input signals

Publications (2)

Publication Number Publication Date
DE69501381D1 true DE69501381D1 (de) 1998-02-12
DE69501381T2 DE69501381T2 (de) 1998-06-25

Family

ID=8216854

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69501381T Expired - Fee Related DE69501381T2 (de) 1994-05-06 1995-05-03 Halbleitergerät

Country Status (8)

Country Link
US (1) US5530275A (de)
EP (1) EP0707759B1 (de)
JP (1) JPH08512421A (de)
CN (1) CN1094679C (de)
CA (1) CA2166555A1 (de)
DE (1) DE69501381T2 (de)
TW (1) TW313703B (de)
WO (1) WO1995031043A2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3119586B2 (ja) * 1996-06-28 2000-12-25 日本電気株式会社 電荷転送装置及びその製造方法
DE19630112C1 (de) * 1996-07-25 1997-08-14 Siemens Ag Verstärker mit Neuron-MOS-Transistoren
US5814856A (en) * 1997-05-16 1998-09-29 National Semiconductor Corporation Variable and tunable VT MOSFET with poly and/or buried diffusion
US6262469B1 (en) * 1998-03-25 2001-07-17 Advanced Micro Devices, Inc. Capacitor for use in a capacitor divider that has a floating gate transistor as a corresponding capacitor
US6207983B1 (en) * 1999-01-22 2001-03-27 Nec Corporation Charge transfer device, and driving method and manufacturing method for the same
CN100386964C (zh) * 2005-03-04 2008-05-07 清华大学 开关电容电路中用交流电源供电的放大器
GB0506253D0 (en) * 2005-03-29 2005-05-04 Univ Ulster Electronic synapse device
US9760533B2 (en) 2014-08-14 2017-09-12 The Regents On The University Of Michigan Floating-gate transistor array for performing weighted sum computation
CN106847817B (zh) * 2015-12-04 2019-07-23 中国科学院宁波材料技术与工程研究所 具有多端结构的人造突触器件及其制法和应用
CN106910773B (zh) * 2017-02-21 2019-08-20 南京大学 多栅极神经元晶体管及其制备方法和构成的神经网络
KR20200128109A (ko) * 2018-03-02 2020-11-11 에이아이스톰, 아이엔씨. 전하 도메인 수학적 엔진 및 방법
KR102178183B1 (ko) * 2018-10-24 2020-11-12 포항공과대학교 산학협력단 크로스-포인트 커패시터 기반의 가중치 소자 및 이를 이용한 뉴럴 네트워크
US20190138848A1 (en) * 2018-12-29 2019-05-09 Intel Corporation Realistic sensor simulation and probabilistic measurement correction
US11227212B2 (en) 2019-04-08 2022-01-18 International Business Machines Corporation Non-volatile resistive processing unit
EP3798914B1 (de) * 2019-09-24 2023-08-02 Hitachi, Ltd. Künstliche synapse
EP3839833A1 (de) * 2019-12-16 2021-06-23 ams International AG Neuronaler verstärker, neuronales netzwerk und sensorvorrichtung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5055897A (en) * 1988-07-27 1991-10-08 Intel Corporation Semiconductor cell for neural network and the like
US5028810A (en) * 1989-07-13 1991-07-02 Intel Corporation Four quadrant synapse cell employing single column summing line
US4961002A (en) * 1989-07-13 1990-10-02 Intel Corporation Synapse cell employing dual gate transistor structure
JPH04144166A (ja) * 1990-10-04 1992-05-18 Nippon Philips Kk 分布しきい値型電界効果トランジスタ
US5303329A (en) * 1991-12-10 1994-04-12 Synaptics, Incorporated Continuous synaptic weight update mechanism
JP3269659B2 (ja) * 1992-05-27 2002-03-25 直 柴田 半導体装置
JP3119392B2 (ja) * 1992-06-03 2000-12-18 直 柴田 半導体装置
JP3098629B2 (ja) * 1992-09-18 2000-10-16 株式会社日立製作所 強誘電体トランジスタ、それを用いた半導体記憶デバイス、半導体応用機器及び人工知能システム

Also Published As

Publication number Publication date
WO1995031043A3 (en) 1996-01-11
EP0707759A1 (de) 1996-04-24
TW313703B (de) 1997-08-21
DE69501381T2 (de) 1998-06-25
JPH08512421A (ja) 1996-12-24
CN1128588A (zh) 1996-08-07
CA2166555A1 (en) 1995-11-16
US5530275A (en) 1996-06-25
WO1995031043A2 (en) 1995-11-16
EP0707759B1 (de) 1998-01-07
CN1094679C (zh) 2002-11-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee