KR960009039A - 반도체집적회로장치의 제조방법 - Google Patents

반도체집적회로장치의 제조방법 Download PDF

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Publication number
KR960009039A
KR960009039A KR1019950023968A KR19950023968A KR960009039A KR 960009039 A KR960009039 A KR 960009039A KR 1019950023968 A KR1019950023968 A KR 1019950023968A KR 19950023968 A KR19950023968 A KR 19950023968A KR 960009039 A KR960009039 A KR 960009039A
Authority
KR
South Korea
Prior art keywords
insulating film
forming
semiconductor substrate
circuit region
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019950023968A
Other languages
English (en)
Korean (ko)
Inventor
히로시 오토리
가즈히코 가지가야
가즈유키 미야자와
마사하루 구보
아츠요시 고이케
후미유키 가나이
Original Assignee
가나이 쓰토무
가부시키가이샤 히타치세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰토무, 가부시키가이샤 히타치세이사쿠쇼 filed Critical 가나이 쓰토무
Publication of KR960009039A publication Critical patent/KR960009039A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/834—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
KR1019950023968A 1994-08-10 1995-08-03 반도체집적회로장치의 제조방법 Withdrawn KR960009039A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6188040A JPH0855968A (ja) 1994-08-10 1994-08-10 半導体集積回路装置の製造方法
JP94-188040 1994-08-10

Publications (1)

Publication Number Publication Date
KR960009039A true KR960009039A (ko) 1996-03-22

Family

ID=16216628

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950023968A Withdrawn KR960009039A (ko) 1994-08-10 1995-08-03 반도체집적회로장치의 제조방법

Country Status (5)

Country Link
US (1) US5670409A (enExample)
JP (1) JPH0855968A (enExample)
KR (1) KR960009039A (enExample)
CN (1) CN1129356A (enExample)
TW (1) TW277160B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1032316A (ja) * 1996-07-16 1998-02-03 Nec Corp 半導体記憶装置及びその製造方法
JP3941133B2 (ja) * 1996-07-18 2007-07-04 富士通株式会社 半導体装置およびその製造方法
JP3164026B2 (ja) * 1996-08-21 2001-05-08 日本電気株式会社 半導体装置及びその製造方法
TW377495B (en) * 1996-10-04 1999-12-21 Hitachi Ltd Method of manufacturing semiconductor memory cells and the same apparatus
WO1998028789A1 (en) * 1996-12-20 1998-07-02 Hitachi, Ltd. Semiconductor storage device and method for manufacturing the same
KR100310470B1 (ko) * 1997-12-30 2002-05-09 박종섭 양면반도체메모리소자및그제조방법
JP3147095B2 (ja) * 1998-07-24 2001-03-19 日本電気株式会社 半導体記憶装置
KR100270963B1 (ko) * 1998-09-22 2000-11-01 윤종용 머지드 디램 앤 로직 및 그 제조방법
TW429579B (en) * 1999-08-23 2001-04-11 Taiwan Semiconductor Mfg Manufacturing method of inter-layer dielectric
WO2006075444A1 (ja) * 2005-01-12 2006-07-20 Sharp Kabushiki Kaisha 半導体装置の製造方法、及び半導体装置
JP4602818B2 (ja) * 2005-03-30 2010-12-22 富士通セミコンダクター株式会社 半導体装置の製造方法
US8853083B2 (en) * 2013-01-23 2014-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. Chemical mechanical polish in the growth of semiconductor regions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5247197A (en) * 1987-11-05 1993-09-21 Fujitsu Limited Dynamic random access memory device having improved contact hole structures
US5235199A (en) * 1988-03-25 1993-08-10 Kabushiki Kaisha Toshiba Semiconductor memory with pad electrode and bit line under stacked capacitor
JP2640174B2 (ja) * 1990-10-30 1997-08-13 三菱電機株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US5670409A (en) 1997-09-23
CN1129356A (zh) 1996-08-21
TW277160B (enExample) 1996-06-01
JPH0855968A (ja) 1996-02-27

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