KR960005974A - 반도체 장치 및 반도체 장치의 제조방법 - Google Patents

반도체 장치 및 반도체 장치의 제조방법 Download PDF

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KR960005974A
KR960005974A KR1019950019378A KR19950019378A KR960005974A KR 960005974 A KR960005974 A KR 960005974A KR 1019950019378 A KR1019950019378 A KR 1019950019378A KR 19950019378 A KR19950019378 A KR 19950019378A KR 960005974 A KR960005974 A KR 960005974A
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heat dissipating
semiconductor device
dissipating material
semiconductor element
silane coupling
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KR1019950019378A
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스미또 하야시다
가쯔히로 우메모또
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윌리암 티. 엘리스
인터내셔널 비지네스 머신즈 코포레이션
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Publication of KR960005974A publication Critical patent/KR960005974A/ko

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    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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  • Engineering & Computer Science (AREA)
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  • Chemical & Material Sciences (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract

제조 가격을 저감하여 반도체 장치의 열 방산성을 양호한 상태로 장기간 유지한다.
방열재(22)를 알카리 탈지한 후에 물로 세척 처리하여 건조하는 것에 의해 방열재(22)를 수산화 처리한다. 그후 희석된 실란 커플링제를 방열재(22)의 표면에 붙열 방열재(22)를 건조하며 실란 커플링제의 층(A)을 방열재(22)의 표면에 마련한다. 거기에다 다이패드(16)에 탑재된 칩912) 및 와이어(20)로 칩(12)에 접속된 상태의 리드 프레임(18)등을 금형내에 놓는 것과 함께 방열재(22)를 이 금형내에 놓으며 성형 가공하는 것에 의해 반도체 장치(10)가 제조된다.

Description

반도체 장치 및 반도체 장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체 장치 제조방법의 한 실시예로 제조된 반도체 장치를 도시하는 단면도이다.
제2도는 본 발명에 따른 반도체 장치 제조방법의 한 실시예를 사용하는 방열재(heat sink)를 도시하는 사시도이다.

Claims (7)

  1. 반도체 소자를 내장한 반도체 장치를 제조하는 반도체 장치의 제조방법에 있어서, 상기 반도체 소자가 발생하는 열을 퍼트리는 금속제의 방열재(heat sink)의 표면을 수산화 처리한 후 상기 방열재의 표면에 실란 커플링제의 층을 마련하는 단계와, 이어서 상기 방열재의 주위에 수지 재료를 성형하여 수지제의 몰드내의 상기 방열재를 채워 넣는 단계를 포함하는 것을 특징으로 하는 반도체 장치의 제조방법.
  2. 제1항에 있어서, 상기 방열재의 표면에 실란 커플링제의 층을 마련하는 단계는 상기 방열재의 표면에 r-아미노프로필 트리에톡실란(r-aminopropyl-triethoxysilane) N-β-(아미노에틸)-r-아미노프로필 트리메톡실란(N-β (aminoethyl)-r-aminopropyl-triethoxysilane) β-(3,4-에폭시 싸이크로헥실)-에틸트리메톡실란(β-(3,4-rpoxy-cyclohexyl)-ethyltrimethoxysilane) 또는 r-글리사이독시 프로필트리메톡실란(r-glycidoxy-propyltrimethoxysilane)의 어느것 중 하나를 포함하는 실란 커플링제의 층을 마련하는 단계인 것을 특징으로 하는 반도체 장치의 제조방법
  3. 제1항에 있어서, 상기 방열재의 표면을 수산화 처리하는 것이 상기 방열재를 알카리 용액에 침적한 후에 물로 세척 처리하여 건조하는 단계인 것을 특징으로 하는 반도체 장치의 제조 방법
  4. 수지제의 몰드에 반도체 소자가 내장됨과 함게 상기 반도체 소자가 발생하는 열을 퍼뜨리는 금속제의 방열재가 채워 넣어진 반도체 장치에 있어서, 상기 방열재의 표면에 실란 커플링제의 층을 마련한 것을 특징으로 하는 반도체 장치
  5. 수지제의 몰드에 반도체 소자가 내장됨과 함께 사기 반도체 소자가 발생하는 열을 퍼뜨리는 금속제의 방열재가 채워넣어진 반도체 장치에 있어서, 상기 방열재의 표면에 r-아미노프로필 트리에톡실란(r-aminopropyl-triethoxysilane) N-β-(아미노에틸)-r-아미노프로필 트리메톡실란(N-β (aminoethyl)-r-aminopropyl-triethoxysilane) β-(3,4-에폭시 싸이크로헥실)-에틸트리메톡실란(β-(3,4-epoxy-cyclohexyl)-ethyltrimethoxysilane) 또는 r-글리사이독시 프로필트리메톡실란(r-glycidoxy-propyltrimethoxysilane)의 어느것 중 하나를 포함하는 실란 커플링제의 층을 마련한 것을 특징으로 하는 반도체 장치.
  6. 수지제의 몰드에 반도체 소자가 내장됨과 함께 상기 반도체 소자가 발생하는 열을 퍼뜨리는 금속제의 방열재가 채워 넣어진 반도체 장치에 있어서, 알칼리 용액에서 수산화 처리한 상기 방열재의 표면에 실란 커플링제의 층을 마련한 것을 특징으로 하는 반도체 장치
  7. 수지제의 몰드에 반도체 소자가 내장됨과 함께 상기 반도체 소자가 발생하는 열을 퍼뜨리는 금속제의 방열재가 채워 넣어진 반도체 장치에 있어서, 상기 방열재가 단순한 형상에 의해 형성되며 표면에 실란커플링제의 층을 마련한 것을 특징으로 하는 반도체 장치
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950019378A 1994-07-05 1995-07-04 반도체 장치 및 반도체 장치의 제조방법 KR960005974A (ko)

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JP6153169A JP2635933B2 (ja) 1994-07-05 1994-07-05 半導体装置の製造方法
JP94-153169 1994-07-05

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KR960005974A true KR960005974A (ko) 1996-02-23

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JP (1) JP2635933B2 (ko)
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CN (1) CN1122052A (ko)
MY (1) MY130161A (ko)
SG (1) SG72596A1 (ko)
TW (1) TW262582B (ko)

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JP2006179856A (ja) * 2004-11-25 2006-07-06 Fuji Electric Holdings Co Ltd 絶縁基板および半導体装置
WO2018057040A1 (en) * 2016-09-26 2018-03-29 Brown Andrew J Semiconductor device and method of making
US20210101373A1 (en) * 2017-03-31 2021-04-08 Jnc Corporation Laminate, electronic equipment and production method for laminate

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JPS55143057A (en) * 1979-04-26 1980-11-08 Sumitomo Bakelite Co Ltd Manufacture of semiconductor device
JPS60210855A (ja) * 1984-04-03 1985-10-23 Hitachi Chem Co Ltd 半導体装置の製造方法
JP2537867B2 (ja) * 1987-05-20 1996-09-25 日東電工株式会社 樹脂封止半導体装置
JPH04247644A (ja) * 1991-02-04 1992-09-03 Matsushita Electric Works Ltd 半導体装置
JPH04306865A (ja) * 1991-04-03 1992-10-29 Seiko Epson Corp 半導体装置及びその製造方法
JPH05218265A (ja) * 1992-02-03 1993-08-27 Hitachi Cable Ltd 半導体装置用複合リードフレーム
JPH05267500A (ja) * 1992-03-19 1993-10-15 Toshiba Corp 樹脂封止型半導体装置
US5367196A (en) * 1992-09-17 1994-11-22 Olin Corporation Molded plastic semiconductor package including an aluminum alloy heat spreader
US5362680A (en) * 1992-08-18 1994-11-08 Texas Instruments Incorporated Technique for enhancing adhesion capability of heat spreaders in molded packages

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TW262582B (en) 1995-11-11
CN1122052A (zh) 1996-05-08
EP0691681A3 (en) 1996-05-01
EP0691681A2 (en) 1996-01-10
MY130161A (en) 2007-06-29
JPH0831985A (ja) 1996-02-02
SG72596A1 (en) 2000-05-23
JP2635933B2 (ja) 1997-07-30

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