DE69737248D1 - Verfahren zum Einkapseln einer integrierten Halbleiterschaltung - Google Patents

Verfahren zum Einkapseln einer integrierten Halbleiterschaltung

Info

Publication number
DE69737248D1
DE69737248D1 DE69737248T DE69737248T DE69737248D1 DE 69737248 D1 DE69737248 D1 DE 69737248D1 DE 69737248 T DE69737248 T DE 69737248T DE 69737248 T DE69737248 T DE 69737248T DE 69737248 D1 DE69737248 D1 DE 69737248D1
Authority
DE
Germany
Prior art keywords
conductor circuit
semi
mould
lead frame
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69737248T
Other languages
English (en)
Other versions
DE69737248T2 (de
Inventor
Peter Jacobus Kaldenberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elmos Advanced Packaging BV
Original Assignee
Elmos Advanced Packaging BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmos Advanced Packaging BV filed Critical Elmos Advanced Packaging BV
Application granted granted Critical
Publication of DE69737248D1 publication Critical patent/DE69737248D1/de
Publication of DE69737248T2 publication Critical patent/DE69737248T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Bipolar Transistors (AREA)
DE69737248T 1996-06-11 1997-06-10 Verfahren zum Einkapseln einer integrierten Halbleiterschaltung Expired - Lifetime DE69737248T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL1003315A NL1003315C2 (nl) 1996-06-11 1996-06-11 Werkwijze voor het inkapselen van een geïntegreerde halfgeleiderschake- ling.
NL1003315 1996-06-11

Publications (2)

Publication Number Publication Date
DE69737248D1 true DE69737248D1 (de) 2007-03-08
DE69737248T2 DE69737248T2 (de) 2007-05-24

Family

ID=19762999

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69737248T Expired - Lifetime DE69737248T2 (de) 1996-06-11 1997-06-10 Verfahren zum Einkapseln einer integrierten Halbleiterschaltung

Country Status (6)

Country Link
US (1) US5897338A (de)
EP (1) EP0813236B1 (de)
JP (1) JPH1070146A (de)
AT (1) ATE352100T1 (de)
DE (1) DE69737248T2 (de)
NL (1) NL1003315C2 (de)

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US6526326B2 (en) 1997-03-31 2003-02-25 Hitachi, Ltd. Fraction defective estimating method and system for estimating an assembly fraction defective of an article
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US6033934A (en) * 1997-12-09 2000-03-07 Orient Semiconductor Electronics Ltd. Semiconductor chip fabrication method and apparatus therefor
US6307258B1 (en) * 1998-12-22 2001-10-23 Silicon Bandwidth, Inc. Open-cavity semiconductor die package
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DE19929026B4 (de) * 1999-06-25 2011-02-24 Robert Bosch Gmbh Verfahren zur Herstellung eines Drucksensors
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DE19959345C1 (de) * 1999-12-09 2001-04-05 Micronas Gmbh Verfahren zum Einkapseln eines Sensors
US7026710B2 (en) 2000-01-21 2006-04-11 Texas Instruments Incorporated Molded package for micromechanical devices and method of fabrication
US6489178B2 (en) * 2000-01-26 2002-12-03 Texas Instruments Incorporated Method of fabricating a molded package for micromechanical devices
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Also Published As

Publication number Publication date
JPH1070146A (ja) 1998-03-10
DE69737248T2 (de) 2007-05-24
NL1003315C2 (nl) 1997-12-17
US5897338A (en) 1999-04-27
ATE352100T1 (de) 2007-02-15
EP0813236B1 (de) 2007-01-17
EP0813236A1 (de) 1997-12-17

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