KR960001300B1 - 반도체기억장치 - Google Patents
반도체기억장치 Download PDFInfo
- Publication number
- KR960001300B1 KR960001300B1 KR1019910017788A KR910017788A KR960001300B1 KR 960001300 B1 KR960001300 B1 KR 960001300B1 KR 1019910017788 A KR1019910017788 A KR 1019910017788A KR 910017788 A KR910017788 A KR 910017788A KR 960001300 B1 KR960001300 B1 KR 960001300B1
- Authority
- KR
- South Korea
- Prior art keywords
- test
- word line
- signal
- semiconductor memory
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000012360 testing method Methods 0.000 claims description 84
- 230000007547 defect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000012795 verification Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/30—Accessing single arrays
- G11C29/34—Accessing multiple bits simultaneously
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2274803A JP2647546B2 (ja) | 1990-10-11 | 1990-10-11 | 半導体記憶装置のテスト方法 |
| JP90-274803 | 1990-10-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920008768A KR920008768A (ko) | 1992-05-28 |
| KR960001300B1 true KR960001300B1 (ko) | 1996-01-25 |
Family
ID=17546787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019910017788A Expired - Lifetime KR960001300B1 (ko) | 1990-10-11 | 1991-10-10 | 반도체기억장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US5331594A (https=) |
| EP (1) | EP0480752B1 (https=) |
| JP (1) | JP2647546B2 (https=) |
| KR (1) | KR960001300B1 (https=) |
| DE (1) | DE69124562T2 (https=) |
| TW (1) | TW218935B (https=) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2793427B2 (ja) * | 1992-04-08 | 1998-09-03 | 株式会社東芝 | 半導体装置 |
| JP2978329B2 (ja) * | 1992-04-21 | 1999-11-15 | 三菱電機株式会社 | 半導体メモリ装置及びそのビット線の短絡救済方法 |
| DE4223532A1 (de) * | 1992-07-17 | 1994-01-20 | Philips Patentverwaltung | Schaltungsanordnung zum Prüfen der Adressierung wenigstens einer Matrix |
| US5428621A (en) * | 1992-09-21 | 1995-06-27 | Sundisk Corporation | Latent defect handling in EEPROM devices |
| JP3164939B2 (ja) * | 1993-04-27 | 2001-05-14 | 富士通株式会社 | 記憶装置の試験回路を備えた装置 |
| EP0632464B1 (en) * | 1993-06-28 | 1999-09-08 | STMicroelectronics S.r.l. | Method of measuring the current of microcontroller memory cells and relative system |
| JP3354231B2 (ja) * | 1993-09-29 | 2002-12-09 | 三菱電機エンジニアリング株式会社 | 半導体装置 |
| KR950015768A (ko) * | 1993-11-17 | 1995-06-17 | 김광호 | 불휘발성 반도체 메모리 장치의 배선단락 검출회로 및 그 방법 |
| KR0122100B1 (ko) * | 1994-03-10 | 1997-11-26 | 김광호 | 스트레스회로를 가지는 반도체집적회로 및 그 스트레스전압공급방법 |
| KR0135231B1 (ko) * | 1994-08-23 | 1998-04-22 | 김주용 | 고속 테스트 기능을 갖는 메모리 소자 |
| US5610866A (en) * | 1994-10-31 | 1997-03-11 | Sgs-Thomson Microelectronics, Inc. | Circuit structure and method for stress testing of bit lines |
| US5623925A (en) * | 1995-06-05 | 1997-04-29 | Cmed, Inc. | Virtual medical instrument for performing medical diagnostic testing on patients |
| JP3734853B2 (ja) * | 1995-06-27 | 2006-01-11 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| DE19612441C2 (de) * | 1996-03-28 | 1998-04-09 | Siemens Ag | Schaltungsanordnung mit einer Testschaltung |
| US6072719A (en) * | 1996-04-19 | 2000-06-06 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| US5781557A (en) * | 1996-12-31 | 1998-07-14 | Intel Corporation | Memory test mode for wordline resistive defects |
| FR2771840B1 (fr) * | 1997-11-28 | 2003-06-27 | Sgs Thomson Microelectronics | Memoire rom testable en consommation statique |
| KR19990084215A (ko) * | 1998-04-03 | 1999-12-06 | 윤종용 | 반도체 메모리 장치의 라인-브리지 차단 회로 |
| DE69937559T2 (de) | 1999-09-10 | 2008-10-23 | Stmicroelectronics S.R.L., Agrate Brianza | Nicht-flüchtige Speicher mit Erkennung von Kurzschlüssen zwischen Wortleitungen |
| US6407953B1 (en) | 2001-02-02 | 2002-06-18 | Matrix Semiconductor, Inc. | Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays |
| US6388927B1 (en) * | 2001-02-23 | 2002-05-14 | Cypress Semiconductor Corp. | Direct bit line-bit line defect detection test mode for SRAM |
| US6768685B1 (en) | 2001-11-16 | 2004-07-27 | Mtrix Semiconductor, Inc. | Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor |
| US6778449B2 (en) * | 2002-07-01 | 2004-08-17 | International Business Machines Corporation | Method and design for measuring SRAM array leakage macro (ALM) |
| US7765153B2 (en) * | 2003-06-10 | 2010-07-27 | Kagi, Inc. | Method and apparatus for verifying financial account information |
| US6992939B2 (en) * | 2004-01-26 | 2006-01-31 | Micron Technology, Inc. | Method and apparatus for identifying short circuits in an integrated circuit device |
| US7053647B2 (en) * | 2004-05-07 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of detecting potential bridging effects between conducting lines in an integrated circuit |
| KR100902052B1 (ko) * | 2007-08-13 | 2009-06-15 | 주식회사 하이닉스반도체 | 워드 라인 테스트 방법 |
| JP2009076176A (ja) * | 2007-09-25 | 2009-04-09 | Toshiba Corp | 不揮発性半導体記憶装置 |
| TWI534819B (zh) * | 2014-07-31 | 2016-05-21 | 常憶科技股份有限公司 | 於靜態電流測試下檢測全域字元線缺陷 |
| US9330783B1 (en) * | 2014-12-17 | 2016-05-03 | Apple Inc. | Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block |
| US9390809B1 (en) | 2015-02-10 | 2016-07-12 | Apple Inc. | Data storage in a memory block following WL-WL short |
| US9529663B1 (en) | 2015-12-20 | 2016-12-27 | Apple Inc. | Detection and localization of failures in 3D NAND flash memory |
| US9996417B2 (en) | 2016-04-12 | 2018-06-12 | Apple Inc. | Data recovery in memory having multiple failure modes |
| US10755787B2 (en) | 2018-06-28 | 2020-08-25 | Apple Inc. | Efficient post programming verification in a nonvolatile memory |
| US10762967B2 (en) | 2018-06-28 | 2020-09-01 | Apple Inc. | Recovering from failure in programming a nonvolatile memory |
| US10936455B2 (en) | 2019-02-11 | 2021-03-02 | Apple Inc. | Recovery of data failing due to impairment whose severity depends on bit-significance value |
| US10915394B1 (en) | 2019-09-22 | 2021-02-09 | Apple Inc. | Schemes for protecting data in NVM device using small storage footprint |
| US11550657B1 (en) | 2021-09-01 | 2023-01-10 | Apple Inc. | Efficient programming schemes in a nonvolatile memory |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57105897A (en) * | 1980-12-23 | 1982-07-01 | Fujitsu Ltd | Semiconductor storage device |
| US4393475A (en) * | 1981-01-27 | 1983-07-12 | Texas Instruments Incorporated | Non-volatile semiconductor memory and the testing method for the same |
| JPS592299A (ja) * | 1982-06-29 | 1984-01-07 | Fujitsu Ltd | フイ−ルドプログラマブル素子 |
| JPS62114200A (ja) * | 1985-11-13 | 1987-05-25 | Mitsubishi Electric Corp | 半導体メモリ装置 |
| US4685086A (en) * | 1985-11-14 | 1987-08-04 | Thomson Components-Mostek Corp. | Memory cell leakage detection circuit |
| JPS62120700A (ja) * | 1985-11-20 | 1987-06-01 | Fujitsu Ltd | 半導体記憶装置 |
| JPS63177400A (ja) * | 1987-01-19 | 1988-07-21 | Hitachi Ltd | 半導体メモリ |
| JPS63244400A (ja) * | 1987-03-16 | 1988-10-11 | シーメンス・アクチエンゲゼルシヤフト | メモリセルの検査回路装置および方法 |
| JP2609211B2 (ja) * | 1987-03-16 | 1997-05-14 | シーメンス・アクチエンゲゼルシヤフト | メモリセルの検査回路装置および方法 |
| JPH01109921A (ja) * | 1987-10-23 | 1989-04-26 | Ricoh Co Ltd | プログラマブルロジックアレイ |
| JPH01134799A (ja) * | 1987-11-20 | 1989-05-26 | Sony Corp | メモリ装置 |
| JPH01243291A (ja) * | 1988-03-25 | 1989-09-27 | Hitachi Ltd | メモリ回路 |
| JPH01276500A (ja) * | 1988-04-27 | 1989-11-07 | Hitachi Ltd | 半導体記憶装置 |
| JPH01296500A (ja) * | 1988-05-23 | 1989-11-29 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPH02249196A (ja) * | 1989-03-22 | 1990-10-04 | Hitachi Ltd | 半導体記憶装置 |
| JPH03137900A (ja) * | 1989-07-27 | 1991-06-12 | Nec Corp | 不揮発性半導体メモリ |
| JP2601931B2 (ja) * | 1990-04-06 | 1997-04-23 | 株式会社東芝 | 半導体不揮発性メモリ装置 |
-
1990
- 1990-10-11 JP JP2274803A patent/JP2647546B2/ja not_active Expired - Fee Related
-
1991
- 1991-10-09 TW TW080107965A patent/TW218935B/zh active
- 1991-10-10 US US07/776,052 patent/US5331594A/en not_active Expired - Lifetime
- 1991-10-10 KR KR1019910017788A patent/KR960001300B1/ko not_active Expired - Lifetime
- 1991-10-11 DE DE69124562T patent/DE69124562T2/de not_active Expired - Lifetime
- 1991-10-11 EP EP91309384A patent/EP0480752B1/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP0480752A3 (en) | 1993-02-24 |
| US5331594A (en) | 1994-07-19 |
| EP0480752B1 (en) | 1997-02-05 |
| DE69124562T2 (de) | 1997-08-14 |
| JP2647546B2 (ja) | 1997-08-27 |
| DE69124562D1 (de) | 1997-03-20 |
| KR920008768A (ko) | 1992-05-28 |
| EP0480752A2 (en) | 1992-04-15 |
| TW218935B (https=) | 1994-01-11 |
| JPH04149900A (ja) | 1992-05-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19911010 |
|
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19911010 Comment text: Request for Examination of Application |
|
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 19941130 Patent event code: PE09021S01D |
|
| AMND | Amendment | ||
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 19950711 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 19941130 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |
|
| J2X1 | Appeal (before the patent court) |
Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL |
|
| PJ2001 | Appeal |
Appeal kind category: Appeal against decision to decline refusal Decision date: 19960604 Appeal identifier: 1995201002355 Request date: 19951011 |
|
| PB0901 | Examination by re-examination before a trial |
Comment text: Request for Trial against Decision on Refusal Patent event date: 19951011 Patent event code: PB09011R01I Comment text: Amendment to Specification, etc. Patent event date: 19950325 Patent event code: PB09011R02I |
|
| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19951229 |
|
| B701 | Decision to grant | ||
| PB0701 | Decision of registration after re-examination before a trial |
Patent event date: 19960604 Comment text: Decision to Grant Registration Patent event code: PB07012S01D Patent event date: 19951218 Comment text: Transfer of Trial File for Re-examination before a Trial Patent event code: PB07011S01I |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19960807 Patent event code: PR07011E01D |
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| PR1002 | Payment of registration fee |
Payment date: 19960807 End annual number: 3 Start annual number: 1 |
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