DE69124562T2 - Halbleiterspeichergerät mit Mitteln zur Identifizierung von Kurzschlüssen - Google Patents

Halbleiterspeichergerät mit Mitteln zur Identifizierung von Kurzschlüssen

Info

Publication number
DE69124562T2
DE69124562T2 DE69124562T DE69124562T DE69124562T2 DE 69124562 T2 DE69124562 T2 DE 69124562T2 DE 69124562 T DE69124562 T DE 69124562T DE 69124562 T DE69124562 T DE 69124562T DE 69124562 T2 DE69124562 T2 DE 69124562T2
Authority
DE
Germany
Prior art keywords
word lines
group
word
lines
level signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69124562T
Other languages
English (en)
Other versions
DE69124562D1 (de
Inventor
Yasuhiro Hotta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69124562D1 publication Critical patent/DE69124562D1/de
Application granted granted Critical
Publication of DE69124562T2 publication Critical patent/DE69124562T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30—Accessing single arrays
    • G11C29/34—Accessing multiple bits simultaneously
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
DE69124562T 1990-10-11 1991-10-11 Halbleiterspeichergerät mit Mitteln zur Identifizierung von Kurzschlüssen Expired - Lifetime DE69124562T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2274803A JP2647546B2 (ja) 1990-10-11 1990-10-11 半導体記憶装置のテスト方法

Publications (2)

Publication Number Publication Date
DE69124562D1 DE69124562D1 (de) 1997-03-20
DE69124562T2 true DE69124562T2 (de) 1997-08-14

Family

ID=17546787

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124562T Expired - Lifetime DE69124562T2 (de) 1990-10-11 1991-10-11 Halbleiterspeichergerät mit Mitteln zur Identifizierung von Kurzschlüssen

Country Status (6)

Country Link
US (1) US5331594A (de)
EP (1) EP0480752B1 (de)
JP (1) JP2647546B2 (de)
KR (1) KR960001300B1 (de)
DE (1) DE69124562T2 (de)
TW (1) TW218935B (de)

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JP2793427B2 (ja) * 1992-04-08 1998-09-03 株式会社東芝 半導体装置
JP2978329B2 (ja) * 1992-04-21 1999-11-15 三菱電機株式会社 半導体メモリ装置及びそのビット線の短絡救済方法
DE4223532A1 (de) * 1992-07-17 1994-01-20 Philips Patentverwaltung Schaltungsanordnung zum Prüfen der Adressierung wenigstens einer Matrix
US5428621A (en) * 1992-09-21 1995-06-27 Sundisk Corporation Latent defect handling in EEPROM devices
JP3164939B2 (ja) * 1993-04-27 2001-05-14 富士通株式会社 記憶装置の試験回路を備えた装置
EP0632464B1 (de) * 1993-06-28 1999-09-08 STMicroelectronics S.r.l. Speicherzellen-Stromleseverfahren in Mikrosteuergerät
JP3354231B2 (ja) * 1993-09-29 2002-12-09 三菱電機エンジニアリング株式会社 半導体装置
KR950015768A (ko) * 1993-11-17 1995-06-17 김광호 불휘발성 반도체 메모리 장치의 배선단락 검출회로 및 그 방법
KR0122100B1 (ko) * 1994-03-10 1997-11-26 김광호 스트레스회로를 가지는 반도체집적회로 및 그 스트레스전압공급방법
KR0135231B1 (ko) * 1994-08-23 1998-04-22 김주용 고속 테스트 기능을 갖는 메모리 소자
US5610866A (en) * 1994-10-31 1997-03-11 Sgs-Thomson Microelectronics, Inc. Circuit structure and method for stress testing of bit lines
US5623925A (en) * 1995-06-05 1997-04-29 Cmed, Inc. Virtual medical instrument for performing medical diagnostic testing on patients
JP3734853B2 (ja) * 1995-06-27 2006-01-11 株式会社ルネサステクノロジ 半導体記憶装置
DE19612441C2 (de) * 1996-03-28 1998-04-09 Siemens Ag Schaltungsanordnung mit einer Testschaltung
US6072719A (en) * 1996-04-19 2000-06-06 Kabushiki Kaisha Toshiba Semiconductor memory device
US5781557A (en) * 1996-12-31 1998-07-14 Intel Corporation Memory test mode for wordline resistive defects
FR2771840B1 (fr) * 1997-11-28 2003-06-27 Sgs Thomson Microelectronics Memoire rom testable en consommation statique
KR19990084215A (ko) * 1998-04-03 1999-12-06 윤종용 반도체 메모리 장치의 라인-브리지 차단 회로
DE69937559T2 (de) 1999-09-10 2008-10-23 Stmicroelectronics S.R.L., Agrate Brianza Nicht-flüchtige Speicher mit Erkennung von Kurzschlüssen zwischen Wortleitungen
US6407953B1 (en) * 2001-02-02 2002-06-18 Matrix Semiconductor, Inc. Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
US6388927B1 (en) * 2001-02-23 2002-05-14 Cypress Semiconductor Corp. Direct bit line-bit line defect detection test mode for SRAM
US6768685B1 (en) 2001-11-16 2004-07-27 Mtrix Semiconductor, Inc. Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor
US6778449B2 (en) * 2002-07-01 2004-08-17 International Business Machines Corporation Method and design for measuring SRAM array leakage macro (ALM)
US7765153B2 (en) * 2003-06-10 2010-07-27 Kagi, Inc. Method and apparatus for verifying financial account information
US6992939B2 (en) * 2004-01-26 2006-01-31 Micron Technology, Inc. Method and apparatus for identifying short circuits in an integrated circuit device
US7053647B2 (en) * 2004-05-07 2006-05-30 Taiwan Semiconductor Manufacturing Co., Ltd. Method of detecting potential bridging effects between conducting lines in an integrated circuit
KR100902052B1 (ko) * 2007-08-13 2009-06-15 주식회사 하이닉스반도체 워드 라인 테스트 방법
JP2009076176A (ja) * 2007-09-25 2009-04-09 Toshiba Corp 不揮発性半導体記憶装置
TWI534819B (zh) * 2014-07-31 2016-05-21 常憶科技股份有限公司 於靜態電流測試下檢測全域字元線缺陷
US9330783B1 (en) * 2014-12-17 2016-05-03 Apple Inc. Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block
US9390809B1 (en) 2015-02-10 2016-07-12 Apple Inc. Data storage in a memory block following WL-WL short
US9529663B1 (en) 2015-12-20 2016-12-27 Apple Inc. Detection and localization of failures in 3D NAND flash memory
US9996417B2 (en) 2016-04-12 2018-06-12 Apple Inc. Data recovery in memory having multiple failure modes
US10762967B2 (en) 2018-06-28 2020-09-01 Apple Inc. Recovering from failure in programming a nonvolatile memory
US10755787B2 (en) 2018-06-28 2020-08-25 Apple Inc. Efficient post programming verification in a nonvolatile memory
US10936455B2 (en) 2019-02-11 2021-03-02 Apple Inc. Recovery of data failing due to impairment whose severity depends on bit-significance value
US10915394B1 (en) 2019-09-22 2021-02-09 Apple Inc. Schemes for protecting data in NVM device using small storage footprint
US11550657B1 (en) 2021-09-01 2023-01-10 Apple Inc. Efficient programming schemes in a nonvolatile memory

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US4393475A (en) * 1981-01-27 1983-07-12 Texas Instruments Incorporated Non-volatile semiconductor memory and the testing method for the same
JPS592299A (ja) * 1982-06-29 1984-01-07 Fujitsu Ltd フイ−ルドプログラマブル素子
JPS62114200A (ja) * 1985-11-13 1987-05-25 Mitsubishi Electric Corp 半導体メモリ装置
US4685086A (en) * 1985-11-14 1987-08-04 Thomson Components-Mostek Corp. Memory cell leakage detection circuit
JPS62120700A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd 半導体記憶装置
JPS63177400A (ja) * 1987-01-19 1988-07-21 Hitachi Ltd 半導体メモリ
JPS63244400A (ja) * 1987-03-16 1988-10-11 シーメンス・アクチエンゲゼルシヤフト メモリセルの検査回路装置および方法
JP2609211B2 (ja) * 1987-03-16 1997-05-14 シーメンス・アクチエンゲゼルシヤフト メモリセルの検査回路装置および方法
JPH01109921A (ja) * 1987-10-23 1989-04-26 Ricoh Co Ltd プログラマブルロジックアレイ
JPH01134799A (ja) * 1987-11-20 1989-05-26 Sony Corp メモリ装置
JPH01243291A (ja) * 1988-03-25 1989-09-27 Hitachi Ltd メモリ回路
JPH01276500A (ja) * 1988-04-27 1989-11-07 Hitachi Ltd 半導体記憶装置
JPH01296500A (ja) * 1988-05-23 1989-11-29 Mitsubishi Electric Corp 半導体記憶装置
JPH02249196A (ja) * 1989-03-22 1990-10-04 Hitachi Ltd 半導体記憶装置
JPH03137900A (ja) * 1989-07-27 1991-06-12 Nec Corp 不揮発性半導体メモリ
JP2601931B2 (ja) * 1990-04-06 1997-04-23 株式会社東芝 半導体不揮発性メモリ装置

Also Published As

Publication number Publication date
DE69124562D1 (de) 1997-03-20
KR920008768A (ko) 1992-05-28
JPH04149900A (ja) 1992-05-22
TW218935B (de) 1994-01-11
EP0480752B1 (de) 1997-02-05
EP0480752A2 (de) 1992-04-15
US5331594A (en) 1994-07-19
KR960001300B1 (ko) 1996-01-25
EP0480752A3 (en) 1993-02-24
JP2647546B2 (ja) 1997-08-27

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