KR940005200A - 배선기판상의 배선표면 처리방법 - Google Patents

배선기판상의 배선표면 처리방법 Download PDF

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Publication number
KR940005200A
KR940005200A KR1019930015341A KR930015341A KR940005200A KR 940005200 A KR940005200 A KR 940005200A KR 1019930015341 A KR1019930015341 A KR 1019930015341A KR 930015341 A KR930015341 A KR 930015341A KR 940005200 A KR940005200 A KR 940005200A
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South Korea
Prior art keywords
wiring
alloy layer
bonded
bonding
semiconductor element
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KR1019930015341A
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English (en)
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KR0127277B1 (ko
Inventor
유끼야스 미야자끼
노부요시 스기따니
요시아끼 시모죠
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이소가이 찌세이
가부시끼가이샤 도요다지도쇽끼 세이사꾸쇼
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Publication of KR940005200A publication Critical patent/KR940005200A/ko
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Publication of KR0127277B1 publication Critical patent/KR0127277B1/ko

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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(목적)Al본딩 와이어와의 접합성이 양호한 것에 덧붙여 용융 연질 땜납 접촉성 및 땜납부착성이 양호하고 상기 땜납 부착성이 히이트사이클의 반복에 의해서도 저하되지 않는 배선기판상의 배션표면 처리 방법을 제공한다.
(구성)세라믹 적층기판(1)상에는 W에 의한 배선층(2)이 형성되어 있다. Ni-B합금층(10)상에는 Ag페이스트나 연질 땜납 등에 의한 납재 또는 에폭시 수지등의 접착제에 의한 접합층(5)을 거쳐서 반도체 소자(베이칩)(6)가 펠렛 본딩되어 있다. 또, Ni-B합금층(10)상에는 연질 땜납(7)에 의해서 칩 부품(8)이 접합되어 있다. 그리고, 칩 부품(8)이 접합되고 있는 Ni-B합금층(10)과 반도체 소자(6)를 Al본딩와이어(9)에 의해서 와이어 본딩하므로서 칩 부품(8)과 반도체 소자(6)를 전기적으로 접속하고 있다.

Description

배선기판상의 배선표면 처리방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명을 구체화한 1실시예의 배선 기판상의 배선표면 처리 방법을 모식적으로 도시하는 요부 단면도.

Claims (1)

  1. 배선기판상에 W 또는 Cu 및 그 합금으로 이루어진 배선을 형성하고 상기 배선의 표면에 B를 함유하는 Ni합금층을 피막으로서 형성하고 상기 Ni합금층에 함유하는 납땜 및 Al본딩 와이어를 와이어 본딩하는 것을 특징으로 하는 배선기판상의 배선표면 처리방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930015341A 1992-08-20 1993-08-17 배선기판상의 배선표면 처리방법 KR0127277B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP04-221824 1992-08-20
JP4221824A JPH06216184A (ja) 1992-08-20 1992-08-20 配線基板上の配線の表面処理方法

Publications (2)

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KR940005200A true KR940005200A (ko) 1994-03-16
KR0127277B1 KR0127277B1 (ko) 1998-04-06

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EP (1) EP0588093A1 (ko)
JP (1) JPH06216184A (ko)
KR (1) KR0127277B1 (ko)
TW (1) TW239219B (ko)

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Publication number Priority date Publication date Assignee Title
JP3435484B2 (ja) * 1995-06-08 2003-08-11 日本特殊陶業株式会社 セラミック基板及びその製造方法
JPH1050751A (ja) * 1996-07-30 1998-02-20 Kyocera Corp ワイヤボンディング細線の接合方法
JP2005057132A (ja) * 2003-08-06 2005-03-03 Fcm Kk 回路基板およびそれを含むことを特徴とする製品
JP4984473B2 (ja) * 2005-09-30 2012-07-25 富士電機株式会社 電子部品および電子部品の製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4077854A (en) * 1972-10-02 1978-03-07 The Bendix Corporation Method of manufacture of solderable thin film microcircuit with stabilized resistive films
DE3380413D1 (en) * 1982-04-27 1989-09-21 Richardson Chemical Co Process for selectively depositing a nickel-boron coating over a metallurgy pattern on a dielectric substrate and products produced thereby
JPH0634442B2 (ja) * 1986-11-25 1994-05-02 株式会社日立製作所 ムライト配線基板の製造方法
JPH01169996A (ja) * 1987-12-25 1989-07-05 Hitachi Ltd 湿式多層セラミック回路板のメタライズ方法

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EP0588093A1 (en) 1994-03-23
TW239219B (ko) 1995-01-21
KR0127277B1 (ko) 1998-04-06

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