KR930014974A - TiN층으로 된 전하저장전극 형성방법 - Google Patents

TiN층으로 된 전하저장전극 형성방법 Download PDF

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Publication number
KR930014974A
KR930014974A KR1019910023431A KR910023431A KR930014974A KR 930014974 A KR930014974 A KR 930014974A KR 1019910023431 A KR1019910023431 A KR 1019910023431A KR 910023431 A KR910023431 A KR 910023431A KR 930014974 A KR930014974 A KR 930014974A
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KR
South Korea
Prior art keywords
charge storage
storage electrode
tin layer
electrode made
forming charge
Prior art date
Application number
KR1019910023431A
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English (en)
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KR940011799B1 (ko
Inventor
박영진
박헌섭
Original Assignee
정몽헌
현대전자산업 주식회사
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Priority to KR1019910023431A priority Critical patent/KR940011799B1/ko
Publication of KR930014974A publication Critical patent/KR930014974A/ko
Application granted granted Critical
Publication of KR940011799B1 publication Critical patent/KR940011799B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

TiN층으로 된 전하저장전극 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 DRAM 셀의 단면도.
제 2 도는 Ti/N의 비율에 따른 비저항을 도시한 그래프도.
* 도면의 주요부분에 대한 부호의 설명
1 : 실리콘기판 2 : 게이트 전극
3 : 소오스 4 : 드레인
7 : 전하저장전극 8 : 유전체막
9 : 플레이트 전극 10 : MOSFET

Claims (3)

  1. DRAM 셀의 전하저장전극 제조방법에 있어서, TiN층을 MOSFET 상부에 증착하고, 전하저장전극 마스크 공정으로 예정부분의 TiN층을 남겨서 전하저장전극을 형성하는 것을 특징으로 하는 TiN층으로 된 전하저장전극 형성방법.
  2. 제 1 항에 있어서, 상기 TiN층은 Ti : N의 비율이 1: 1인 것을 증착하는 것을 특징으로 하는 TiN층으로 된 전하저장전극 형성방법.
  3. 제 1 항에 있어서, 상기 TiN층은 반응성 스퍼터링, 열적 CVD , PECVD방법으로 증착하는 것을 특징으로 하는 TiN층으로 된 전하저장전극 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910023431A 1991-12-19 1991-12-19 TiN층으로 된 전하저장전극 형성방법 KR940011799B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910023431A KR940011799B1 (ko) 1991-12-19 1991-12-19 TiN층으로 된 전하저장전극 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910023431A KR940011799B1 (ko) 1991-12-19 1991-12-19 TiN층으로 된 전하저장전극 형성방법

Publications (2)

Publication Number Publication Date
KR930014974A true KR930014974A (ko) 1993-07-23
KR940011799B1 KR940011799B1 (ko) 1994-12-26

Family

ID=19325189

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910023431A KR940011799B1 (ko) 1991-12-19 1991-12-19 TiN층으로 된 전하저장전극 형성방법

Country Status (1)

Country Link
KR (1) KR940011799B1 (ko)

Also Published As

Publication number Publication date
KR940011799B1 (ko) 1994-12-26

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